From: Sohil Mehta <sohil.mehta@intel.com>
To: "Xin Li (Intel)" <xin@zytor.com>, <linux-kernel@vger.kernel.org>,
<kvm@vger.kernel.org>
Cc: <tglx@linutronix.de>, <mingo@redhat.com>, <bp@alien8.de>,
<dave.hansen@linux.intel.com>, <x86@kernel.org>, <hpa@zytor.com>,
<seanjc@google.com>, <pbonzini@redhat.com>,
<peterz@infradead.org>, <brgerst@gmail.com>,
<tony.luck@intel.com>, <fenghuay@nvidia.com>
Subject: Re: [PATCH v2 0/2] x86/traps: Fix DR6/DR7 initialization
Date: Tue, 17 Jun 2025 10:55:18 -0700 [thread overview]
Message-ID: <80636908-b355-455b-bac8-4703210ab65d@intel.com> (raw)
In-Reply-To: <20250617073234.1020644-1-xin@zytor.com>
On 6/17/2025 12:32 AM, Xin Li (Intel) wrote:
> Sohil reported seeing a split lock warning when running a test that
> generates userspace #DB:
>
> x86/split lock detection: #DB: sigtrap_loop_64/4614 took a bus_lock trap at address: 0x4011ae
>
The following patches fix the issue for me.
Tested-by: Sohil Mehta <sohil.mehta@intel.com>
>
> Xin Li (Intel) (2):
> x86/traps: Initialize DR6 by writing its architectural reset value
> x86/traps: Initialize DR7 by writing its architectural reset value
>
> arch/x86/include/asm/debugreg.h | 14 ++++++++----
> arch/x86/include/asm/kvm_host.h | 2 +-
> arch/x86/include/uapi/asm/debugreg.h | 7 +++++-
> arch/x86/kernel/cpu/common.c | 17 ++++++--------
> arch/x86/kernel/kgdb.c | 2 +-
> arch/x86/kernel/process_32.c | 2 +-
> arch/x86/kernel/process_64.c | 2 +-
> arch/x86/kernel/traps.c | 34 +++++++++++++++++-----------
> arch/x86/kvm/x86.c | 4 ++--
> 9 files changed, 50 insertions(+), 34 deletions(-)
>
>
> base-commit: 594902c986e269660302f09df9ec4bf1cf017b77
prev parent reply other threads:[~2025-06-17 17:55 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-06-17 7:32 Xin Li (Intel)
2025-06-17 7:32 ` [PATCH v2 1/2] x86/traps: Initialize DR6 by writing its architectural reset value Xin Li (Intel)
2025-06-17 9:03 ` Peter Zijlstra
2025-06-17 22:49 ` Xin Li
2025-06-17 18:23 ` Sohil Mehta
2025-06-17 20:47 ` Sean Christopherson
2025-06-17 23:10 ` Sohil Mehta
2025-06-18 0:42 ` Xin Li
2025-06-17 23:57 ` Xin Li
2025-06-18 21:24 ` Sean Christopherson
2025-06-18 21:55 ` Xin Li
2025-06-19 5:16 ` Maciej W. Rozycki
2025-06-17 7:32 ` [PATCH v2 2/2] x86/traps: Initialize DR7 " Xin Li (Intel)
2025-06-17 13:35 ` Sean Christopherson
2025-06-17 23:08 ` Xin Li
2025-06-18 0:15 ` Xin Li
2025-06-18 3:34 ` H. Peter Anvin
2025-06-17 23:10 ` Sohil Mehta
2025-06-18 0:44 ` Xin Li
2025-06-17 9:05 ` [PATCH v2 0/2] x86/traps: Fix DR6/DR7 initialization Peter Zijlstra
2025-06-17 17:55 ` Sohil Mehta [this message]
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