From: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
To: Vinod Koul <vkoul@kernel.org>,
Kishon Vijay Abraham I <kishon@kernel.org>,
Heiko Stuebner <heiko@sntech.de>,
Algea Cao <algea.cao@rock-chips.com>,
Dmitry Baryshkov <lumag@kernel.org>
Cc: kernel@collabora.com, linux-phy@lists.infradead.org,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-rockchip@lists.infradead.org
Subject: [PATCH v3 13/14] phy: rockchip: samsung-hdptx: Extend rk_hdptx_phy_verify_hdmi_config() helper
Date: Mon, 18 Aug 2025 21:59:13 +0300 [thread overview]
Message-ID: <20250818-phy-hdptx-frl-v3-13-c79997d8bb2b@collabora.com> (raw)
In-Reply-To: <20250818-phy-hdptx-frl-v3-0-c79997d8bb2b@collabora.com>
In order to facilitate introduction of HDMI 2.1 FRL support and to avoid
recomputing the link rate after verifying the HDMI configuration given
as input, extend rk_hdptx_phy_verify_hdmi_config() by providing an
optional output parameter to store the validated configuration.
For improved code readability, also rename the existing hdmi input
parameter.
Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
---
drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c | 35 ++++++++++++-----------
1 file changed, 18 insertions(+), 17 deletions(-)
diff --git a/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c b/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c
index a44614bc73e9461d4d38663776f547f595169c3b..58eac67cc3b21c17939c303bbea3fcdc5e6b0518 100644
--- a/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c
+++ b/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c
@@ -1472,25 +1472,24 @@ static int rk_hdptx_phy_power_off(struct phy *phy)
}
static int rk_hdptx_phy_verify_hdmi_config(struct rk_hdptx_phy *hdptx,
- struct phy_configure_opts_hdmi *hdmi)
+ struct phy_configure_opts_hdmi *hdmi_in,
+ struct rk_hdptx_hdmi_cfg *hdmi_out)
{
int i;
- if (!hdmi->tmds_char_rate || hdmi->tmds_char_rate > HDMI20_MAX_RATE)
+ if (!hdmi_in->tmds_char_rate || hdmi_in->tmds_char_rate > HDMI20_MAX_RATE)
return -EINVAL;
for (i = 0; i < ARRAY_SIZE(rk_hdptx_tmds_ropll_cfg); i++)
- if (hdmi->tmds_char_rate == rk_hdptx_tmds_ropll_cfg[i].rate)
+ if (hdmi_in->tmds_char_rate == rk_hdptx_tmds_ropll_cfg[i].rate)
break;
if (i == ARRAY_SIZE(rk_hdptx_tmds_ropll_cfg) &&
- !rk_hdptx_phy_clk_pll_calc(hdmi->tmds_char_rate, NULL))
+ !rk_hdptx_phy_clk_pll_calc(hdmi_in->tmds_char_rate, NULL))
return -EINVAL;
- if (!hdmi->bpc)
- hdmi->bpc = 8;
-
- switch (hdmi->bpc) {
+ switch (hdmi_in->bpc) {
+ case 0:
case 8:
case 10:
case 12:
@@ -1500,6 +1499,11 @@ static int rk_hdptx_phy_verify_hdmi_config(struct rk_hdptx_phy *hdptx,
return -EINVAL;
}
+ if (hdmi_out) {
+ hdmi_out->rate = hdmi_in->tmds_char_rate;
+ hdmi_out->bpc = hdmi_in->bpc ?: 8;
+ }
+
return 0;
}
@@ -1765,17 +1769,15 @@ static int rk_hdptx_phy_configure(struct phy *phy, union phy_configure_opts *opt
int ret;
if (mode != PHY_MODE_DP) {
- ret = rk_hdptx_phy_verify_hdmi_config(hdptx, &opts->hdmi);
+ ret = rk_hdptx_phy_verify_hdmi_config(hdptx, &opts->hdmi, &hdptx->hdmi_cfg);
if (ret) {
dev_err(hdptx->dev, "invalid hdmi params for phy configure\n");
} else {
- hdptx->hdmi_cfg.rate = opts->hdmi.tmds_char_rate;
- hdptx->hdmi_cfg.bpc = opts->hdmi.bpc;
hdptx->restrict_rate_change = true;
+ dev_dbg(hdptx->dev, "%s rate=%llu bpc=%u\n", __func__,
+ hdptx->hdmi_cfg.rate, hdptx->hdmi_cfg.bpc);
}
- dev_dbg(hdptx->dev, "%s rate=%llu bpc=%u\n", __func__,
- hdptx->hdmi_cfg.rate, hdptx->hdmi_cfg.bpc);
return ret;
}
@@ -1819,7 +1821,7 @@ static int rk_hdptx_phy_validate(struct phy *phy, enum phy_mode mode,
struct rk_hdptx_phy *hdptx = phy_get_drvdata(phy);
if (mode != PHY_MODE_DP)
- return rk_hdptx_phy_verify_hdmi_config(hdptx, &opts->hdmi);
+ return rk_hdptx_phy_verify_hdmi_config(hdptx, &opts->hdmi, NULL);
return rk_hdptx_phy_verify_dp_config(hdptx, &opts->dp);
}
@@ -1959,12 +1961,11 @@ static long rk_hdptx_phy_clk_round_rate(struct clk_hw *hw, unsigned long rate,
struct phy_configure_opts_hdmi hdmi = {
.tmds_char_rate = rate,
};
- int ret = rk_hdptx_phy_verify_hdmi_config(hdptx, &hdmi);
+
+ int ret = rk_hdptx_phy_verify_hdmi_config(hdptx, &hdmi, &hdptx->hdmi_cfg);
if (ret)
return ret;
-
- hdptx->hdmi_cfg.rate = rate;
}
/*
--
2.50.1
next prev parent reply other threads:[~2025-08-18 18:59 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-08-18 18:59 [PATCH v3 00/14] Add HDMI 2.1 FRL support to phy-rockchip-samsung-hdptx Cristian Ciocaltea
2025-08-18 18:59 ` [PATCH v3 01/14] phy: hdmi: Add HDMI 2.1 FRL configuration options Cristian Ciocaltea
2025-08-19 0:42 ` Dmitry Baryshkov
2025-08-19 11:20 ` Cristian Ciocaltea
2025-08-18 18:59 ` [PATCH v3 02/14] phy: rockchip: samsung-hdptx: Fix reported clock rate in high bpc mode Cristian Ciocaltea
2025-08-18 18:59 ` [PATCH v3 03/14] phy: rockchip: samsung-hdptx: Reduce ROPLL loop bandwidth Cristian Ciocaltea
2025-08-18 18:59 ` [PATCH v3 04/14] phy: rockchip: samsung-hdptx: Prevent Inter-Pair Skew from exceeding the limits Cristian Ciocaltea
2025-08-18 18:59 ` [PATCH v3 05/14] phy: rockchip: samsung-hdptx: Use usleep_range() instead of udelay() Cristian Ciocaltea
2025-08-18 18:59 ` [PATCH v3 06/14] phy: rockchip: samsung-hdptx: Fix coding style alignment Cristian Ciocaltea
2025-08-18 18:59 ` [PATCH v3 07/14] phy: rockchip: samsung-hdptx: Consistently use [rk_]hdptx_[tmds_] prefixes Cristian Ciocaltea
2025-08-18 18:59 ` [PATCH v3 08/14] phy: rockchip: samsung-hdptx: Enable lane output in common helper Cristian Ciocaltea
2025-08-18 18:59 ` [PATCH v3 09/14] phy: rockchip: samsung-hdptx: Cleanup *_cmn_init_seq lists Cristian Ciocaltea
2025-08-18 18:59 ` [PATCH v3 10/14] phy: rockchip: samsung-hdptx: Compute clk rate from PLL config Cristian Ciocaltea
2025-08-18 18:59 ` [PATCH v3 11/14] phy: rockchip: samsung-hdptx: Drop hw_rate driver data Cristian Ciocaltea
2025-08-18 18:59 ` [PATCH v3 12/14] phy: rockchip: samsung-hdptx: Switch to driver specific HDMI config Cristian Ciocaltea
2025-08-18 18:59 ` Cristian Ciocaltea [this message]
2025-08-18 18:59 ` [PATCH v3 14/14] phy: rockchip: samsung-hdptx: Add HDMI 2.1 FRL support Cristian Ciocaltea
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