From: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
To: Vinod Koul <vkoul@kernel.org>,
Kishon Vijay Abraham I <kishon@kernel.org>,
Heiko Stuebner <heiko@sntech.de>,
Algea Cao <algea.cao@rock-chips.com>,
Dmitry Baryshkov <lumag@kernel.org>
Cc: kernel@collabora.com, linux-phy@lists.infradead.org,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-rockchip@lists.infradead.org
Subject: [PATCH v3 09/14] phy: rockchip: samsung-hdptx: Cleanup *_cmn_init_seq lists
Date: Mon, 18 Aug 2025 21:59:09 +0300 [thread overview]
Message-ID: <20250818-phy-hdptx-frl-v3-9-c79997d8bb2b@collabora.com> (raw)
In-Reply-To: <20250818-phy-hdptx-frl-v3-0-c79997d8bb2b@collabora.com>
Drop redundant reg_sequence entries from rk_hdptx_common_cmn_init_seq[],
i.e. those that are either duplicated or overridden in
rk_hdptx_tmds_cmn_init_seq[].
Additionally, a few items do not really belong to the former, hence move
them to the latter. That's mostly a preparatory step for adding FRL
support.
No functional changes intended at this point.
Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
---
drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c | 22 ++++------------------
1 file changed, 4 insertions(+), 18 deletions(-)
diff --git a/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c b/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c
index 3bb4ce993088b4a6c17a40ecb235ce98dc0eb9da..699b86732b8d7d77b3f9ec3a7a8c801392b796f6 100644
--- a/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c
+++ b/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c
@@ -465,13 +465,11 @@ static const struct reg_sequence rk_hdptx_common_cmn_init_seq[] = {
REG_SEQ0(CMN_REG(000e), 0x0f),
REG_SEQ0(CMN_REG(000f), 0x0f),
REG_SEQ0(CMN_REG(0010), 0x04),
- REG_SEQ0(CMN_REG(0011), 0x00),
REG_SEQ0(CMN_REG(0012), 0x26),
REG_SEQ0(CMN_REG(0013), 0x22),
REG_SEQ0(CMN_REG(0014), 0x24),
REG_SEQ0(CMN_REG(0015), 0x77),
REG_SEQ0(CMN_REG(0016), 0x08),
- REG_SEQ0(CMN_REG(0017), 0x00),
REG_SEQ0(CMN_REG(0018), 0x04),
REG_SEQ0(CMN_REG(0019), 0x48),
REG_SEQ0(CMN_REG(001a), 0x01),
@@ -479,13 +477,7 @@ static const struct reg_sequence rk_hdptx_common_cmn_init_seq[] = {
REG_SEQ0(CMN_REG(001c), 0x01),
REG_SEQ0(CMN_REG(001d), 0x64),
REG_SEQ0(CMN_REG(001f), 0x00),
- REG_SEQ0(CMN_REG(0026), 0x53),
REG_SEQ0(CMN_REG(0029), 0x01),
- REG_SEQ0(CMN_REG(0030), 0x00),
- REG_SEQ0(CMN_REG(0031), 0x20),
- REG_SEQ0(CMN_REG(0032), 0x30),
- REG_SEQ0(CMN_REG(0033), 0x0b),
- REG_SEQ0(CMN_REG(0034), 0x23),
REG_SEQ0(CMN_REG(0035), 0x00),
REG_SEQ0(CMN_REG(0038), 0x00),
REG_SEQ0(CMN_REG(0039), 0x00),
@@ -496,7 +488,6 @@ static const struct reg_sequence rk_hdptx_common_cmn_init_seq[] = {
REG_SEQ0(CMN_REG(003f), 0x83),
REG_SEQ0(CMN_REG(0040), 0x06),
REG_SEQ0(CMN_REG(0041), 0x20),
- REG_SEQ0(CMN_REG(0042), 0xb8),
REG_SEQ0(CMN_REG(0043), 0x00),
REG_SEQ0(CMN_REG(0044), 0x46),
REG_SEQ0(CMN_REG(0045), 0x24),
@@ -506,14 +497,9 @@ static const struct reg_sequence rk_hdptx_common_cmn_init_seq[] = {
REG_SEQ0(CMN_REG(004b), 0x00),
REG_SEQ0(CMN_REG(004c), 0x01),
REG_SEQ0(CMN_REG(004d), 0x64),
- REG_SEQ0(CMN_REG(004e), 0x14),
REG_SEQ0(CMN_REG(004f), 0x00),
REG_SEQ0(CMN_REG(0050), 0x00),
- REG_SEQ0(CMN_REG(005d), 0x0c),
REG_SEQ0(CMN_REG(005f), 0x01),
- REG_SEQ0(CMN_REG(006b), 0x04),
- REG_SEQ0(CMN_REG(0073), 0x30),
- REG_SEQ0(CMN_REG(0074), 0x00),
REG_SEQ0(CMN_REG(0075), 0x20),
REG_SEQ0(CMN_REG(0076), 0x30),
REG_SEQ0(CMN_REG(0077), 0x08),
@@ -525,13 +511,10 @@ static const struct reg_sequence rk_hdptx_common_cmn_init_seq[] = {
REG_SEQ0(CMN_REG(007e), 0x00),
REG_SEQ0(CMN_REG(007f), 0x00),
REG_SEQ0(CMN_REG(0080), 0x00),
- REG_SEQ0(CMN_REG(0081), 0x09),
REG_SEQ0(CMN_REG(0082), 0x04),
REG_SEQ0(CMN_REG(0083), 0x24),
REG_SEQ0(CMN_REG(0084), 0x20),
REG_SEQ0(CMN_REG(0085), 0x03),
- REG_SEQ0(CMN_REG(0086), 0x01),
- REG_SEQ0(CMN_REG(0087), 0x0c),
REG_SEQ0(CMN_REG(008a), 0x55),
REG_SEQ0(CMN_REG(008b), 0x25),
REG_SEQ0(CMN_REG(008c), 0x2c),
@@ -543,7 +526,6 @@ static const struct reg_sequence rk_hdptx_common_cmn_init_seq[] = {
REG_SEQ0(CMN_REG(0092), 0x00),
REG_SEQ0(CMN_REG(0093), 0x00),
REG_SEQ0(CMN_REG(009a), 0x11),
- REG_SEQ0(CMN_REG(009b), 0x10),
};
static const struct reg_sequence rk_hdptx_tmds_cmn_init_seq[] = {
@@ -577,9 +559,13 @@ static const struct reg_sequence rk_hdptx_tmds_cmn_init_seq[] = {
REG_SEQ0(CMN_REG(0048), 0x11),
REG_SEQ0(CMN_REG(004e), 0x34),
REG_SEQ0(CMN_REG(005c), 0x25),
+ REG_SEQ0(CMN_REG(005d), 0x0c),
REG_SEQ0(CMN_REG(005e), 0x4f),
+ REG_SEQ0(CMN_REG(006b), 0x04),
+ REG_SEQ0(CMN_REG(0073), 0x30),
REG_SEQ0(CMN_REG(0074), 0x04),
REG_SEQ0(CMN_REG(0081), 0x01),
+ REG_SEQ0(CMN_REG(0086), 0x01),
REG_SEQ0(CMN_REG(0087), 0x04),
REG_SEQ0(CMN_REG(0089), 0x00),
REG_SEQ0(CMN_REG(0095), 0x00),
--
2.50.1
next prev parent reply other threads:[~2025-08-18 18:59 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-08-18 18:59 [PATCH v3 00/14] Add HDMI 2.1 FRL support to phy-rockchip-samsung-hdptx Cristian Ciocaltea
2025-08-18 18:59 ` [PATCH v3 01/14] phy: hdmi: Add HDMI 2.1 FRL configuration options Cristian Ciocaltea
2025-08-19 0:42 ` Dmitry Baryshkov
2025-08-19 11:20 ` Cristian Ciocaltea
2025-08-18 18:59 ` [PATCH v3 02/14] phy: rockchip: samsung-hdptx: Fix reported clock rate in high bpc mode Cristian Ciocaltea
2025-08-18 18:59 ` [PATCH v3 03/14] phy: rockchip: samsung-hdptx: Reduce ROPLL loop bandwidth Cristian Ciocaltea
2025-08-18 18:59 ` [PATCH v3 04/14] phy: rockchip: samsung-hdptx: Prevent Inter-Pair Skew from exceeding the limits Cristian Ciocaltea
2025-08-18 18:59 ` [PATCH v3 05/14] phy: rockchip: samsung-hdptx: Use usleep_range() instead of udelay() Cristian Ciocaltea
2025-08-18 18:59 ` [PATCH v3 06/14] phy: rockchip: samsung-hdptx: Fix coding style alignment Cristian Ciocaltea
2025-08-18 18:59 ` [PATCH v3 07/14] phy: rockchip: samsung-hdptx: Consistently use [rk_]hdptx_[tmds_] prefixes Cristian Ciocaltea
2025-08-18 18:59 ` [PATCH v3 08/14] phy: rockchip: samsung-hdptx: Enable lane output in common helper Cristian Ciocaltea
2025-08-18 18:59 ` Cristian Ciocaltea [this message]
2025-08-18 18:59 ` [PATCH v3 10/14] phy: rockchip: samsung-hdptx: Compute clk rate from PLL config Cristian Ciocaltea
2025-08-18 18:59 ` [PATCH v3 11/14] phy: rockchip: samsung-hdptx: Drop hw_rate driver data Cristian Ciocaltea
2025-08-18 18:59 ` [PATCH v3 12/14] phy: rockchip: samsung-hdptx: Switch to driver specific HDMI config Cristian Ciocaltea
2025-08-18 18:59 ` [PATCH v3 13/14] phy: rockchip: samsung-hdptx: Extend rk_hdptx_phy_verify_hdmi_config() helper Cristian Ciocaltea
2025-08-18 18:59 ` [PATCH v3 14/14] phy: rockchip: samsung-hdptx: Add HDMI 2.1 FRL support Cristian Ciocaltea
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