From: Zhi Wang <zhiw@nvidia.com>
To: Alexandre Courbot <acourbot@nvidia.com>
Cc: "Danilo Krummrich" <dakr@kernel.org>,
"Alice Ryhl" <aliceryhl@google.com>,
"Daniel Almeida" <daniel.almeida@collabora.com>,
"Miguel Ojeda" <ojeda@kernel.org>,
"Boqun Feng" <boqun.feng@gmail.com>,
"Gary Guo" <gary@garyguo.net>,
"Björn Roy Baron" <bjorn3_gh@protonmail.com>,
"Benno Lossin" <lossin@kernel.org>,
"Andreas Hindborg" <a.hindborg@kernel.org>,
"Trevor Gross" <tmgross@umich.edu>,
"Yury Norov" <yury.norov@gmail.com>,
"John Hubbard" <jhubbard@nvidia.com>,
"Alistair Popple" <apopple@nvidia.com>,
"Joel Fernandes" <joelagnelf@nvidia.com>,
"Timur Tabi" <ttabi@nvidia.com>, "Edwin Peer" <epeer@nvidia.com>,
"Eliot Courtney" <ecourtney@nvidia.com>,
"Dirk Behme" <dirk.behme@de.bosch.com>,
"Steven Price" <steven.price@arm.com>,
rust-for-linux@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v4 6/7] sample: rust: pci: use `register!` macro
Date: Wed, 28 Jan 2026 14:35:22 +0200 [thread overview]
Message-ID: <20260128143522.434f75f6.zhiw@nvidia.com> (raw)
In-Reply-To: <20260128-register-v4-6-aee3a33d9649@nvidia.com>
On Wed, 28 Jan 2026 11:37:32 +0900
Alexandre Courbot <acourbot@nvidia.com> wrote:
> Convert the direct IO accesses to properly defined registers.
>
Tested-by: Zhi Wang <zhiw@nvidia.com>
I can see the correct value of the registers read by the sample driver
from the demesg.
Additionally, Clippy was complaining about unnecssary unsafe blocks and
can be fixed by: (I haven't fully gone through the code, just applied this
for getting rid of the warnnings.)
diff --git a/rust/kernel/num/bounded.rs b/rust/kernel/num/bounded.rs
index 850827033f67..efabdd31ec37 100644
--- a/rust/kernel/num/bounded.rs
+++ b/rust/kernel/num/bounded.rs
@@ -503,9 +503,7 @@ pub fn cast<U>(self) -> Bounded<U, N>
pub fn shr<const SHIFT: u32, const RES: u32>(self) -> Bounded<T, RES>
{ const { assert!(RES >= N - SHIFT) }
- // SAFETY: We shift the value right by `SHIFT`, reducing the
number of bits needed to
- // represent the shifted value by as much, and just asserted that
`RES == N - SHIFT`.
- unsafe { Bounded::__new(self.0 >> SHIFT) }
+ Bounded::__new(self.0 >> SHIFT)
}
/// Left-shifts `self` by `SHIFT` and returns the result as a
`Bounded<_, RES>`, where `RES >= @@ -524,9 +522,7 @@ pub fn shr<const
SHIFT: u32, const RES: u32>(self) -> Bounded<T, RES> { pub fn
shl<const SHIFT: u32, const RES: u32>(self) -> Bounded<T, RES> {
const { assert!(RES >= N + SHIFT) }
- // SAFETY: We shift the value left by `SHIFT`, augmenting the
number of bits needed to
- // represent the shifted value by as much, and just asserted that
`RES == N + SHIFT`.
- unsafe { Bounded::__new(self.0 << SHIFT) }
+ Bounded::__new(self.0 << SHIFT)
}
}
Z.
> Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
> ---
> samples/rust/rust_driver_pci.rs | 23 ++++++++++++++++++-----
> 1 file changed, 18 insertions(+), 5 deletions(-)
>
> diff --git a/samples/rust/rust_driver_pci.rs
> b/samples/rust/rust_driver_pci.rs index 4dfb8a6a4707..df2232d6b71f 100644
> --- a/samples/rust/rust_driver_pci.rs
> +++ b/samples/rust/rust_driver_pci.rs
> @@ -70,24 +70,37 @@ fn testdev(index: &TestIndex, bar: &Bar0) ->
> Result<u32> { fn config_space(pdev: &pci::Device<Bound>) {
> let config = pdev.config_space();
>
> - // TODO: use the register!() macro for defining PCI
> configuration space registers once it
> - // has been move out of nova-core.
> + // Some PCI configuration space registers.
> + ::kernel::register! {
> + VENDOR_ID(u16) @ 0x0 {
> + 15:0 vendor_id;
> + }
> +
> + REVISION_ID(u8) @ 0x8 {
> + 7:0 revision_id;
> + }
> +
> + BAR(u32)[6] @ 0x10 {
> + 31:0 value;
> + }
> + }
> +
> dev_info!(
> pdev.as_ref(),
> "pci-testdev config space read8 rev ID: {:x}\n",
> - config.read8(0x8)
> + REVISION_ID::read(&&config).revision_id()
> );
>
> dev_info!(
> pdev.as_ref(),
> "pci-testdev config space read16 vendor ID: {:x}\n",
> - config.read16(0)
> + VENDOR_ID::read(&&config).vendor_id()
> );
>
> dev_info!(
> pdev.as_ref(),
> "pci-testdev config space read32 BAR 0: {:x}\n",
> - config.read32(0x10)
> + BAR::read(&&config, 0).value()
> );
> }
> }
>
next prev parent reply other threads:[~2026-01-28 12:35 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-01-28 2:37 [PATCH v4 0/7] rust: add " Alexandre Courbot
2026-01-28 2:37 ` [PATCH v4 1/7] rust: enable the `generic_arg_infer` feature Alexandre Courbot
2026-01-28 2:37 ` [PATCH v4 2/7] rust: num: add `shr` and `shl` methods to `Bounded` Alexandre Courbot
2026-01-28 15:38 ` Gary Guo
2026-01-28 2:37 ` [PATCH v4 3/7] rust: num: add `as_bool` method to `Bounded<_, 1>` Alexandre Courbot
2026-01-28 2:37 ` [PATCH v4 4/7] rust: num: add `into_inner` method to `Bounded` Alexandre Courbot
2026-01-28 15:43 ` Gary Guo
2026-01-29 8:05 ` Alexandre Courbot
2026-01-29 20:23 ` Gary Guo
2026-01-30 0:58 ` Alexandre Courbot
2026-01-28 2:37 ` [PATCH v4 5/7] rust: io: add `register!` macro Alexandre Courbot
2026-01-28 3:02 ` John Hubbard
2026-01-28 3:47 ` Joel Fernandes
2026-01-28 7:42 ` Alexandre Courbot
2026-01-28 17:56 ` Joel Fernandes
2026-01-29 11:59 ` Alexandre Courbot
2026-01-28 16:16 ` Gary Guo
2026-01-29 8:00 ` Alexandre Courbot
2026-01-29 14:10 ` Gary Guo
2026-01-29 21:08 ` Danilo Krummrich
2026-01-30 6:55 ` Alexandre Courbot
2026-01-30 16:14 ` Gary Guo
2026-01-30 16:44 ` Danilo Krummrich
2026-01-30 17:01 ` Gary Guo
2026-01-30 17:18 ` Danilo Krummrich
2026-01-29 12:48 ` Danilo Krummrich
2026-01-28 2:37 ` [PATCH v4 6/7] sample: rust: pci: use " Alexandre Courbot
2026-01-28 12:35 ` Zhi Wang [this message]
2026-01-28 13:27 ` Alexandre Courbot
2026-01-28 15:46 ` Gary Guo
2026-01-29 8:01 ` Alexandre Courbot
2026-01-31 1:06 ` Danilo Krummrich
2026-01-28 2:37 ` [PATCH FOR REFERENCE v4 7/7] gpu: nova-core: use the kernel " Alexandre Courbot
2026-01-28 2:57 ` John Hubbard
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