From: Claudiu Beznea <claudiu.beznea@kernel.org>
To: wsa+renesas@sang-engineering.com,
tommaso.merciai.xr@bp.renesas.com, alexandre.belloni@bootlin.com,
Frank.Li@nxp.com, p.zabel@pengutronix.de
Cc: claudiu.beznea@kernel.org, claudiu.beznea@tuxon.dev,
linux-i3c@lists.infradead.org, linux-kernel@vger.kernel.org,
linux-renesas-soc@vger.kernel.org,
Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>,
stable@vger.kernel.org
Subject: [PATCH 01/17] i3c: renesas: Check that the transfer is valid before accessing it
Date: Fri, 22 May 2026 13:17:59 +0300 [thread overview]
Message-ID: <20260522101815.1722909-2-claudiu.beznea@kernel.org> (raw)
In-Reply-To: <20260522101815.1722909-1-claudiu.beznea@kernel.org>
From: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
The Renesas I3C driver uses an asynchronous model to transfer data. It
prepares a struct renesas_i3c_xfer, enqueues it, and waits for completion.
The interrupt handler dequeues the transfer, updates/uses it, and signals
the waiting thread.
If the completion times out, the waiting thread dequeues the transfer and
free it. If an interrupt fires after that, the handler may access freed
memory, leading to crashes.
Check that the transfer is still valid before accessing it in the
interrupt handler.
Fixes: d028219a9f14 ("i3c: master: Add basic driver for the Renesas I3C controller")
Cc: stable@vger.kernel.org
Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
---
drivers/i3c/master/renesas-i3c.c | 17 +++++++++++++++++
1 file changed, 17 insertions(+)
diff --git a/drivers/i3c/master/renesas-i3c.c b/drivers/i3c/master/renesas-i3c.c
index f39c449922ca..36e3ccbe66b0 100644
--- a/drivers/i3c/master/renesas-i3c.c
+++ b/drivers/i3c/master/renesas-i3c.c
@@ -1014,6 +1014,9 @@ static irqreturn_t renesas_i3c_tx_isr(int irq, void *data)
scoped_guard(spinlock, &i3c->xferqueue.lock) {
xfer = i3c->xferqueue.cur;
+ if (!xfer)
+ return IRQ_HANDLED;
+
cmd = xfer->cmds;
if (xfer->is_i2c_xfer) {
@@ -1054,6 +1057,9 @@ static irqreturn_t renesas_i3c_resp_isr(int irq, void *data)
scoped_guard(spinlock, &i3c->xferqueue.lock) {
xfer = i3c->xferqueue.cur;
+ if (!xfer)
+ return IRQ_HANDLED;
+
cmd = xfer->cmds;
/* Clear the Respone Queue Full status flag*/
@@ -1138,6 +1144,9 @@ static irqreturn_t renesas_i3c_tend_isr(int irq, void *data)
scoped_guard(spinlock, &i3c->xferqueue.lock) {
xfer = i3c->xferqueue.cur;
+ if (!xfer)
+ return IRQ_HANDLED;
+
cmd = xfer->cmds;
if (xfer->is_i2c_xfer) {
@@ -1184,6 +1193,9 @@ static irqreturn_t renesas_i3c_rx_isr(int irq, void *data)
scoped_guard(spinlock, &i3c->xferqueue.lock) {
xfer = i3c->xferqueue.cur;
+ if (!xfer)
+ return IRQ_HANDLED;
+
cmd = xfer->cmds;
if (xfer->is_i2c_xfer) {
@@ -1235,6 +1247,8 @@ static irqreturn_t renesas_i3c_stop_isr(int irq, void *data)
scoped_guard(spinlock, &i3c->xferqueue.lock) {
xfer = i3c->xferqueue.cur;
+ if (!xfer)
+ return IRQ_HANDLED;
/* read back registers to confirm writes have fully propagated */
renesas_writel(i3c->regs, BST, 0);
@@ -1259,6 +1273,9 @@ static irqreturn_t renesas_i3c_start_isr(int irq, void *data)
scoped_guard(spinlock, &i3c->xferqueue.lock) {
xfer = i3c->xferqueue.cur;
+ if (!xfer)
+ return IRQ_HANDLED;
+
cmd = xfer->cmds;
if (xfer->is_i2c_xfer) {
--
2.43.0
next prev parent reply other threads:[~2026-05-22 10:18 UTC|newest]
Thread overview: 43+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-22 10:17 [PATCH 00/17] i3c: renesas: Suspend to RAM with power loss and runtime PM Claudiu Beznea
2026-05-22 10:17 ` Claudiu Beznea [this message]
2026-05-22 19:02 ` [PATCH 01/17] i3c: renesas: Check that the transfer is valid before accessing it Frank Li
2026-05-22 10:18 ` [PATCH 02/17] i3c: renesas: Use the divider 128 Claudiu Beznea
2026-05-22 19:06 ` Frank Li
2026-05-23 8:14 ` Claudiu Beznea
2026-05-22 10:18 ` [PATCH 03/17] i3c: renesas: Restore STDBR and EXTBR registers on resume Claudiu Beznea
2026-05-22 19:10 ` Frank Li
2026-05-28 8:29 ` Claudiu Beznea
2026-05-28 19:13 ` Frank Li
2026-05-22 10:18 ` [PATCH 04/17] i3c: renesas: Follow the reset deassert order used in probe Claudiu Beznea
2026-05-22 19:11 ` Frank Li
2026-05-22 10:18 ` [PATCH 05/17] i3c: renesas: Fix re-attach Claudiu Beznea
2026-05-22 19:13 ` Frank Li
2026-05-22 10:18 ` [PATCH 06/17] i3c: renesas: Reset the controller on resume Claudiu Beznea
2026-05-22 19:15 ` Frank Li
2026-05-23 10:24 ` Claudiu Beznea
2026-05-22 10:18 ` [PATCH 07/17] i3c: renesas: Perform Dynamic Address Assignment " Claudiu Beznea
2026-05-22 19:16 ` Frank Li
2026-05-23 10:26 ` Claudiu Beznea
2026-05-22 10:18 ` [PATCH 08/17] i3c: renesas: Clean DATBAS register on detach Claudiu Beznea
2026-05-22 19:17 ` Frank Li
2026-05-22 10:18 ` [PATCH 09/17] i3c: renesas: Use reset_control_bulk_{assert, deassert}() Claudiu Beznea
2026-05-22 19:19 ` Frank Li
2026-05-23 10:26 ` Claudiu Beznea
2026-05-22 10:18 ` [PATCH 10/17] i3c: renesas: Return immediately if there is nothing to transfer Claudiu Beznea
2026-05-22 19:20 ` Frank Li
2026-05-22 10:18 ` [PATCH 11/17] i3c: renesas: Follow a unified pattern for transfer and command initialization Claudiu Beznea
2026-05-22 19:21 ` Frank Li
2026-05-22 10:18 ` [PATCH 12/17] i3c: renesas: Drop the explicit memset() call Claudiu Beznea
2026-05-22 19:43 ` Frank Li
2026-05-22 10:18 ` [PATCH 13/17] i3c: renesas: Update HW registers after SW computations are done Claudiu Beznea
2026-05-22 19:48 ` Frank Li
2026-05-22 10:18 ` [PATCH 14/17] i3c: renesas: Organize structures to avoid unnecessary padding Claudiu Beznea
2026-05-22 19:50 ` Frank Li
2026-05-22 10:18 ` [PATCH 15/17] i3c: renesas: Use the "dev_name:irq_name" format for the interrupt name Claudiu Beznea
2026-05-22 19:51 ` Frank Li
2026-05-22 10:18 ` [PATCH 16/17] i3c: renesas: Drop unnecessary tab Claudiu Beznea
2026-05-22 19:52 ` Frank Li
2026-05-22 10:18 ` [PATCH 17/17] i3c: renesas: Add runtime PM support Claudiu Beznea
2026-05-22 20:01 ` Frank Li
2026-05-23 10:23 ` Claudiu Beznea
2026-06-02 11:49 ` Claudiu Beznea
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