From: Frank Li <Frank.li@nxp.com>
To: Claudiu Beznea <claudiu.beznea@kernel.org>
Cc: wsa+renesas@sang-engineering.com,
tommaso.merciai.xr@bp.renesas.com, alexandre.belloni@bootlin.com,
p.zabel@pengutronix.de, claudiu.beznea@tuxon.dev,
linux-i3c@lists.infradead.org, linux-kernel@vger.kernel.org,
linux-renesas-soc@vger.kernel.org,
Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Subject: Re: [PATCH 11/17] i3c: renesas: Follow a unified pattern for transfer and command initialization
Date: Fri, 22 May 2026 15:21:48 -0400 [thread overview]
Message-ID: <ahCszHJ5_IKCf75D@lizhi-Precision-Tower-5810> (raw)
In-Reply-To: <20260522101815.1722909-12-claudiu.beznea@kernel.org>
On Fri, May 22, 2026 at 01:18:09PM +0300, Claudiu Beznea wrote:
> From: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
>
> Follow a unified pattern for transfer and command initialization across
> the driver. This keeps the code cleaner and easier to follow. Also, in
> some cases the I3C device was enabled before the transfer data structure
> was even allocated.
>
> Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
> ---
Reviewed-by: Frank Li <Frank.Li@nxp.com>
> drivers/i3c/master/renesas-i3c.c | 22 +++++++++++-----------
> 1 file changed, 11 insertions(+), 11 deletions(-)
>
> diff --git a/drivers/i3c/master/renesas-i3c.c b/drivers/i3c/master/renesas-i3c.c
> index de75125eb013..12bf4797a70d 100644
> --- a/drivers/i3c/master/renesas-i3c.c
> +++ b/drivers/i3c/master/renesas-i3c.c
> @@ -648,6 +648,10 @@ static int renesas_i3c_daa(struct i3c_master_controller *m)
> if (!xfer)
> return -ENOMEM;
>
> + init_completion(&xfer->comp);
> + cmd = xfer->cmds;
> + cmd->rx_count = 0;
> +
> /* Enable I3C bus. */
> renesas_i3c_bus_enable(m, true);
>
> @@ -669,10 +673,6 @@ static int renesas_i3c_daa(struct i3c_master_controller *m)
> renesas_writel(i3c->regs, DATBAS(pos), datbas_dvdyad_with_parity(ret));
> }
>
> - init_completion(&xfer->comp);
> - cmd = xfer->cmds;
> - cmd->rx_count = 0;
> -
> ret = renesas_i3c_get_free_pos(i3c);
> if (ret < 0)
> return ret;
> @@ -760,13 +760,13 @@ static int renesas_i3c_send_ccc_cmd(struct i3c_master_controller *m,
> if (!xfer)
> return -ENOMEM;
>
> - renesas_i3c_bus_enable(m, true);
> -
> init_completion(&xfer->comp);
> cmd = xfer->cmds;
> cmd->rnw = ccc->rnw;
> cmd->cmd0 = 0;
>
> + renesas_i3c_bus_enable(m, true);
> +
> /* Calculate the command descriptor. */
> switch (ccc->id) {
> case I3C_CCC_SETDASA:
> @@ -816,15 +816,15 @@ static int renesas_i3c_i3c_xfers(struct i3c_dev_desc *dev, struct i3c_xfer *i3c_
> struct renesas_i3c_i2c_dev_data *data = i3c_dev_get_master_data(dev);
> int i;
>
> - /* Enable I3C bus. */
> - renesas_i3c_bus_enable(m, true);
> -
> struct renesas_i3c_xfer *xfer __free(kfree) = renesas_i3c_alloc_xfer(i3c, 1);
> if (!xfer)
> return -ENOMEM;
>
> init_completion(&xfer->comp);
>
> + /* Enable I3C bus. */
> + renesas_i3c_bus_enable(m, true);
> +
> for (i = 0; i < i3c_nxfers; i++) {
> struct renesas_i3c_cmd *cmd = xfer->cmds;
>
> @@ -947,12 +947,12 @@ static int renesas_i3c_i2c_xfers(struct i2c_dev_desc *dev,
> if (!xfer)
> return -ENOMEM;
>
> - renesas_i3c_bus_enable(m, false);
> -
> init_completion(&xfer->comp);
> xfer->is_i2c_xfer = true;
> cmd = xfer->cmds;
>
> + renesas_i3c_bus_enable(m, false);
> +
> if (!(renesas_readl(i3c->regs, BCST) & BCST_BFREF)) {
> cmd->err = -EBUSY;
> return cmd->err;
> --
> 2.43.0
>
next prev parent reply other threads:[~2026-05-22 19:21 UTC|newest]
Thread overview: 43+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-22 10:17 [PATCH 00/17] i3c: renesas: Suspend to RAM with power loss and runtime PM Claudiu Beznea
2026-05-22 10:17 ` [PATCH 01/17] i3c: renesas: Check that the transfer is valid before accessing it Claudiu Beznea
2026-05-22 19:02 ` Frank Li
2026-05-22 10:18 ` [PATCH 02/17] i3c: renesas: Use the divider 128 Claudiu Beznea
2026-05-22 19:06 ` Frank Li
2026-05-23 8:14 ` Claudiu Beznea
2026-05-22 10:18 ` [PATCH 03/17] i3c: renesas: Restore STDBR and EXTBR registers on resume Claudiu Beznea
2026-05-22 19:10 ` Frank Li
2026-05-28 8:29 ` Claudiu Beznea
2026-05-28 19:13 ` Frank Li
2026-05-22 10:18 ` [PATCH 04/17] i3c: renesas: Follow the reset deassert order used in probe Claudiu Beznea
2026-05-22 19:11 ` Frank Li
2026-05-22 10:18 ` [PATCH 05/17] i3c: renesas: Fix re-attach Claudiu Beznea
2026-05-22 19:13 ` Frank Li
2026-05-22 10:18 ` [PATCH 06/17] i3c: renesas: Reset the controller on resume Claudiu Beznea
2026-05-22 19:15 ` Frank Li
2026-05-23 10:24 ` Claudiu Beznea
2026-05-22 10:18 ` [PATCH 07/17] i3c: renesas: Perform Dynamic Address Assignment " Claudiu Beznea
2026-05-22 19:16 ` Frank Li
2026-05-23 10:26 ` Claudiu Beznea
2026-05-22 10:18 ` [PATCH 08/17] i3c: renesas: Clean DATBAS register on detach Claudiu Beznea
2026-05-22 19:17 ` Frank Li
2026-05-22 10:18 ` [PATCH 09/17] i3c: renesas: Use reset_control_bulk_{assert, deassert}() Claudiu Beznea
2026-05-22 19:19 ` Frank Li
2026-05-23 10:26 ` Claudiu Beznea
2026-05-22 10:18 ` [PATCH 10/17] i3c: renesas: Return immediately if there is nothing to transfer Claudiu Beznea
2026-05-22 19:20 ` Frank Li
2026-05-22 10:18 ` [PATCH 11/17] i3c: renesas: Follow a unified pattern for transfer and command initialization Claudiu Beznea
2026-05-22 19:21 ` Frank Li [this message]
2026-05-22 10:18 ` [PATCH 12/17] i3c: renesas: Drop the explicit memset() call Claudiu Beznea
2026-05-22 19:43 ` Frank Li
2026-05-22 10:18 ` [PATCH 13/17] i3c: renesas: Update HW registers after SW computations are done Claudiu Beznea
2026-05-22 19:48 ` Frank Li
2026-05-22 10:18 ` [PATCH 14/17] i3c: renesas: Organize structures to avoid unnecessary padding Claudiu Beznea
2026-05-22 19:50 ` Frank Li
2026-05-22 10:18 ` [PATCH 15/17] i3c: renesas: Use the "dev_name:irq_name" format for the interrupt name Claudiu Beznea
2026-05-22 19:51 ` Frank Li
2026-05-22 10:18 ` [PATCH 16/17] i3c: renesas: Drop unnecessary tab Claudiu Beznea
2026-05-22 19:52 ` Frank Li
2026-05-22 10:18 ` [PATCH 17/17] i3c: renesas: Add runtime PM support Claudiu Beznea
2026-05-22 20:01 ` Frank Li
2026-05-23 10:23 ` Claudiu Beznea
2026-06-02 11:49 ` Claudiu Beznea
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