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From: Will Deacon <will@kernel.org>
To: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org, "Will Deacon" <will@kernel.org>,
	"Thomas Gleixner" <tglx@kernel.org>,
	"Ben Horgan" <ben.horgan@arm.com>,
	"Ștefania Ion" <stefion@google.com>,
	"Catalin Marinas" <catalin.marinas@arm.com>,
	"Pankaj Patil" <pankaj.patil@oss.qualcomm.com>,
	"Borislav Petkov" <bp@alien8.de>,
	"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
	"Jinjie Ruan" <ruanjinjie@huawei.com>,
	"Mark Rutland" <mark.rutland@arm.com>,
	"Tarun Sahu" <tarunsahu@google.com>,
	"Fuad Tabba" <fuad.tabba@linux.dev>,
	"David Woodhouse" <dwmw@amazon.co.uk>,
	"Peter Zijlstra" <peterz@infradead.org>,
	"Marc Zyngier" <maz@kernel.org>
Subject: [PATCH v2 14/23] arm64: smp: Use generic HOTPLUG_CORE_SYNC_FULL machinery for CPU onlining
Date: Fri,  9 Oct 2026 11:07:25 +0100	[thread overview]
Message-ID: <20261009100738.31288-15-will@kernel.org> (raw)
In-Reply-To: <20261009100738.31288-1-will@kernel.org>

Select HOTPLUG_CORE_SYNC_FULL on arm64 to replace the 'cpu_running'
completion with the generic code for synchronising with secondary CPUs
during boot.

Reviewed-by: Jinjie Ruan <ruanjinjie@huawei.com>
Signed-off-by: Will Deacon <will@kernel.org>
---
 arch/arm64/Kconfig           |  2 +-
 arch/arm64/include/asm/smp.h |  1 -
 arch/arm64/kernel/smp.c      | 39 +++++++++++++++++-------------------
 3 files changed, 19 insertions(+), 23 deletions(-)

diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index b5a51b0ef944..89d1f0f2269c 100644
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@ -230,7 +230,7 @@ config ARM64
 	select HAVE_SYSCALL_TRACEPOINTS
 	select HAVE_KPROBES
 	select HAVE_KRETPROBES
-	select HOTPLUG_CORE_SYNC_DEAD if HOTPLUG_CPU
+	select HOTPLUG_CORE_SYNC_FULL
 	select HOTPLUG_SMT if HOTPLUG_CPU
 	select IRQ_DOMAIN
 	select IRQ_FORCED_THREADING
diff --git a/arch/arm64/include/asm/smp.h b/arch/arm64/include/asm/smp.h
index 10ea4f543069..fe343c30d620 100644
--- a/arch/arm64/include/asm/smp.h
+++ b/arch/arm64/include/asm/smp.h
@@ -12,7 +12,6 @@
 #define CPU_BOOT_STATUS_MASK		((UL(1) << CPU_STUCK_REASON_SHIFT) - 1)
 
 #define CPU_MMU_OFF			(-1)
-#define CPU_BOOT_SUCCESS		(0)
 /* The cpu invoked ops->cpu_die, synchronise it with cpu_kill */
 #define CPU_KILL_ME			(1)
 /* The cpu couldn't die gracefully and is looping in the kernel */
diff --git a/arch/arm64/kernel/smp.c b/arch/arm64/kernel/smp.c
index 014b163ce658..d83ba5bbfd37 100644
--- a/arch/arm64/kernel/smp.c
+++ b/arch/arm64/kernel/smp.c
@@ -108,12 +108,9 @@ static int boot_secondary(unsigned int cpu, struct task_struct *idle)
 	return -EOPNOTSUPP;
 }
 
-static DECLARE_COMPLETION(cpu_running);
-
 int __cpu_up(unsigned int cpu, struct task_struct *idle)
 {
 	int ret;
-	long status;
 
 	/*
 	 * We need to tell the secondary core where to find its stack and the
@@ -124,27 +121,24 @@ int __cpu_up(unsigned int cpu, struct task_struct *idle)
 
 	/* Now bring the CPU into our world */
 	ret = boot_secondary(cpu, idle);
-	if (ret) {
-		if (ret != -EPERM)
-			pr_err("CPU%u: failed to boot: %d\n", cpu, ret);
-		return ret;
-	}
+	if (ret && ret != -EPERM)
+		pr_err("CPU%u: failed to boot: %d\n", cpu, ret);
+	return ret;
+}
 
-	/*
-	 * CPU was successfully started, wait for it to come online or
-	 * time out.
-	 */
-	wait_for_completion_timeout(&cpu_running,
-				    msecs_to_jiffies(5000));
-	if (cpu_online(cpu))
-		return 0;
+void arch_cpuhp_cleanup_kick_cpu(unsigned int cpu, bool is_alive)
+{
+	long status;
+
+	if (is_alive)
+		return;
 
-	pr_crit("CPU%u: failed to come online\n", cpu);
 	secondary_data.task = NULL;
 	status = READ_ONCE(secondary_data.status);
 	if (status == CPU_MMU_OFF)
 		status = READ_ONCE(__early_cpu_boot_status);
 
+	/* A CPU has failed to boot. Try to figure out what happened. */
 	switch (status & CPU_BOOT_STATUS_MASK) {
 	default:
 		pr_err("CPU%u: failed in unknown state : 0x%lx\n",
@@ -171,8 +165,6 @@ int __cpu_up(unsigned int cpu, struct task_struct *idle)
 	case CPU_PANIC_KERNEL:
 		panic("CPU%u detected unsupported configuration\n", cpu);
 	}
-
-	return -EIO;
 }
 
 static void init_gic_priority_masking(void)
@@ -234,6 +226,13 @@ asmlinkage notrace void secondary_start_kernel(void)
 	 * Log the CPU info before it is marked online and might get read.
 	 */
 	cpuinfo_store_cpu();
+
+	/*
+	 * Synchronise with the core bringing us online so that it knows
+	 * we made it into the kernel. We're still not 'online'.
+	 */
+	cpuhp_ap_sync_alive();
+
 	rcutree_report_cpu_starting(cpu);
 	update_cpu_features(cpu);
 	store_cpu_topology(cpu);
@@ -256,9 +255,7 @@ asmlinkage notrace void secondary_start_kernel(void)
 	pr_info("CPU%u: Booted secondary processor 0x%010lx [0x%08x]\n",
 					 cpu, (unsigned long)mpidr,
 					 read_cpuid_id());
-	update_cpu_boot_status(CPU_BOOT_SUCCESS);
 	set_cpu_online(cpu, true);
-	complete(&cpu_running);
 
 	/*
 	 * Secondary CPUs enter the kernel with all DAIF exceptions masked.
-- 
2.56.0.385.gd3acb90ef8-goog


  parent reply	other threads:[~2026-10-09 10:08 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-10-09 10:07 [PATCH v2 00/23] arm64: Implement parallel CPU onlining with PSCI v0.2+ Will Deacon
2026-10-09 10:07 ` [PATCH v2 01/23] cpu/hotplug: Clean up cmpxchg() logic in cpuhp_can_boot_ap() Will Deacon
2026-10-09 10:07 ` [PATCH v2 02/23] cpu/hotplug: Avoid trying to bring up CPUs that are already online Will Deacon
2026-10-09 10:07 ` [PATCH v2 03/23] cpu/hotplug: Avoid busy-polling on archs where cpu_relax() is a no-op Will Deacon
2026-10-09 10:46   ` David Woodhouse
2026-10-09 11:07     ` Will Deacon
2026-10-09 10:07 ` [PATCH v2 04/23] cpu/hotplug: Propagate bring-up status to arch_cpuhp_cleanup_kick_cpu() Will Deacon
2026-10-09 10:07 ` [PATCH v2 05/23] arm64: cpufeature: Check arm64_ftr_regs[] before the first store Will Deacon
2026-10-09 10:07 ` [PATCH v2 06/23] arm64: cpufeature: Add read_cpuid_with_overrides() Will Deacon
2026-10-09 10:07 ` [PATCH v2 07/23] arm64: cpufeature: Read MPAMIDR_EL1 in __cpuinfo_store_cpu() Will Deacon
2026-10-09 15:44   ` Ben Horgan
2026-10-09 10:07 ` [PATCH v2 08/23] arm64: cpufeature: Store every ID register with its overrides applied Will Deacon
2026-10-09 15:51   ` Ben Horgan
2026-10-09 10:07 ` [PATCH v2 09/23] arm64: smp: Tidy up smp_prepare_cpus() Will Deacon
2026-10-09 10:07 ` [PATCH v2 10/23] arm64: smp: Tidy up cpuinfo init and cpufeature updates Will Deacon
2026-10-09 10:07 ` [PATCH v2 11/23] arm64: smp: Defer update of secondary CPU capabilities Will Deacon
2026-10-09 10:07 ` [PATCH v2 12/23] arm64: smp: Don't bother printing the I-cache policy for each CPU Will Deacon
2026-10-09 10:07 ` [PATCH v2 13/23] arm64: smp: Defer RCU registration during secondary CPU bringup Will Deacon
2026-10-09 10:07 ` Will Deacon [this message]
2026-10-09 10:07 ` [PATCH v2 15/23] arm64: smp: Use generic HOTPLUG_SPLIT_STARTUP machinery for CPU onlining Will Deacon
2026-10-09 10:07 ` [PATCH v2 16/23] arm64: cpu_ops: Make 'cpu_operations' pointer global instead of per-cpu Will Deacon
2026-10-09 10:07 ` [PATCH v2 17/23] arm64: cpu_ops: Introduce get_secondary_cpu_ops() Will Deacon
2026-10-09 10:07 ` [PATCH v2 18/23] firmware/psci: Cache PSCI v0.2+ version number to avoid redundant SMCs Will Deacon
2026-10-09 10:07 ` [PATCH v2 19/23] firmware/psci: Extend ->cpu_on() callback to take an additional argument Will Deacon
2026-10-09 10:07 ` [PATCH v2 20/23] arm64: cpu_ops: Expose optional argument to target cpu in ->cpu_boot() Will Deacon
2026-10-09 10:07 ` [PATCH v2 21/23] arm64: smp: Pass secondary CPU boot parameters via firmware if possible Will Deacon
2026-10-09 10:07 ` [PATCH v2 22/23] arm64: smp: Use generic HOTPLUG_PARALLEL machinery for CPU onlining Will Deacon
2026-10-09 10:07 ` [PATCH v2 23/23] arm64: smp: Harden parallel CPU bringup against broken PSCI firmware Will Deacon

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