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From: Will Deacon <will@kernel.org>
To: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org, "Will Deacon" <will@kernel.org>,
	"Thomas Gleixner" <tglx@kernel.org>,
	"Ben Horgan" <ben.horgan@arm.com>,
	"Ștefania Ion" <stefion@google.com>,
	"Catalin Marinas" <catalin.marinas@arm.com>,
	"Pankaj Patil" <pankaj.patil@oss.qualcomm.com>,
	"Borislav Petkov" <bp@alien8.de>,
	"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
	"Jinjie Ruan" <ruanjinjie@huawei.com>,
	"Mark Rutland" <mark.rutland@arm.com>,
	"Tarun Sahu" <tarunsahu@google.com>,
	"Fuad Tabba" <fuad.tabba@linux.dev>,
	"David Woodhouse" <dwmw@amazon.co.uk>,
	"Peter Zijlstra" <peterz@infradead.org>,
	"Marc Zyngier" <maz@kernel.org>
Subject: [PATCH v2 03/23] cpu/hotplug: Avoid busy-polling on archs where cpu_relax() is a no-op
Date: Fri,  9 Oct 2026 11:07:14 +0100	[thread overview]
Message-ID: <20261009100738.31288-4-will@kernel.org> (raw)
In-Reply-To: <20261009100738.31288-1-will@kernel.org>

On some architectures (such as arm64), cpu_relax() is effectively a NOP
and so isn't particularly efficient when used in a tight polling loop
such as the CPU state synchronisation in cpuhp_ap_sync_alive().

Once an incoming CPU has reached the SYNC_STATE_ALIVE state, we know
that it is executing within the kernel and so we can use the more
efficient polling mechanism provided by the atomic_cond_read* API,
allowing the use of WFE on arm64 and Zawrs on RISC-V.

Change cpuhp_ap_sync_alive() to poll using atomic_cond_read_relaxed()
instead of cpu_relax(). No change on x86.

Reviewed-by: Jinjie Ruan <ruanjinjie@huawei.com>
Signed-off-by: Will Deacon <will@kernel.org>
---
 kernel/cpu.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/kernel/cpu.c b/kernel/cpu.c
index 97a9bfe4edad..786c3191431c 100644
--- a/kernel/cpu.c
+++ b/kernel/cpu.c
@@ -395,8 +395,7 @@ void cpuhp_ap_sync_alive(void)
 	cpuhp_ap_update_sync_state(SYNC_STATE_ALIVE);
 
 	/* Wait for the control CPU to release it. */
-	while (atomic_read(st) != SYNC_STATE_SHOULD_ONLINE)
-		cpu_relax();
+	atomic_cond_read_acquire(st, VAL == SYNC_STATE_SHOULD_ONLINE);
 }
 
 static bool cpuhp_can_boot_ap(unsigned int cpu)
-- 
2.56.0.385.gd3acb90ef8-goog


  parent reply	other threads:[~2026-10-09 10:07 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-10-09 10:07 [PATCH v2 00/23] arm64: Implement parallel CPU onlining with PSCI v0.2+ Will Deacon
2026-10-09 10:07 ` [PATCH v2 01/23] cpu/hotplug: Clean up cmpxchg() logic in cpuhp_can_boot_ap() Will Deacon
2026-10-09 10:07 ` [PATCH v2 02/23] cpu/hotplug: Avoid trying to bring up CPUs that are already online Will Deacon
2026-10-09 10:07 ` Will Deacon [this message]
2026-10-09 10:46   ` [PATCH v2 03/23] cpu/hotplug: Avoid busy-polling on archs where cpu_relax() is a no-op David Woodhouse
2026-10-09 11:07     ` Will Deacon
2026-10-09 10:07 ` [PATCH v2 04/23] cpu/hotplug: Propagate bring-up status to arch_cpuhp_cleanup_kick_cpu() Will Deacon
2026-10-09 10:07 ` [PATCH v2 05/23] arm64: cpufeature: Check arm64_ftr_regs[] before the first store Will Deacon
2026-10-09 10:07 ` [PATCH v2 06/23] arm64: cpufeature: Add read_cpuid_with_overrides() Will Deacon
2026-10-09 10:07 ` [PATCH v2 07/23] arm64: cpufeature: Read MPAMIDR_EL1 in __cpuinfo_store_cpu() Will Deacon
2026-10-09 15:44   ` Ben Horgan
2026-10-09 10:07 ` [PATCH v2 08/23] arm64: cpufeature: Store every ID register with its overrides applied Will Deacon
2026-10-09 15:51   ` Ben Horgan
2026-10-09 10:07 ` [PATCH v2 09/23] arm64: smp: Tidy up smp_prepare_cpus() Will Deacon
2026-10-09 10:07 ` [PATCH v2 10/23] arm64: smp: Tidy up cpuinfo init and cpufeature updates Will Deacon
2026-10-09 10:07 ` [PATCH v2 11/23] arm64: smp: Defer update of secondary CPU capabilities Will Deacon
2026-10-09 10:07 ` [PATCH v2 12/23] arm64: smp: Don't bother printing the I-cache policy for each CPU Will Deacon
2026-10-09 10:07 ` [PATCH v2 13/23] arm64: smp: Defer RCU registration during secondary CPU bringup Will Deacon
2026-10-09 10:07 ` [PATCH v2 14/23] arm64: smp: Use generic HOTPLUG_CORE_SYNC_FULL machinery for CPU onlining Will Deacon
2026-10-09 10:07 ` [PATCH v2 15/23] arm64: smp: Use generic HOTPLUG_SPLIT_STARTUP " Will Deacon
2026-10-09 10:07 ` [PATCH v2 16/23] arm64: cpu_ops: Make 'cpu_operations' pointer global instead of per-cpu Will Deacon
2026-10-09 10:07 ` [PATCH v2 17/23] arm64: cpu_ops: Introduce get_secondary_cpu_ops() Will Deacon
2026-10-09 10:07 ` [PATCH v2 18/23] firmware/psci: Cache PSCI v0.2+ version number to avoid redundant SMCs Will Deacon
2026-10-09 10:07 ` [PATCH v2 19/23] firmware/psci: Extend ->cpu_on() callback to take an additional argument Will Deacon
2026-10-09 10:07 ` [PATCH v2 20/23] arm64: cpu_ops: Expose optional argument to target cpu in ->cpu_boot() Will Deacon
2026-10-09 10:07 ` [PATCH v2 21/23] arm64: smp: Pass secondary CPU boot parameters via firmware if possible Will Deacon
2026-10-09 10:07 ` [PATCH v2 22/23] arm64: smp: Use generic HOTPLUG_PARALLEL machinery for CPU onlining Will Deacon
2026-10-09 10:07 ` [PATCH v2 23/23] arm64: smp: Harden parallel CPU bringup against broken PSCI firmware Will Deacon

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