* [PATCH] scsi: ufs: qcom: Reprogram ESI after a host controller reset
@ 2026-10-22 16:50 Joonhoe Kim
2026-10-23 7:45 ` Konrad Dybcio
0 siblings, 1 reply; 3+ messages in thread
From: Joonhoe Kim @ 2026-10-22 16:50 UTC (permalink / raw)
To: mani, mkp
Cc: James.Bottomley, bvanassche, linux-arm-msm, linux-scsi, linux-kernel
ufs_qcom_config_esi() returns early once the ESI interrupts are set up.
ufshcd_config_mcq() also calls it after every host controller reset,
which clears the ESI base address, the vector mask and ESI enable. After
the error handler has reset the controller, the completions then arrive
only on the legacy interrupt while mcq_esi_enabled stays set.
Allocate the MSIs and request their interrupts only once, but program
the ESI registers on every call. The MSI message is not cached for
platform MSIs, so keep the one written at allocation.
Fixes: 519b6274a777 ("scsi: ufs: qcom: Add MCQ ESI config vendor specific ops")
Signed-off-by: Joonhoe Kim <26rote@gmail.com>
---
Tested on a Lenovo Y700 Gen 5 (TB323FU, Kaanapali; out-of-tree board
support) on v7.3-rc4 with commit b52d695d0620 ("scsi: ufs: core: Keep
internal commands dispatchable during error handling") applied, forcing
a full reset through the debugfs saved_err file: before,
REG_UFS_MEM_CFG, ESILBA and ESIUBA read 0 after the reset and all
completions came on the legacy interrupt; with this patch they come on
the ESI interrupts again.
drivers/ufs/host/ufs-qcom.c | 12 +++++++++---
drivers/ufs/host/ufs-qcom.h | 2 ++
2 files changed, 11 insertions(+), 3 deletions(-)
diff --git a/drivers/ufs/host/ufs-qcom.c b/drivers/ufs/host/ufs-qcom.c
index fee9b54ba5e1..ea2a106cbe26 100644
--- a/drivers/ufs/host/ufs-qcom.c
+++ b/drivers/ufs/host/ufs-qcom.c
@@ -2414,7 +2414,9 @@ static void ufs_qcom_write_msi_msg(struct msi_desc *desc, struct msi_msg *msg)
{
struct device *dev = msi_desc_to_dev(desc);
struct ufs_hba *hba = dev_get_drvdata(dev);
+ struct ufs_qcom_host *host = ufshcd_get_variant(hba);
+ host->esi_msg = *msg;
ufshcd_mcq_config_esi(hba, msg);
}
@@ -2442,8 +2444,10 @@ static int ufs_qcom_config_esi(struct ufs_hba *hba)
struct ufs_qcom_irq *qi;
int nr_irqs, ret;
- if (host->esi_enabled)
- return 0;
+ if (host->esi_enabled) {
+ ufshcd_mcq_config_esi(hba, &host->esi_msg);
+ goto enable;
+ }
/*
* 1. We only handle CQs as of now.
@@ -2481,12 +2485,14 @@ static int ufs_qcom_config_esi(struct ufs_hba *hba)
}
}
+ host->esi_enabled = true;
+
+enable:
if (host->hw_ver.major >= 6) {
ufshcd_rmwl(hba, ESI_VEC_MASK, FIELD_PREP(ESI_VEC_MASK, MAX_ESI_VEC - 1),
REG_UFS_CFG3);
}
ufshcd_mcq_enable_esi(hba);
- host->esi_enabled = true;
return 0;
}
diff --git a/drivers/ufs/host/ufs-qcom.h b/drivers/ufs/host/ufs-qcom.h
index 944b2e532a09..d2647695abe3 100644
--- a/drivers/ufs/host/ufs-qcom.h
+++ b/drivers/ufs/host/ufs-qcom.h
@@ -5,6 +5,7 @@
#ifndef UFS_QCOM_H_
#define UFS_QCOM_H_
+#include <linux/msi.h>
#include <linux/reset-controller.h>
#include <linux/reset.h>
#include <soc/qcom/ice.h>
@@ -360,6 +361,7 @@ struct ufs_qcom_host {
u32 phy_gear;
bool esi_enabled;
+ struct msi_msg esi_msg;
u32 saved_tx_eq_g1_setting;
u32 boot_spare_cfg;
base-commit: 2efb7a11f1aa4d2dc285fe2680cca22cb9f72f64
--
2.43.0
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH] scsi: ufs: qcom: Reprogram ESI after a host controller reset
2026-10-22 16:50 [PATCH] scsi: ufs: qcom: Reprogram ESI after a host controller reset Joonhoe Kim
@ 2026-10-23 7:45 ` Konrad Dybcio
2026-10-23 12:34 ` Joonhoe Kim
0 siblings, 1 reply; 3+ messages in thread
From: Konrad Dybcio @ 2026-10-23 7:45 UTC (permalink / raw)
To: Joonhoe Kim, mani, mkp
Cc: James.Bottomley, bvanassche, linux-arm-msm, linux-scsi, linux-kernel
On 10/22/26 6:50 PM, Joonhoe Kim wrote:
> ufs_qcom_config_esi() returns early once the ESI interrupts are set up.
> ufshcd_config_mcq() also calls it after every host controller reset,
> which clears the ESI base address, the vector mask and ESI enable. After
> the error handler has reset the controller, the completions then arrive
> only on the legacy interrupt while mcq_esi_enabled stays set.
>
> Allocate the MSIs and request their interrupts only once, but program
> the ESI registers on every call. The MSI message is not cached for
> platform MSIs, so keep the one written at allocation.
>
> Fixes: 519b6274a777 ("scsi: ufs: qcom: Add MCQ ESI config vendor specific ops")
> Signed-off-by: Joonhoe Kim <26rote@gmail.com>
> ---
I'm not sure it's related, but with this change, do you still need
https://lore.kernel.org/linux-arm-msm/20261007143716.2161-1-26rote@gmail.com/
?
Konrad
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH] scsi: ufs: qcom: Reprogram ESI after a host controller reset
2026-10-23 7:45 ` Konrad Dybcio
@ 2026-10-23 12:34 ` Joonhoe Kim
0 siblings, 0 replies; 3+ messages in thread
From: Joonhoe Kim @ 2026-10-23 12:34 UTC (permalink / raw)
To: Konrad Dybcio
Cc: mani, mkp, James.Bottomley, bvanassche, linux-arm-msm,
linux-scsi, linux-kernel
On 10/23/26 9:45 AM, Konrad Dybcio wrote:
> I'm not sure it's related, but with this change, do you still need
>
> https://lore.kernel.org/linux-arm-msm/20261007143716.2161-1-26rote@gmail.com/
>
> ?
Yes, they fix different problems.
With MCQ enabled (which needs DT changes not yet upstream for
Kaanapali) and without FORCE_MEM_CORE_ON on the UFS PHY AXI clock, the
MCQ configuration is not retained over s2idle. The first command after
resume then triggers an SMMU fault and the error handler resets the
host; on my device that happened on almost every resume. With the clock
patch the configuration is retained, and I have not seen a reset over
s2idle since.
This patch is about any host reset, e.g. from the error handler after a
UIC error: the reset clears the ESI registers, and ufs_qcom_config_esi()
does not program them again, so completions fall back to the legacy
interrupt. It does nothing about the s2idle faults themselves.
Thanks,
Joonhoe Kim
^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, other threads:[~2026-10-23 12:34 UTC | newest]
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2026-10-22 16:50 [PATCH] scsi: ufs: qcom: Reprogram ESI after a host controller reset Joonhoe Kim
2026-10-23 7:45 ` Konrad Dybcio
2026-10-23 12:34 ` Joonhoe Kim
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