From: Anusha Arun Nandi <anusha.nandi@oss.qualcomm.com>
To: Bryan O'Donoghue <bod@kernel.org>
Cc: Vinod Koul <vkoul@kernel.org>,
Neil Armstrong <neil.armstrong@linaro.org>,
Manivannan Sadhasivam <mani@kernel.org>,
gjorgji.rosikopulos@oss.qualcomm.com,
hariram.purushothaman@oss.qualcomm.com, akapatra@quicinc.com,
jigarkumar.zala@oss.qualcomm.com, linux-phy@lists.infradead.org,
linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: [PATCH v2 2/5] phy: qcom-mipi-csi2: Make timer and OPP clock names configurable
Date: Tue, 3 Nov 2026 13:41:02 -0800 [thread overview]
Message-ID: <20261103214105.3605181-3-anusha.nandi@oss.qualcomm.com> (raw)
In-Reply-To: <20261103214105.3605181-1-anusha.nandi@oss.qualcomm.com>
The timer-clock lookup in phy_qcom_mipi_csi2_probe() and the OPP
clkname passed to devm_pm_opp_set_clkname() were both hardcoded
string literals sized to x1e80100 ("timer"/"core"). Add
timer_clk_name/opp_clk_name to struct mipi_csi2phy_soc_cfg so each
SoC can declare its own clock-name strings instead.
x1e80100's soc_cfg now declares "timer"/"core" explicitly; no
behaviour change.
Reviewed-by: Jigarkumar Zala <jigarkumar.zala@oss.qualcomm.com>
Signed-off-by: Anusha Arun Nandi <anusha.nandi@oss.qualcomm.com>
---
drivers/phy/qualcomm/phy-qcom-mipi-csi2-3ph-dphy.c | 2 ++
drivers/phy/qualcomm/phy-qcom-mipi-csi2-core.c | 4 ++--
drivers/phy/qualcomm/phy-qcom-mipi-csi2.h | 3 +++
3 files changed, 7 insertions(+), 2 deletions(-)
diff --git a/drivers/phy/qualcomm/phy-qcom-mipi-csi2-3ph-dphy.c b/drivers/phy/qualcomm/phy-qcom-mipi-csi2-3ph-dphy.c
index 966d79c98f9b..8f1939e81e13 100644
--- a/drivers/phy/qualcomm/phy-qcom-mipi-csi2-3ph-dphy.c
+++ b/drivers/phy/qualcomm/phy-qcom-mipi-csi2-3ph-dphy.c
@@ -380,6 +380,8 @@ const struct mipi_csi2phy_soc_cfg mipi_csi2_dphy_4nm_x1e = {
.num_supplies = ARRAY_SIZE(x1e_supplies),
.clk_names = (const char **)x1e_clks,
.num_clk = ARRAY_SIZE(x1e_clks),
+ .timer_clk_name = "timer",
+ .opp_clk_name = "core",
.genpds = x1e_genpds,
.num_genpds = ARRAY_SIZE(x1e_genpds),
};
diff --git a/drivers/phy/qualcomm/phy-qcom-mipi-csi2-core.c b/drivers/phy/qualcomm/phy-qcom-mipi-csi2-core.c
index 269232499fca..3de25728ed28 100644
--- a/drivers/phy/qualcomm/phy-qcom-mipi-csi2-core.c
+++ b/drivers/phy/qualcomm/phy-qcom-mipi-csi2-core.c
@@ -397,7 +397,7 @@ static int phy_qcom_mipi_csi2_probe(struct platform_device *pdev)
if (!csi2phy->clks[i].id)
return dev_err_probe(dev, -EINVAL, "Missing clock-names\n");
- if (!strcmp(csi2phy->clks[i].id, "timer")) {
+ if (!strcmp(csi2phy->clks[i].id, csi2phy->soc_cfg->timer_clk_name)) {
csi2phy->timer_clk = csi2phy->clks[i].clk;
break;
}
@@ -405,7 +405,7 @@ static int phy_qcom_mipi_csi2_probe(struct platform_device *pdev)
if (!csi2phy->timer_clk)
return dev_err_probe(dev, -ENODEV, "no timer clock\n");
- ret = devm_pm_opp_set_clkname(dev, "core");
+ ret = devm_pm_opp_set_clkname(dev, csi2phy->soc_cfg->opp_clk_name);
if (ret)
return dev_err_probe(dev, ret, "Failed to set opp clkname\n");
diff --git a/drivers/phy/qualcomm/phy-qcom-mipi-csi2.h b/drivers/phy/qualcomm/phy-qcom-mipi-csi2.h
index 7e55ae007370..359b58660db8 100644
--- a/drivers/phy/qualcomm/phy-qcom-mipi-csi2.h
+++ b/drivers/phy/qualcomm/phy-qcom-mipi-csi2.h
@@ -68,6 +68,9 @@ struct mipi_csi2phy_soc_cfg {
const char ** const clk_names;
const unsigned int num_clk;
+ const char * const timer_clk_name;
+ const char * const opp_clk_name;
+
const struct mipi_csi2_genpd *genpds;
const unsigned int num_genpds;
};
--
2.34.1
next prev parent reply other threads:[~2026-11-03 21:41 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-11-03 21:41 [PATCH v2 0/5] phy: qcom-mipi-csi2: Add D-PHY support for sa8775p, qcs8300 and sc7280 Anusha Arun Nandi
2026-11-03 21:41 ` [PATCH v2 1/5] dt-bindings: phy: qcom: Add common qcom,csi2-phy Anusha Arun Nandi
2026-11-03 21:41 ` Anusha Arun Nandi [this message]
2026-11-03 21:41 ` [PATCH v2 3/5] phy: qcom-mipi-csi2: Make OPP table optional Anusha Arun Nandi
2026-11-03 21:41 ` [PATCH v2 4/5] phy: qcom-mipi-csi2: Add sa8775p D-PHY support Anusha Arun Nandi
2026-11-03 21:41 ` [PATCH v2 5/5] phy: qcom-mipi-csi2: Add sc7280 D-PHY provider Anusha Arun Nandi
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