Re: [PATCH 21/38] MIPS: SGI-IP27: route XBridge and PIC DMA through the 32-bit window

[Imre Kaloz <kaloz@kernel.org>]

On Mon, 5 Oct 2026, Christoph Hellwig wrote:

> On Thu, Oct 01, 2026 at 06:11:56PM +0200, Imre Kaloz wrote:
>> XBridge does not honour the SN0-style 64-bit direct-mapped DMA address:
>> commands complete but no data moves. PIC moves no data either. Route
>> both through the 2GB 32-bit window and cap bus_dma_limit at its top, so
>> SWIOTLB bounces anything above it. PIC is flagged once a following
>> patch enumerates it.
>>
>> Only XBridge (part 0xd002) is flagged; a Bridge (0xc002) behind a Hub
>> keeps the 64-bit direct map. The 64MB bounce pool comes from node 0
>> whenever DRAM passes 2GB, on Hub any multi-node machine. A PIC bus in
>> PCI-X mode takes the window too; IRIX does not.
>
> It's been a while, but IIRC XBridge also support 64-bit direct-mapped
> DMA addresses, just differently.
>
> If you find a late 2.4 or early 2.6 kernel, it comes with an open source
> copy of the IRIX-style PCI code under arch/ia64/ that also includes the
> older chips never used on Altix.  It might be worth to take a look at
> that for clues.
>

Thanks, you were right. I dug out the SN1 pcibr from the old ia64
tree (Bedrock + XBridge, so about as close to this box as it gets),
and the XBridge difference is bit 55 in the 64-bit address, which
pcibr sets as the byte-swap attribute. Without it the Fuel's qla1280
never got any data back, which is what I based this patch on; with
the SN0 address plus bit 55 disk reads match the 32-bit window bit
for bit, on the Fuel's XBridge and on the Tezro's PIC alike.  The
IOC3 behind an XBridge still wants the window, so for v2 devices
with a 64-bit mask get the direct map and the rest stay on the
window.


Thanks again,
Imre