From: Jie Gan <jie.gan@oss.qualcomm.com>
To: Mike Leach <mike.leach@linaro.org>, Jie Gan <jie.gan@oss.qualcomm.com>
Cc: Suzuki K Poulose <suzuki.poulose@arm.com>,
James Clark <james.clark@linaro.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konradybcio@kernel.org>,
Alexander Shishkin <alexander.shishkin@linux.intel.com>,
Tingwei Zhang <quic_tingweiz@quicinc.com>,
Yuanfang Zhang <quic_yuanfang@quicinc.com>,
Mao Jinlong <quic_jinlmao@quicinc.com>,
coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org,
devicetree@vger.kernel.org
Subject: Re: [PATCH v3 RESEND 01/10] coresight: core: Refactoring ctcu_get_active_port and make it generic
Date: Thu, 17 Jul 2025 08:55:39 +0800 [thread overview]
Message-ID: <4850a2a5-dbeb-43f4-9005-1cc022545dcd@oss.qualcomm.com> (raw)
In-Reply-To: <CAJ9a7VjyWtopbnTirRnd4-486PrdQH00cvUR0kcPde2hxCUH-A@mail.gmail.com>
On 7/16/2025 6:20 PM, Mike Leach wrote:
> Hi,
>
> On Mon, 14 Jul 2025 at 07:31, Jie Gan <jie.gan@oss.qualcomm.com> wrote:
>>
>> Remove ctcu_get_active_port from CTCU module and add it to the core
>> framework.
>>
>> The port number is crucial for the CTCU device to identify which ETR
>> it serves. With the port number we can correctly get required parameters
>> of the CTCU device in TMC module.
>>
>> Signed-off-by: Jie Gan <jie.gan@oss.qualcomm.com>
>> ---
>> drivers/hwtracing/coresight/coresight-core.c | 24 +++++++++++++++++++
>> .../hwtracing/coresight/coresight-ctcu-core.c | 19 +--------------
>> drivers/hwtracing/coresight/coresight-priv.h | 2 ++
>> 3 files changed, 27 insertions(+), 18 deletions(-)
>>
>> diff --git a/drivers/hwtracing/coresight/coresight-core.c b/drivers/hwtracing/coresight/coresight-core.c
>> index 1accd7cbd54b..5297a5ff7921 100644
>> --- a/drivers/hwtracing/coresight/coresight-core.c
>> +++ b/drivers/hwtracing/coresight/coresight-core.c
>> @@ -580,6 +580,30 @@ struct coresight_device *coresight_get_sink(struct coresight_path *path)
>> }
>> EXPORT_SYMBOL_GPL(coresight_get_sink);
>>
>> +/**
>> + * coresight_get_port_helper: get the in-port number of the helper device
>> + * that is connected to the csdev.
>> + *
>
> As written this looks at all connections, not just those that are
> helpers. That is fine, so perhaps rename as such.
>
> e.g. coresight_get_in_port_dest
>
> and name the input parameters src , dest respectively.
Make sense for me, will update in next version.
Thanks for the suggestion.
>
>> + * @csdev: csdev of the device that is connected to helper.
>> + * @helper: csdev of the helper device.
>> + *
>> + * Return: port number upson success or -EINVAL for fail.
>
> sp: upon/upson
>
>> + */
>> +int coresight_get_port_helper(struct coresight_device *csdev,
>> + struct coresight_device *helper)
>> +{
>> + struct coresight_platform_data *pdata = helper->pdata;
>> + int i;
>> +
>> + for (i = 0; i < pdata->nr_inconns; ++i) {
>> + if (pdata->in_conns[i]->src_dev == csdev)
>> + return pdata->in_conns[i]->dest_port;
>> + }
>> +
>> + return -EINVAL;
>> +}
>> +EXPORT_SYMBOL_GPL(coresight_get_port_helper);
>> +
>> u32 coresight_get_sink_id(struct coresight_device *csdev)
>> {
>> if (!csdev->ea)
>> diff --git a/drivers/hwtracing/coresight/coresight-ctcu-core.c b/drivers/hwtracing/coresight/coresight-ctcu-core.c
>> index c6bafc96db96..28ea4a216345 100644
>> --- a/drivers/hwtracing/coresight/coresight-ctcu-core.c
>> +++ b/drivers/hwtracing/coresight/coresight-ctcu-core.c
>> @@ -118,23 +118,6 @@ static int __ctcu_set_etr_traceid(struct coresight_device *csdev, u8 traceid, in
>> return 0;
>> }
>>
>> -/*
>> - * Searching the sink device from helper's view in case there are multiple helper devices
>> - * connected to the sink device.
>> - */
>> -static int ctcu_get_active_port(struct coresight_device *sink, struct coresight_device *helper)
>> -{
>> - struct coresight_platform_data *pdata = helper->pdata;
>> - int i;
>> -
>> - for (i = 0; i < pdata->nr_inconns; ++i) {
>> - if (pdata->in_conns[i]->src_dev == sink)
>> - return pdata->in_conns[i]->dest_port;
>> - }
>> -
>> - return -EINVAL;
>> -}
>> -
>> static int ctcu_set_etr_traceid(struct coresight_device *csdev, struct coresight_path *path,
>> bool enable)
>> {
>> @@ -147,7 +130,7 @@ static int ctcu_set_etr_traceid(struct coresight_device *csdev, struct coresight
>> return -EINVAL;
>> }
>>
>> - port_num = ctcu_get_active_port(sink, csdev);
>> + port_num = coresight_get_port_helper(sink, csdev);
>> if (port_num < 0)
>> return -EINVAL;
>>
>> diff --git a/drivers/hwtracing/coresight/coresight-priv.h b/drivers/hwtracing/coresight/coresight-priv.h
>> index 33e22b1ba043..07a5f03de81d 100644
>> --- a/drivers/hwtracing/coresight/coresight-priv.h
>> +++ b/drivers/hwtracing/coresight/coresight-priv.h
>> @@ -156,6 +156,8 @@ void coresight_remove_links(struct coresight_device *orig,
>> u32 coresight_get_sink_id(struct coresight_device *csdev);
>> void coresight_path_assign_trace_id(struct coresight_path *path,
>> enum cs_mode mode);
>> +int coresight_get_port_helper(struct coresight_device *csdev,
>> + struct coresight_device *helper);
>>
> rename here too
will do.
Best Regards,
Jie
>
>> #if IS_ENABLED(CONFIG_CORESIGHT_SOURCE_ETM3X)
>> int etm_readl_cp14(u32 off, unsigned int *val);
>> --
>> 2.34.1
>>
>
> regards
>
> Mike
next prev parent reply other threads:[~2025-07-17 0:55 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-07-14 6:30 [PATCH v3 RESEND 00/10] coresight: ctcu: Enable byte-cntr function for TMC ETR Jie Gan
2025-07-14 6:31 ` [PATCH v3 RESEND 01/10] coresight: core: Refactoring ctcu_get_active_port and make it generic Jie Gan
2025-07-16 10:20 ` Mike Leach
2025-07-17 0:55 ` Jie Gan [this message]
2025-07-14 6:31 ` [PATCH v3 RESEND 02/10] coresight: core: add a new API to retrieve the helper device Jie Gan
2025-07-18 8:37 ` Mike Leach
2025-07-18 9:36 ` Jie Gan
2025-07-14 6:31 ` [PATCH v3 RESEND 03/10] dt-bindings: arm: add an interrupt property for Coresight CTCU Jie Gan
2025-07-14 6:31 ` [PATCH v3 RESEND 04/10] coresight: ctcu: enable byte-cntr for TMC ETR devices Jie Gan
2025-07-22 15:23 ` Mike Leach
2025-07-23 1:15 ` Jie Gan
2025-07-14 6:31 ` [PATCH v3 RESEND 05/10] coresight: tmc: add etr_buf_list to store allocated etr_buf Jie Gan
2025-07-14 6:31 ` [PATCH v3 RESEND 06/10] coresight: tmc: add create/delete functions for etr_buf_node Jie Gan
2025-07-14 6:31 ` [PATCH v3 RESEND 07/10] coresight: tmc: add prepare/unprepare functions for byte-cntr Jie Gan
2025-07-14 6:31 ` [PATCH v3 RESEND 08/10] coresight: tmc: add a switch buffer function " Jie Gan
2025-07-22 14:09 ` Mike Leach
2025-07-23 3:29 ` Jie Gan
2025-07-23 5:10 ` Jie Gan
2025-07-14 6:31 ` [PATCH v3 RESEND 09/10] coresight: tmc: add read " Jie Gan
2025-07-22 15:01 ` Mike Leach
2025-07-23 3:24 ` Jie Gan
2025-07-14 6:31 ` [PATCH v3 RESEND 10/10] arm64: dts: qcom: sa8775p: Add interrupts to CTCU device Jie Gan
2025-07-22 15:09 ` [PATCH v3 RESEND 00/10] coresight: ctcu: Enable byte-cntr function for TMC ETR Mike Leach
2025-07-23 1:26 ` Jie Gan
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