Re: [PATCH v1 2/8] arm64: dts: qcom: shikra: Add QAIF CPU node for audio

[Mohammad Rafi Shaik <mohammad.rafi.shaik@oss.qualcomm.com>]

On 6/24/2026 1:50 PM, Konrad Dybcio wrote:
> On 6/16/26 10:13 PM, Mohammad Rafi Shaik wrote:
>> Add the QAIF CPU endpoint in shikra.dtsi so board files can connect LPASS
>> front-end links to backend codecs.
>>
>> Describe the MMIO region, interrupt, IOMMU mapping and required clocks for
>> the QAIF block. Keep the node disabled at SoC level; board dts files enable
>> and consume it in subsequent patches.
>>
>> Co-developed-by: Harendra Gautam <harendra.gautam@oss.qualcomm.com>
>> Signed-off-by: Harendra Gautam <harendra.gautam@oss.qualcomm.com>
>> Signed-off-by: Mohammad Rafi Shaik <mohammad.rafi.shaik@oss.qualcomm.com>
>> ---
>>   arch/arm64/boot/dts/qcom/shikra.dtsi | 46 ++++++++++++++++++++++++++++
>>   1 file changed, 46 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/shikra.dtsi b/arch/arm64/boot/dts/qcom/shikra.dtsi
>> index bc4ad2bcbbec..e58c87fc8cb0 100644
>> --- a/arch/arm64/boot/dts/qcom/shikra.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/shikra.dtsi
>> @@ -2017,6 +2017,52 @@ dispcc: clock-controller@5f00000 {
>>   			#power-domain-cells = <1>;
>>   		};
>>   
>> +		qaif_cpu: audio@a000000 {
>> +			compatible = "qcom,shikra-qaif-cpu";
>> +			reg = <0x0 0x0a000000 0x0 0x20000>;
>> +
>> +			interrupts = <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH 0>;
>> +
>> +			clocks = <&gcc GCC_LPASS_CONFIG_CLK>,
>> +				<&gcc GCC_LPASS_CORE_AXIM_CLK>,
> 
> Please align the <s and "s
> 

sure, will fix.

Thanks,
Rafi.

> Konrad