From: <Ryan.Wanner@microchip.com>
To: <mturquette@baylibre.com>, <sboyd@kernel.org>,
<nicolas.ferre@microchip.com>, <alexandre.belloni@bootlin.com>,
<claudiu.beznea@tuxon.dev>
Cc: <varshini.rajendran@microchip.com>, <linux-clk@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-kernel@vger.kernel.org>, <robh@kernel.org>
Subject: [PATCH v3 08/32] clk: at91: clk-master: use clk_parent_data
Date: Thu, 10 Jul 2025 13:07:01 -0700 [thread overview]
Message-ID: <4b404eaaab4062464a4142e95aaa76d5cba866f0.1752176711.git.Ryan.Wanner@microchip.com> (raw)
In-Reply-To: <cover.1752176711.git.Ryan.Wanner@microchip.com>
From: Claudiu Beznea <claudiu.beznea@tuxon.dev>
Use struct clk_parent_data instead of struct parent_hw as this leads
to less usage of __clk_get_hw() in SoC specific clock drivers and simpler
conversion of existing SoC specific clock drivers from parent_names to
modern clk_parent_data structures.
The md_slck name and index are added for the SAM9X75 SoC so the
clk-master can properly use parent_data.
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
[ryan.wanner@microchip.com: Add clk-master changes to SAM9X75 and
SAMA7D65 SoCs. As well as add md_slck commit message.]
Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
---
drivers/clk/at91/clk-master.c | 24 ++++++++++++------------
drivers/clk/at91/pmc.h | 6 +++---
drivers/clk/at91/sam9x7.c | 19 ++++++++++---------
drivers/clk/at91/sama7d65.c | 23 ++++++++++-------------
drivers/clk/at91/sama7g5.c | 29 +++++++++++++----------------
5 files changed, 48 insertions(+), 53 deletions(-)
diff --git a/drivers/clk/at91/clk-master.c b/drivers/clk/at91/clk-master.c
index 7a544e429d34..cc4f3beb51e5 100644
--- a/drivers/clk/at91/clk-master.c
+++ b/drivers/clk/at91/clk-master.c
@@ -473,7 +473,7 @@ static struct clk_hw * __init
at91_clk_register_master_internal(struct regmap *regmap,
const char *name, int num_parents,
const char **parent_names,
- struct clk_hw **parent_hws,
+ struct clk_parent_data *parent_data,
const struct clk_master_layout *layout,
const struct clk_master_characteristics *characteristics,
const struct clk_ops *ops, spinlock_t *lock, u32 flags)
@@ -485,7 +485,7 @@ at91_clk_register_master_internal(struct regmap *regmap,
unsigned long irqflags;
int ret;
- if (!name || !num_parents || !(parent_names || parent_hws) || !lock)
+ if (!name || !num_parents || !(parent_names || parent_data) || !lock)
return ERR_PTR(-EINVAL);
master = kzalloc(sizeof(*master), GFP_KERNEL);
@@ -494,8 +494,8 @@ at91_clk_register_master_internal(struct regmap *regmap,
init.name = name;
init.ops = ops;
- if (parent_hws)
- init.parent_hws = (const struct clk_hw **)parent_hws;
+ if (parent_data)
+ init.parent_data = (const struct clk_parent_data *)parent_data;
else
init.parent_names = parent_names;
init.num_parents = num_parents;
@@ -531,13 +531,13 @@ struct clk_hw * __init
at91_clk_register_master_pres(struct regmap *regmap,
const char *name, int num_parents,
const char **parent_names,
- struct clk_hw **parent_hws,
+ struct clk_parent_data *parent_data,
const struct clk_master_layout *layout,
const struct clk_master_characteristics *characteristics,
spinlock_t *lock)
{
return at91_clk_register_master_internal(regmap, name, num_parents,
- parent_names, parent_hws, layout,
+ parent_names, parent_data, layout,
characteristics,
&master_pres_ops,
lock, CLK_SET_RATE_GATE);
@@ -546,7 +546,7 @@ at91_clk_register_master_pres(struct regmap *regmap,
struct clk_hw * __init
at91_clk_register_master_div(struct regmap *regmap,
const char *name, const char *parent_name,
- struct clk_hw *parent_hw, const struct clk_master_layout *layout,
+ struct clk_parent_data *parent_data, const struct clk_master_layout *layout,
const struct clk_master_characteristics *characteristics,
spinlock_t *lock, u32 flags, u32 safe_div)
{
@@ -560,7 +560,7 @@ at91_clk_register_master_div(struct regmap *regmap,
hw = at91_clk_register_master_internal(regmap, name, 1,
parent_name ? &parent_name : NULL,
- parent_hw ? &parent_hw : NULL, layout,
+ parent_data, layout,
characteristics, ops,
lock, flags);
@@ -812,7 +812,7 @@ struct clk_hw * __init
at91_clk_sama7g5_register_master(struct regmap *regmap,
const char *name, int num_parents,
const char **parent_names,
- struct clk_hw **parent_hws,
+ struct clk_parent_data *parent_data,
u32 *mux_table,
spinlock_t *lock, u8 id,
bool critical, int chg_pid)
@@ -824,7 +824,7 @@ at91_clk_sama7g5_register_master(struct regmap *regmap,
unsigned int val;
int ret;
- if (!name || !num_parents || !(parent_names || parent_hws) || !mux_table ||
+ if (!name || !num_parents || !(parent_names || parent_data) || !mux_table ||
!lock || id > MASTER_MAX_ID)
return ERR_PTR(-EINVAL);
@@ -834,8 +834,8 @@ at91_clk_sama7g5_register_master(struct regmap *regmap,
init.name = name;
init.ops = &sama7g5_master_ops;
- if (parent_hws)
- init.parent_hws = (const struct clk_hw **)parent_hws;
+ if (parent_data)
+ init.parent_data = (const struct clk_parent_data *)parent_data;
else
init.parent_names = parent_names;
init.num_parents = num_parents;
diff --git a/drivers/clk/at91/pmc.h b/drivers/clk/at91/pmc.h
index d9a04fddb0b1..54d472276fc9 100644
--- a/drivers/clk/at91/pmc.h
+++ b/drivers/clk/at91/pmc.h
@@ -204,14 +204,14 @@ at91_clk_register_sam9x5_main(struct regmap *regmap, const char *name,
struct clk_hw * __init
at91_clk_register_master_pres(struct regmap *regmap, const char *name,
int num_parents, const char **parent_names,
- struct clk_hw **parent_hws,
+ struct clk_parent_data *parent_data,
const struct clk_master_layout *layout,
const struct clk_master_characteristics *characteristics,
spinlock_t *lock);
struct clk_hw * __init
at91_clk_register_master_div(struct regmap *regmap, const char *name,
- const char *parent_names, struct clk_hw *parent_hw,
+ const char *parent_names, struct clk_parent_data *parent_data,
const struct clk_master_layout *layout,
const struct clk_master_characteristics *characteristics,
spinlock_t *lock, u32 flags, u32 safe_div);
@@ -220,7 +220,7 @@ struct clk_hw * __init
at91_clk_sama7g5_register_master(struct regmap *regmap,
const char *name, int num_parents,
const char **parent_names,
- struct clk_hw **parent_hws, u32 *mux_table,
+ struct clk_parent_data *parent_data, u32 *mux_table,
spinlock_t *lock, u8 id, bool critical,
int chg_pid);
diff --git a/drivers/clk/at91/sam9x7.c b/drivers/clk/at91/sam9x7.c
index eaae05ba21ad..945983f72140 100644
--- a/drivers/clk/at91/sam9x7.c
+++ b/drivers/clk/at91/sam9x7.c
@@ -739,7 +739,8 @@ static void __init sam9x7_pmc_setup(struct device_node *np)
{
struct clk_range range = CLK_RANGE(0, 0);
const char *main_xtal_name = "main_xtal";
- u8 main_xtal_index = 2;
+ const char *const md_slck_name = "md_slck";
+ u8 md_slck_index = 1, main_xtal_index = 2;
struct pmc_data *sam9x7_pmc;
const char *parent_names[9];
void **clk_mux_buffer = NULL;
@@ -747,12 +748,12 @@ static void __init sam9x7_pmc_setup(struct device_node *np)
struct regmap *regmap;
struct clk_hw *hw, *main_rc_hw, *main_osc_hw, *main_xtal_hw;
struct clk_hw *td_slck_hw, *md_slck_hw, *usbck_hw;
- struct clk_parent_data parent_data[2];
+ struct clk_parent_data parent_data[9];
struct clk_hw *parent_hws[9];
int i, j;
td_slck_hw = __clk_get_hw(of_clk_get_by_name(np, "td_slck"));
- md_slck_hw = __clk_get_hw(of_clk_get_by_name(np, "md_slck"));
+ md_slck_hw = __clk_get_hw(of_clk_get_by_name(np, md_slck_name));
main_xtal_hw = __clk_get_hw(of_clk_get_by_name(np, main_xtal_name));
if (!td_slck_hw || !md_slck_hw || !main_xtal_hw)
@@ -853,18 +854,18 @@ static void __init sam9x7_pmc_setup(struct device_node *np)
}
}
- parent_hws[0] = md_slck_hw;
- parent_hws[1] = sam9x7_pmc->chws[PMC_MAIN];
- parent_hws[2] = sam9x7_plls[PLL_ID_PLLA][PLL_COMPID_DIV0].hw;
- parent_hws[3] = sam9x7_plls[PLL_ID_UPLL][PLL_COMPID_DIV0].hw;
+ parent_data[0] = AT91_CLK_PD_NAME(md_slck_name, md_slck_index);
+ parent_data[1] = AT91_CLK_PD_HW(sam9x7_pmc->chws[PMC_MAIN]);
+ parent_data[2] = AT91_CLK_PD_HW(sam9x7_plls[PLL_ID_PLLA][PLL_COMPID_DIV0].hw);
+ parent_data[3] = AT91_CLK_PD_HW(sam9x7_plls[PLL_ID_UPLL][PLL_COMPID_DIV0].hw);
hw = at91_clk_register_master_pres(regmap, "masterck_pres", 4,
- NULL, parent_hws, &sam9x7_master_layout,
+ NULL, parent_data, &sam9x7_master_layout,
&mck_characteristics, &mck_lock);
if (IS_ERR(hw))
goto err_free;
hw = at91_clk_register_master_div(regmap, "masterck_div",
- NULL, hw, &sam9x7_master_layout,
+ NULL, &AT91_CLK_PD_HW(hw), &sam9x7_master_layout,
&mck_characteristics, &mck_lock,
CLK_SET_RATE_GATE, 0);
if (IS_ERR(hw))
diff --git a/drivers/clk/at91/sama7d65.c b/drivers/clk/at91/sama7d65.c
index 1d461db0438f..174b2317081f 100644
--- a/drivers/clk/at91/sama7d65.c
+++ b/drivers/clk/at91/sama7d65.c
@@ -1089,16 +1089,16 @@ static const struct clk_pcr_layout sama7d65_pcr_layout = {
static void __init sama7d65_pmc_setup(struct device_node *np)
{
- const char *main_xtal_name = "main_xtal";
- u8 main_xtal_index = 2;
+ u8 td_slck_index = 0, md_slck_index = 1, main_xtal_index = 2;
+ struct clk_hw *hw, *main_rc_hw, *main_osc_hw, *main_xtal_hw;
+ const char * const main_xtal_name = "main_xtal";
+ struct clk_parent_data parent_data[10];
struct pmc_data *sama7d65_pmc;
const char *parent_names[11];
void **alloc_mem = NULL;
int alloc_mem_size = 0;
struct regmap *regmap;
- struct clk_hw *hw, *main_rc_hw, *main_osc_hw, *main_xtal_hw;
struct clk_hw *td_slck_hw, *md_slck_hw;
- struct clk_parent_data parent_data[2];
struct clk_hw *parent_hws[10];
bool bypass;
int i, j;
@@ -1207,7 +1207,7 @@ static void __init sama7d65_pmc_setup(struct device_node *np)
}
hw = at91_clk_register_master_div(regmap, "mck0", NULL,
- sama7d65_plls[PLL_ID_CPU][1].hw,
+ &AT91_CLK_PD_HW(sama7d65_plls[PLL_ID_CPU][1].hw),
&mck0_layout, &mck0_characteristics,
&pmc_mck0_lock, CLK_GET_RATE_NOCACHE, 5);
if (IS_ERR(hw))
@@ -1216,12 +1216,11 @@ static void __init sama7d65_pmc_setup(struct device_node *np)
sama7d65_pmc->chws[PMC_MCK] = hw;
sama7d65_mckx[PCK_PARENT_HW_MCK0].hw = hw;
- parent_hws[0] = md_slck_hw;
- parent_hws[1] = td_slck_hw;
- parent_hws[2] = sama7d65_pmc->chws[PMC_MAIN];
+ parent_data[0] = AT91_CLK_PD_NAME("md_slck", md_slck_index);
+ parent_data[1] = AT91_CLK_PD_NAME("td_slck", td_slck_index);
+ parent_data[2] = AT91_CLK_PD_HW(sama7d65_pmc->chws[PMC_MAIN]);
for (i = PCK_PARENT_HW_MCK1; i < ARRAY_SIZE(sama7d65_mckx); i++) {
u8 num_parents = 3 + sama7d65_mckx[i].ep_count;
- struct clk_hw *tmp_parent_hws[8];
u32 *mux_table;
mux_table = kmalloc_array(num_parents, sizeof(*mux_table),
@@ -1238,13 +1237,11 @@ static void __init sama7d65_pmc_setup(struct device_node *np)
u8 pll_id = sama7d65_mckx[i].ep[j].pll_id;
u8 pll_compid = sama7d65_mckx[i].ep[j].pll_compid;
- tmp_parent_hws[j] = sama7d65_plls[pll_id][pll_compid].hw;
+ parent_data[3 + j] = AT91_CLK_PD_HW(sama7d65_plls[pll_id][pll_compid].hw);
}
- PMC_FILL_TABLE(&parent_hws[3], tmp_parent_hws,
- sama7d65_mckx[i].ep_count);
hw = at91_clk_sama7g5_register_master(regmap, sama7d65_mckx[i].n,
- num_parents, NULL, parent_hws,
+ num_parents, NULL, parent_data,
mux_table, &pmc_mckX_lock,
sama7d65_mckx[i].id,
sama7d65_mckx[i].c,
diff --git a/drivers/clk/at91/sama7g5.c b/drivers/clk/at91/sama7g5.c
index c4723b875a1d..263cdfc0858c 100644
--- a/drivers/clk/at91/sama7g5.c
+++ b/drivers/clk/at91/sama7g5.c
@@ -969,17 +969,17 @@ static const struct clk_pcr_layout sama7g5_pcr_layout = {
static void __init sama7g5_pmc_setup(struct device_node *np)
{
- const char *main_xtal_name = "main_xtal";
- u8 main_xtal_index = 2;
- struct pmc_data *sama7g5_pmc;
- void **alloc_mem = NULL;
- int alloc_mem_size = 0;
- struct regmap *regmap;
+ u8 td_slck_index = 0, md_slck_index = 1, main_xtal_index = 2;
+ const char * const main_xtal_name = "main_xtal";
struct clk_hw *hw, *main_rc_hw, *main_osc_hw;
+ struct clk_parent_data parent_data[10];
struct clk_hw *td_slck_hw, *md_slck_hw;
- struct clk_parent_data parent_data[2];
struct clk_hw *parent_hws[10];
+ struct pmc_data *sama7g5_pmc;
+ void **alloc_mem = NULL;
+ int alloc_mem_size = 0;
struct clk *main_xtal;
+ struct regmap *regmap;
bool bypass;
int i, j;
@@ -1089,7 +1089,7 @@ static void __init sama7g5_pmc_setup(struct device_node *np)
}
hw = at91_clk_register_master_div(regmap, "mck0", NULL,
- sama7g5_plls[PLL_ID_CPU][1].hw,
+ &AT91_CLK_PD_HW(sama7g5_plls[PLL_ID_CPU][1].hw),
&mck0_layout, &mck0_characteristics,
&pmc_mck0_lock, CLK_GET_RATE_NOCACHE, 5);
if (IS_ERR(hw))
@@ -1097,12 +1097,11 @@ static void __init sama7g5_pmc_setup(struct device_node *np)
sama7g5_mckx[PCK_PARENT_HW_MCK0].hw = sama7g5_pmc->chws[PMC_MCK] = hw;
- parent_hws[0] = md_slck_hw;
- parent_hws[1] = td_slck_hw;
- parent_hws[2] = sama7g5_pmc->chws[PMC_MAIN];
+ parent_data[0] = AT91_CLK_PD_NAME("md_slck", md_slck_index);
+ parent_data[1] = AT91_CLK_PD_NAME("td_slck", td_slck_index);
+ parent_data[2] = AT91_CLK_PD_HW(sama7g5_pmc->chws[PMC_MAIN]);
for (i = PCK_PARENT_HW_MCK1; i < ARRAY_SIZE(sama7g5_mckx); i++) {
u8 num_parents = 3 + sama7g5_mckx[i].ep_count;
- struct clk_hw *tmp_parent_hws[8];
u32 *mux_table;
mux_table = kmalloc_array(num_parents, sizeof(*mux_table),
@@ -1117,13 +1116,11 @@ static void __init sama7g5_pmc_setup(struct device_node *np)
u8 pll_id = sama7g5_mckx[i].ep[j].pll_id;
u8 pll_compid = sama7g5_mckx[i].ep[j].pll_compid;
- tmp_parent_hws[j] = sama7g5_plls[pll_id][pll_compid].hw;
+ parent_data[3 + j] = AT91_CLK_PD_HW(sama7g5_plls[pll_id][pll_compid].hw);
}
- PMC_FILL_TABLE(&parent_hws[3], tmp_parent_hws,
- sama7g5_mckx[i].ep_count);
hw = at91_clk_sama7g5_register_master(regmap, sama7g5_mckx[i].n,
- num_parents, NULL, parent_hws, mux_table,
+ num_parents, NULL, parent_data, mux_table,
&pmc_mckX_lock, sama7g5_mckx[i].id,
sama7g5_mckx[i].c,
sama7g5_mckx[i].ep_chg_id);
--
2.43.0
next prev parent reply other threads:[~2025-07-10 20:08 UTC|newest]
Thread overview: 62+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-07-10 20:06 [PATCH v3 00/32] clk: at91: add support for parent_data and Ryan.Wanner
2025-07-10 20:06 ` [PATCH v3 01/32] clk: at91: pmc: add macros for clk_parent_data Ryan.Wanner
2025-08-28 16:52 ` Brian Masney
2025-09-06 18:33 ` claudiu beznea
2025-09-16 1:21 ` Stephen Boyd
2025-07-10 20:06 ` [PATCH v3 02/32] clk: at91: pmc: Move macro to header file Ryan.Wanner
2025-08-28 16:53 ` Brian Masney
2025-07-10 20:06 ` [PATCH v3 03/32] clk: at91: sam9x75: switch to parent_hw and parent_data Ryan.Wanner
2025-08-28 17:38 ` Brian Masney
2025-09-06 18:33 ` Claudiu Beznea
2025-07-10 20:06 ` [PATCH v3 04/32] clk: at91: clk-sam9x60-pll: use clk_parent_data Ryan.Wanner
2025-08-28 17:04 ` Brian Masney
2025-09-06 18:34 ` claudiu beznea
2025-07-10 20:06 ` [PATCH v3 05/32] clk: at91: clk-peripheral: switch to clk_parent_data Ryan.Wanner
2025-09-06 18:34 ` claudiu beznea
2025-07-10 20:06 ` [PATCH v3 06/32] clk: at91: clk-main: switch to clk parent data Ryan.Wanner
2025-09-06 18:35 ` claudiu beznea
2025-07-10 20:07 ` [PATCH v3 07/32] clk: at91: clk-utmi: use clk_parent_data Ryan.Wanner
2025-09-06 18:36 ` claudiu beznea
2025-07-10 20:07 ` Ryan.Wanner [this message]
2025-09-06 18:36 ` [PATCH v3 08/32] clk: at91: clk-master: " claudiu beznea
2025-09-16 17:35 ` Ryan Wanner
2025-09-17 6:49 ` Claudiu Beznea
2025-07-10 20:07 ` [PATCH v3 09/32] clk: at91: clk-programmable: " Ryan.Wanner
2025-09-06 18:36 ` claudiu beznea
2025-07-10 20:07 ` [PATCH v3 10/32] clk: at91: clk-generated: " Ryan.Wanner
2025-09-06 18:37 ` claudiu beznea
2025-07-10 20:07 ` [PATCH v3 11/32] clk: at91: clk-usb: add support for clk_parent_data Ryan.Wanner
2025-09-06 18:37 ` claudiu beznea
2025-07-10 20:07 ` [PATCH v3 12/32] clk: at91: clk-system: use clk_parent_data Ryan.Wanner
2025-07-10 20:07 ` [PATCH v3 13/32] clk: at91: sama7d65: switch to parent_hw and parent_data Ryan.Wanner
2025-09-06 18:39 ` claudiu beznea
2025-07-10 20:07 ` [PATCH v3 14/32] clk: at91: clk-pll: add support for parent_hw Ryan.Wanner
2025-07-10 20:07 ` [PATCH v3 15/32] clk: at91: clk-audio-pll: " Ryan.Wanner
2025-10-20 19:18 ` Claudiu Beznea
2025-07-10 20:07 ` [PATCH v3 16/32] clk: at91: clk-plldiv: " Ryan.Wanner
2025-07-10 20:07 ` [PATCH v3 17/32] clk: at91: clk-h32mx: " Ryan.Wanner
2025-07-10 20:07 ` [PATCH v3 18/32] clk: at91: clk-i2s-mux: " Ryan.Wanner
2025-07-10 20:07 ` [PATCH v3 19/32] clk: at91: clk-smd: add support for clk_parent_data Ryan.Wanner
2025-07-10 20:07 ` [PATCH v3 20/32] clk: at91: clk-slow: add support for parent_hw Ryan.Wanner
2025-07-10 20:07 ` [PATCH v3 21/32] clk: at91: dt-compat: switch to parent_hw and parent_data Ryan.Wanner
2025-07-10 20:07 ` [PATCH v3 22/32] clk: at91: sam9x60: " Ryan.Wanner
2025-09-06 18:46 ` claudiu beznea
2025-07-10 20:07 ` [PATCH v3 23/32] clk: at91: sama5d2: " Ryan.Wanner
2025-09-06 18:48 ` claudiu beznea
2025-07-10 20:07 ` [PATCH v3 24/32] clk: at91: sama5d3: " Ryan.Wanner
2025-09-06 18:49 ` claudiu beznea
2025-07-10 20:07 ` [PATCH v3 25/32] clk: at91: sama5d4: " Ryan.Wanner
2025-09-06 18:51 ` claudiu beznea
2025-07-10 20:07 ` [PATCH v3 26/32] clk: at91: at91sam9x5: " Ryan.Wanner
[not found] ` <10f016fd-2ceb-40b0-a81d-9c5663f65191@tuxon.dev>
2025-09-06 18:52 ` Claudiu Beznea
2025-07-10 20:07 ` [PATCH v3 27/32] clk: at91: at91rm9200: " Ryan.Wanner
2025-07-10 20:07 ` [PATCH v3 28/32] clk: at91: at91sam9260: " Ryan.Wanner
2025-07-10 20:07 ` [PATCH v3 29/32] clk: at91: at91sam9g45: " Ryan.Wanner
2025-07-10 20:07 ` [PATCH v3 30/32] clk: at91: at91sam9n12: " Ryan.Wanner
2025-07-10 20:07 ` [PATCH v3 31/32] clk: at91: at91sam9rl: switch to clk_parent_data Ryan.Wanner
2025-07-10 20:07 ` [PATCH v3 32/32] clk: at91: sam9x7: Clean up formatting Ryan.Wanner
2025-08-27 20:31 ` [PATCH v3 00/32] clk: at91: add support for parent_data and Ryan Wanner
2025-08-28 15:51 ` Brian Masney
2025-08-28 16:16 ` Ryan Wanner
2025-08-28 16:48 ` Brian Masney
2025-08-28 20:40 ` Konstantin Ryabitsev
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