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From: <Ryan.Wanner@microchip.com>
To: <mturquette@baylibre.com>, <sboyd@kernel.org>,
	<nicolas.ferre@microchip.com>, <alexandre.belloni@bootlin.com>,
	<claudiu.beznea@tuxon.dev>
Cc: <varshini.rajendran@microchip.com>, <linux-clk@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>, <robh@kernel.org>
Subject: [PATCH v3 09/32] clk: at91: clk-programmable: use clk_parent_data
Date: Thu, 10 Jul 2025 13:07:02 -0700	[thread overview]
Message-ID: <aa1bae53bf124b8e46ff413b12528071262febb3.1752176711.git.Ryan.Wanner@microchip.com> (raw)
In-Reply-To: <cover.1752176711.git.Ryan.Wanner@microchip.com>

From: Claudiu Beznea <claudiu.beznea@tuxon.dev>

Use struct clk_parent_data instead of struct parent_hw as this leads
to less usage of __clk_get_hw() in SoC specific clock drivers and simpler
conversion of existing SoC specific clock drivers from parent_names to
modern clk_parent_data structures.

Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
[ryan.wanner@microchip.com: Add the clk-programmable changes to the
SAMA7D65 and SAM9X75 SoCs. Add td_slck_name variable and index for the
SAM9X75.]
Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
---
 drivers/clk/at91/clk-programmable.c |  8 ++++----
 drivers/clk/at91/pmc.h              |  2 +-
 drivers/clk/at91/sam9x7.c           | 21 +++++++++++----------
 drivers/clk/at91/sama7d65.c         | 20 ++++++++++----------
 drivers/clk/at91/sama7g5.c          | 20 ++++++++++----------
 5 files changed, 36 insertions(+), 35 deletions(-)

diff --git a/drivers/clk/at91/clk-programmable.c b/drivers/clk/at91/clk-programmable.c
index 1195fb405503..275ca701f294 100644
--- a/drivers/clk/at91/clk-programmable.c
+++ b/drivers/clk/at91/clk-programmable.c
@@ -215,7 +215,7 @@ static const struct clk_ops programmable_ops = {
 struct clk_hw * __init
 at91_clk_register_programmable(struct regmap *regmap,
 			       const char *name, const char **parent_names,
-			       struct clk_hw **parent_hws, u8 num_parents, u8 id,
+			       struct clk_parent_data *parent_data, u8 num_parents, u8 id,
 			       const struct clk_programmable_layout *layout,
 			       u32 *mux_table)
 {
@@ -224,7 +224,7 @@ at91_clk_register_programmable(struct regmap *regmap,
 	struct clk_init_data init = {};
 	int ret;
 
-	if (id > PROG_ID_MAX || !(parent_names || parent_hws))
+	if (id > PROG_ID_MAX || !(parent_names || parent_data))
 		return ERR_PTR(-EINVAL);
 
 	prog = kzalloc(sizeof(*prog), GFP_KERNEL);
@@ -233,8 +233,8 @@ at91_clk_register_programmable(struct regmap *regmap,
 
 	init.name = name;
 	init.ops = &programmable_ops;
-	if (parent_hws)
-		init.parent_hws = (const struct clk_hw **)parent_hws;
+	if (parent_data)
+		init.parent_data = (const struct clk_parent_data *)parent_data;
 	else
 		init.parent_names = parent_names;
 	init.num_parents = num_parents;
diff --git a/drivers/clk/at91/pmc.h b/drivers/clk/at91/pmc.h
index 54d472276fc9..34036f2d0578 100644
--- a/drivers/clk/at91/pmc.h
+++ b/drivers/clk/at91/pmc.h
@@ -263,7 +263,7 @@ sam9x60_clk_register_frac_pll(struct regmap *regmap, spinlock_t *lock,
 
 struct clk_hw * __init
 at91_clk_register_programmable(struct regmap *regmap, const char *name,
-			       const char **parent_names, struct clk_hw **parent_hws,
+			       const char **parent_names, struct clk_parent_data *parent_data,
 			       u8 num_parents, u8 id,
 			       const struct clk_programmable_layout *layout,
 			       u32 *mux_table);
diff --git a/drivers/clk/at91/sam9x7.c b/drivers/clk/at91/sam9x7.c
index 945983f72140..86d624cd92b2 100644
--- a/drivers/clk/at91/sam9x7.c
+++ b/drivers/clk/at91/sam9x7.c
@@ -737,10 +737,11 @@ static const struct {
 
 static void __init sam9x7_pmc_setup(struct device_node *np)
 {
+	u8 td_slck_index = 0, md_slck_index = 1, main_xtal_index = 2;
 	struct clk_range range = CLK_RANGE(0, 0);
 	const char *main_xtal_name = "main_xtal";
+	const char * const td_slck_name = "td_slck";
 	const char *const md_slck_name = "md_slck";
-	u8 md_slck_index = 1, main_xtal_index = 2;
 	struct pmc_data *sam9x7_pmc;
 	const char *parent_names[9];
 	void **clk_mux_buffer = NULL;
@@ -752,7 +753,7 @@ static void __init sam9x7_pmc_setup(struct device_node *np)
 	struct clk_hw *parent_hws[9];
 	int i, j;
 
-	td_slck_hw = __clk_get_hw(of_clk_get_by_name(np, "td_slck"));
+	td_slck_hw = __clk_get_hw(of_clk_get_by_name(np, td_slck_name));
 	md_slck_hw = __clk_get_hw(of_clk_get_by_name(np, md_slck_name));
 	main_xtal_hw = __clk_get_hw(of_clk_get_by_name(np, main_xtal_name));
 
@@ -880,20 +881,20 @@ static void __init sam9x7_pmc_setup(struct device_node *np)
 	if (IS_ERR(usbck_hw))
 		goto err_free;
 
-	parent_hws[0] = md_slck_hw;
-	parent_hws[1] = td_slck_hw;
-	parent_hws[2] = sam9x7_pmc->chws[PMC_MAIN];
-	parent_hws[3] = sam9x7_pmc->chws[PMC_MCK];
-	parent_hws[4] = sam9x7_plls[PLL_ID_PLLA][PLL_COMPID_DIV0].hw;
-	parent_hws[5] = sam9x7_plls[PLL_ID_UPLL][PLL_COMPID_DIV0].hw;
-	parent_hws[6] = sam9x7_plls[PLL_ID_AUDIO][PLL_COMPID_DIV0].hw;
+	parent_data[0] = AT91_CLK_PD_NAME(md_slck_name, md_slck_index);
+	parent_data[1] = AT91_CLK_PD_NAME(td_slck_name, td_slck_index);
+	parent_data[2] = AT91_CLK_PD_HW(sam9x7_pmc->chws[PMC_MAIN]);
+	parent_data[3] = AT91_CLK_PD_HW(sam9x7_pmc->chws[PMC_MCK]);
+	parent_data[4] = AT91_CLK_PD_HW(sam9x7_plls[PLL_ID_PLLA][PLL_COMPID_DIV0].hw);
+	parent_data[5] = AT91_CLK_PD_HW(sam9x7_plls[PLL_ID_UPLL][PLL_COMPID_DIV0].hw);
+	parent_data[6] = AT91_CLK_PD_HW(sam9x7_plls[PLL_ID_AUDIO][PLL_COMPID_DIV0].hw);
 	for (i = 0; i < 2; i++) {
 		char name[6];
 
 		snprintf(name, sizeof(name), "prog%d", i);
 
 		hw = at91_clk_register_programmable(regmap, name,
-						    NULL, parent_hws, 7, i,
+						    NULL, parent_data, 7, i,
 						    &sam9x7_programmable_layout,
 						    NULL);
 		if (IS_ERR(hw))
diff --git a/drivers/clk/at91/sama7d65.c b/drivers/clk/at91/sama7d65.c
index 174b2317081f..7463719260e0 100644
--- a/drivers/clk/at91/sama7d65.c
+++ b/drivers/clk/at91/sama7d65.c
@@ -1262,22 +1262,22 @@ static void __init sama7d65_pmc_setup(struct device_node *np)
 	if (IS_ERR(hw))
 		goto err_free;
 
-	parent_hws[0] = md_slck_hw;
-	parent_hws[1] = td_slck_hw;
-	parent_hws[2] = sama7d65_pmc->chws[PMC_MAIN];
-	parent_hws[3] = sama7d65_plls[PLL_ID_SYS][PLL_COMPID_DIV0].hw;
-	parent_hws[4] = sama7d65_plls[PLL_ID_DDR][PLL_COMPID_DIV0].hw;
-	parent_hws[5] = sama7d65_plls[PLL_ID_GPU][PLL_COMPID_DIV0].hw;
-	parent_hws[6] = sama7d65_plls[PLL_ID_BAUD][PLL_COMPID_DIV0].hw;
-	parent_hws[7] = sama7d65_plls[PLL_ID_AUDIO][PLL_COMPID_DIV0].hw;
-	parent_hws[8] = sama7d65_plls[PLL_ID_ETH][PLL_COMPID_DIV0].hw;
+	parent_data[0] = AT91_CLK_PD_NAME("md_slck", md_slck_index);
+	parent_data[1] = AT91_CLK_PD_NAME("td_slck", td_slck_index);
+	parent_data[2] = AT91_CLK_PD_HW(sama7d65_pmc->chws[PMC_MAIN]);
+	parent_data[3] = AT91_CLK_PD_HW(sama7d65_plls[PLL_ID_SYS][PLL_COMPID_DIV0].hw);
+	parent_data[4] = AT91_CLK_PD_HW(sama7d65_plls[PLL_ID_DDR][PLL_COMPID_DIV0].hw);
+	parent_data[5] = AT91_CLK_PD_HW(sama7d65_plls[PLL_ID_GPU][PLL_COMPID_DIV0].hw);
+	parent_data[6] = AT91_CLK_PD_HW(sama7d65_plls[PLL_ID_BAUD][PLL_COMPID_DIV0].hw);
+	parent_data[7] = AT91_CLK_PD_HW(sama7d65_plls[PLL_ID_AUDIO][PLL_COMPID_DIV0].hw);
+	parent_data[8] = AT91_CLK_PD_HW(sama7d65_plls[PLL_ID_ETH][PLL_COMPID_DIV0].hw);
 
 	for (i = 0; i < 8; i++) {
 		char name[6];
 
 		snprintf(name, sizeof(name), "prog%d", i);
 
-		hw = at91_clk_register_programmable(regmap, name, NULL, parent_hws,
+		hw = at91_clk_register_programmable(regmap, name, NULL, parent_data,
 						    9, i,
 						    &programmable_layout,
 						    sama7d65_prog_mux_table);
diff --git a/drivers/clk/at91/sama7g5.c b/drivers/clk/at91/sama7g5.c
index 263cdfc0858c..a6824d0accb9 100644
--- a/drivers/clk/at91/sama7g5.c
+++ b/drivers/clk/at91/sama7g5.c
@@ -1141,21 +1141,21 @@ static void __init sama7g5_pmc_setup(struct device_node *np)
 
 	sama7g5_pmc->chws[PMC_UTMI] = hw;
 
-	parent_hws[0] = md_slck_hw;
-	parent_hws[1] = td_slck_hw;
-	parent_hws[2] = sama7g5_pmc->chws[PMC_MAIN];
-	parent_hws[3] = sama7g5_plls[PLL_ID_SYS][PLL_COMPID_DIV0].hw;
-	parent_hws[4] = sama7g5_plls[PLL_ID_DDR][PLL_COMPID_DIV0].hw;
-	parent_hws[5] = sama7g5_plls[PLL_ID_IMG][PLL_COMPID_DIV0].hw;
-	parent_hws[6] = sama7g5_plls[PLL_ID_BAUD][PLL_COMPID_DIV0].hw;
-	parent_hws[7] = sama7g5_plls[PLL_ID_AUDIO][PLL_COMPID_DIV0].hw;
-	parent_hws[8] = sama7g5_plls[PLL_ID_ETH][PLL_COMPID_DIV0].hw;
+	parent_data[0] = AT91_CLK_PD_NAME("md_slck", md_slck_index);
+	parent_data[1] = AT91_CLK_PD_NAME("td_slck", td_slck_index);
+	parent_data[2] = AT91_CLK_PD_HW(sama7g5_pmc->chws[PMC_MAIN]);
+	parent_data[3] = AT91_CLK_PD_HW(sama7g5_plls[PLL_ID_SYS][PLL_COMPID_DIV0].hw);
+	parent_data[4] = AT91_CLK_PD_HW(sama7g5_plls[PLL_ID_DDR][PLL_COMPID_DIV0].hw);
+	parent_data[5] = AT91_CLK_PD_HW(sama7g5_plls[PLL_ID_IMG][PLL_COMPID_DIV0].hw);
+	parent_data[6] = AT91_CLK_PD_HW(sama7g5_plls[PLL_ID_BAUD][PLL_COMPID_DIV0].hw);
+	parent_data[7] = AT91_CLK_PD_HW(sama7g5_plls[PLL_ID_AUDIO][PLL_COMPID_DIV0].hw);
+	parent_data[8] = AT91_CLK_PD_HW(sama7g5_plls[PLL_ID_ETH][PLL_COMPID_DIV0].hw);
 	for (i = 0; i < 8; i++) {
 		char name[6];
 
 		snprintf(name, sizeof(name), "prog%d", i);
 
-		hw = at91_clk_register_programmable(regmap, name, NULL, parent_hws,
+		hw = at91_clk_register_programmable(regmap, name, NULL, parent_data,
 						    9, i,
 						    &programmable_layout,
 						    sama7g5_prog_mux_table);
-- 
2.43.0


  parent reply	other threads:[~2025-07-10 20:08 UTC|newest]

Thread overview: 62+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-07-10 20:06 [PATCH v3 00/32] clk: at91: add support for parent_data and Ryan.Wanner
2025-07-10 20:06 ` [PATCH v3 01/32] clk: at91: pmc: add macros for clk_parent_data Ryan.Wanner
2025-08-28 16:52   ` Brian Masney
2025-09-06 18:33   ` claudiu beznea
2025-09-16  1:21     ` Stephen Boyd
2025-07-10 20:06 ` [PATCH v3 02/32] clk: at91: pmc: Move macro to header file Ryan.Wanner
2025-08-28 16:53   ` Brian Masney
2025-07-10 20:06 ` [PATCH v3 03/32] clk: at91: sam9x75: switch to parent_hw and parent_data Ryan.Wanner
2025-08-28 17:38   ` Brian Masney
2025-09-06 18:33   ` Claudiu Beznea
2025-07-10 20:06 ` [PATCH v3 04/32] clk: at91: clk-sam9x60-pll: use clk_parent_data Ryan.Wanner
2025-08-28 17:04   ` Brian Masney
2025-09-06 18:34   ` claudiu beznea
2025-07-10 20:06 ` [PATCH v3 05/32] clk: at91: clk-peripheral: switch to clk_parent_data Ryan.Wanner
2025-09-06 18:34   ` claudiu beznea
2025-07-10 20:06 ` [PATCH v3 06/32] clk: at91: clk-main: switch to clk parent data Ryan.Wanner
2025-09-06 18:35   ` claudiu beznea
2025-07-10 20:07 ` [PATCH v3 07/32] clk: at91: clk-utmi: use clk_parent_data Ryan.Wanner
2025-09-06 18:36   ` claudiu beznea
2025-07-10 20:07 ` [PATCH v3 08/32] clk: at91: clk-master: " Ryan.Wanner
2025-09-06 18:36   ` claudiu beznea
2025-09-16 17:35     ` Ryan Wanner
2025-09-17  6:49       ` Claudiu Beznea
2025-07-10 20:07 ` Ryan.Wanner [this message]
2025-09-06 18:36   ` [PATCH v3 09/32] clk: at91: clk-programmable: " claudiu beznea
2025-07-10 20:07 ` [PATCH v3 10/32] clk: at91: clk-generated: " Ryan.Wanner
2025-09-06 18:37   ` claudiu beznea
2025-07-10 20:07 ` [PATCH v3 11/32] clk: at91: clk-usb: add support for clk_parent_data Ryan.Wanner
2025-09-06 18:37   ` claudiu beznea
2025-07-10 20:07 ` [PATCH v3 12/32] clk: at91: clk-system: use clk_parent_data Ryan.Wanner
2025-07-10 20:07 ` [PATCH v3 13/32] clk: at91: sama7d65: switch to parent_hw and parent_data Ryan.Wanner
2025-09-06 18:39   ` claudiu beznea
2025-07-10 20:07 ` [PATCH v3 14/32] clk: at91: clk-pll: add support for parent_hw Ryan.Wanner
2025-07-10 20:07 ` [PATCH v3 15/32] clk: at91: clk-audio-pll: " Ryan.Wanner
2025-10-20 19:18   ` Claudiu Beznea
2025-07-10 20:07 ` [PATCH v3 16/32] clk: at91: clk-plldiv: " Ryan.Wanner
2025-07-10 20:07 ` [PATCH v3 17/32] clk: at91: clk-h32mx: " Ryan.Wanner
2025-07-10 20:07 ` [PATCH v3 18/32] clk: at91: clk-i2s-mux: " Ryan.Wanner
2025-07-10 20:07 ` [PATCH v3 19/32] clk: at91: clk-smd: add support for clk_parent_data Ryan.Wanner
2025-07-10 20:07 ` [PATCH v3 20/32] clk: at91: clk-slow: add support for parent_hw Ryan.Wanner
2025-07-10 20:07 ` [PATCH v3 21/32] clk: at91: dt-compat: switch to parent_hw and parent_data Ryan.Wanner
2025-07-10 20:07 ` [PATCH v3 22/32] clk: at91: sam9x60: " Ryan.Wanner
2025-09-06 18:46   ` claudiu beznea
2025-07-10 20:07 ` [PATCH v3 23/32] clk: at91: sama5d2: " Ryan.Wanner
2025-09-06 18:48   ` claudiu beznea
2025-07-10 20:07 ` [PATCH v3 24/32] clk: at91: sama5d3: " Ryan.Wanner
2025-09-06 18:49   ` claudiu beznea
2025-07-10 20:07 ` [PATCH v3 25/32] clk: at91: sama5d4: " Ryan.Wanner
2025-09-06 18:51   ` claudiu beznea
2025-07-10 20:07 ` [PATCH v3 26/32] clk: at91: at91sam9x5: " Ryan.Wanner
     [not found]   ` <10f016fd-2ceb-40b0-a81d-9c5663f65191@tuxon.dev>
2025-09-06 18:52     ` Claudiu Beznea
2025-07-10 20:07 ` [PATCH v3 27/32] clk: at91: at91rm9200: " Ryan.Wanner
2025-07-10 20:07 ` [PATCH v3 28/32] clk: at91: at91sam9260: " Ryan.Wanner
2025-07-10 20:07 ` [PATCH v3 29/32] clk: at91: at91sam9g45: " Ryan.Wanner
2025-07-10 20:07 ` [PATCH v3 30/32] clk: at91: at91sam9n12: " Ryan.Wanner
2025-07-10 20:07 ` [PATCH v3 31/32] clk: at91: at91sam9rl: switch to clk_parent_data Ryan.Wanner
2025-07-10 20:07 ` [PATCH v3 32/32] clk: at91: sam9x7: Clean up formatting Ryan.Wanner
2025-08-27 20:31 ` [PATCH v3 00/32] clk: at91: add support for parent_data and Ryan Wanner
2025-08-28 15:51 ` Brian Masney
2025-08-28 16:16   ` Ryan Wanner
2025-08-28 16:48     ` Brian Masney
2025-08-28 20:40       ` Konstantin Ryabitsev

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