From: <Ryan.Wanner@microchip.com>
To: <mturquette@baylibre.com>, <sboyd@kernel.org>,
<nicolas.ferre@microchip.com>, <alexandre.belloni@bootlin.com>,
<claudiu.beznea@tuxon.dev>
Cc: <varshini.rajendran@microchip.com>, <linux-clk@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-kernel@vger.kernel.org>, <robh@kernel.org>
Subject: [PATCH v3 10/32] clk: at91: clk-generated: use clk_parent_data
Date: Thu, 10 Jul 2025 13:07:03 -0700 [thread overview]
Message-ID: <c22f1546e25cfe0d4ae3f6f2507b522311190812.1752176711.git.Ryan.Wanner@microchip.com> (raw)
In-Reply-To: <cover.1752176711.git.Ryan.Wanner@microchip.com>
From: Claudiu Beznea <claudiu.beznea@tuxon.dev>
Use struct clk_parent_data instead of struct parent_hw as this leads
to less usage of __clk_get_hw() in SoC specific clock drivers and simpler
conversion of existing SoC specific clock drivers from parent_names to
modern clk_parent_data structures.
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
[ryan.wanner@microchip.com: Added SAMA7D65 and SAM9X75 SoCs to the
clk-generated changes. Adjust clk name variable order.]
Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
---
drivers/clk/at91/clk-generated.c | 8 ++++----
drivers/clk/at91/pmc.h | 2 +-
drivers/clk/at91/sam9x7.c | 26 ++++++++++----------------
drivers/clk/at91/sama7d65.c | 31 +++++++++++++------------------
drivers/clk/at91/sama7g5.c | 30 +++++++++++-------------------
5 files changed, 39 insertions(+), 58 deletions(-)
diff --git a/drivers/clk/at91/clk-generated.c b/drivers/clk/at91/clk-generated.c
index 4b4edeecc889..d9e00167dbc8 100644
--- a/drivers/clk/at91/clk-generated.c
+++ b/drivers/clk/at91/clk-generated.c
@@ -319,7 +319,7 @@ struct clk_hw * __init
at91_clk_register_generated(struct regmap *regmap, spinlock_t *lock,
const struct clk_pcr_layout *layout,
const char *name, const char **parent_names,
- struct clk_hw **parent_hws,
+ struct clk_parent_data *parent_data,
u32 *mux_table, u8 num_parents, u8 id,
const struct clk_range *range,
int chg_pid)
@@ -329,7 +329,7 @@ at91_clk_register_generated(struct regmap *regmap, spinlock_t *lock,
struct clk_hw *hw;
int ret;
- if (!(parent_names || parent_hws))
+ if (!(parent_names || parent_data))
return ERR_PTR(-ENOMEM);
gck = kzalloc(sizeof(*gck), GFP_KERNEL);
@@ -338,8 +338,8 @@ at91_clk_register_generated(struct regmap *regmap, spinlock_t *lock,
init.name = name;
init.ops = &generated_ops;
- if (parent_hws)
- init.parent_hws = (const struct clk_hw **)parent_hws;
+ if (parent_data)
+ init.parent_data = (const struct clk_parent_data *)parent_data;
else
init.parent_names = parent_names;
init.num_parents = num_parents;
diff --git a/drivers/clk/at91/pmc.h b/drivers/clk/at91/pmc.h
index 34036f2d0578..0646775dfb1d 100644
--- a/drivers/clk/at91/pmc.h
+++ b/drivers/clk/at91/pmc.h
@@ -171,7 +171,7 @@ struct clk_hw * __init
at91_clk_register_generated(struct regmap *regmap, spinlock_t *lock,
const struct clk_pcr_layout *layout,
const char *name, const char **parent_names,
- struct clk_hw **parent_hws, u32 *mux_table,
+ struct clk_parent_data *parent_data, u32 *mux_table,
u8 num_parents, u8 id,
const struct clk_range *range, int chg_pid);
diff --git a/drivers/clk/at91/sam9x7.c b/drivers/clk/at91/sam9x7.c
index 86d624cd92b2..c4578944611e 100644
--- a/drivers/clk/at91/sam9x7.c
+++ b/drivers/clk/at91/sam9x7.c
@@ -739,8 +739,8 @@ static void __init sam9x7_pmc_setup(struct device_node *np)
{
u8 td_slck_index = 0, md_slck_index = 1, main_xtal_index = 2;
struct clk_range range = CLK_RANGE(0, 0);
- const char *main_xtal_name = "main_xtal";
- const char * const td_slck_name = "td_slck";
+ const char *const main_xtal_name = "main_xtal";
+ const char *const td_slck_name = "td_slck";
const char *const md_slck_name = "md_slck";
struct pmc_data *sam9x7_pmc;
const char *parent_names[9];
@@ -748,16 +748,13 @@ static void __init sam9x7_pmc_setup(struct device_node *np)
int clk_mux_buffer_size = 0;
struct regmap *regmap;
struct clk_hw *hw, *main_rc_hw, *main_osc_hw, *main_xtal_hw;
- struct clk_hw *td_slck_hw, *md_slck_hw, *usbck_hw;
+ struct clk_hw *usbck_hw;
struct clk_parent_data parent_data[9];
- struct clk_hw *parent_hws[9];
int i, j;
- td_slck_hw = __clk_get_hw(of_clk_get_by_name(np, td_slck_name));
- md_slck_hw = __clk_get_hw(of_clk_get_by_name(np, md_slck_name));
main_xtal_hw = __clk_get_hw(of_clk_get_by_name(np, main_xtal_name));
- if (!td_slck_hw || !md_slck_hw || !main_xtal_hw)
+ if (!main_xtal_hw)
return;
regmap = device_node_to_regmap(np);
@@ -933,13 +930,12 @@ static void __init sam9x7_pmc_setup(struct device_node *np)
sam9x7_pmc->phws[sam9x7_periphck[i].id] = hw;
}
- parent_hws[0] = md_slck_hw;
- parent_hws[1] = td_slck_hw;
- parent_hws[2] = sam9x7_pmc->chws[PMC_MAIN];
- parent_hws[3] = sam9x7_pmc->chws[PMC_MCK];
+ parent_data[0] = AT91_CLK_PD_NAME(md_slck_name, md_slck_index);
+ parent_data[1] = AT91_CLK_PD_NAME(td_slck_name, td_slck_index);
+ parent_data[2] = AT91_CLK_PD_HW(sam9x7_pmc->chws[PMC_MAIN]);
+ parent_data[3] = AT91_CLK_PD_HW(sam9x7_pmc->chws[PMC_MCK]);
for (i = 0; i < ARRAY_SIZE(sam9x7_gck); i++) {
u8 num_parents = 4 + sam9x7_gck[i].pp_count;
- struct clk_hw *tmp_parent_hws[6];
u32 *mux_table;
mux_table = kmalloc_array(num_parents, sizeof(*mux_table),
@@ -954,15 +950,13 @@ static void __init sam9x7_pmc_setup(struct device_node *np)
u8 pll_id = sam9x7_gck[i].pp[j].pll_id;
u8 pll_compid = sam9x7_gck[i].pp[j].pll_compid;
- tmp_parent_hws[j] = sam9x7_plls[pll_id][pll_compid].hw;
+ parent_data[4 + j] = AT91_CLK_PD_HW(sam9x7_plls[pll_id][pll_compid].hw);
}
- PMC_FILL_TABLE(&parent_hws[4], tmp_parent_hws,
- sam9x7_gck[i].pp_count);
hw = at91_clk_register_generated(regmap, &pmc_pcr_lock,
&sam9x7_pcr_layout,
sam9x7_gck[i].n,
- NULL, parent_hws, mux_table,
+ NULL, parent_data, mux_table,
num_parents,
sam9x7_gck[i].id,
&sam9x7_gck[i].r,
diff --git a/drivers/clk/at91/sama7d65.c b/drivers/clk/at91/sama7d65.c
index 7463719260e0..4d47d20e65fb 100644
--- a/drivers/clk/at91/sama7d65.c
+++ b/drivers/clk/at91/sama7d65.c
@@ -1092,22 +1092,20 @@ static void __init sama7d65_pmc_setup(struct device_node *np)
u8 td_slck_index = 0, md_slck_index = 1, main_xtal_index = 2;
struct clk_hw *hw, *main_rc_hw, *main_osc_hw, *main_xtal_hw;
const char * const main_xtal_name = "main_xtal";
+ const char * const td_slck_name = "td_slck";
+ const char * const md_slck_name = "md_slck";
struct clk_parent_data parent_data[10];
struct pmc_data *sama7d65_pmc;
const char *parent_names[11];
void **alloc_mem = NULL;
int alloc_mem_size = 0;
struct regmap *regmap;
- struct clk_hw *td_slck_hw, *md_slck_hw;
- struct clk_hw *parent_hws[10];
bool bypass;
int i, j;
- td_slck_hw = __clk_get_hw(of_clk_get_by_name(np, "td_slck"));
- md_slck_hw = __clk_get_hw(of_clk_get_by_name(np, "md_slck"));
main_xtal_hw = __clk_get_hw(of_clk_get_by_name(np, main_xtal_name));
- if (!td_slck_hw || !md_slck_hw || !main_xtal_hw)
+ if (!main_xtal_hw)
return;
regmap = device_node_to_regmap(np);
@@ -1216,8 +1214,8 @@ static void __init sama7d65_pmc_setup(struct device_node *np)
sama7d65_pmc->chws[PMC_MCK] = hw;
sama7d65_mckx[PCK_PARENT_HW_MCK0].hw = hw;
- parent_data[0] = AT91_CLK_PD_NAME("md_slck", md_slck_index);
- parent_data[1] = AT91_CLK_PD_NAME("td_slck", td_slck_index);
+ parent_data[0] = AT91_CLK_PD_NAME(md_slck_name, md_slck_index);
+ parent_data[1] = AT91_CLK_PD_NAME(td_slck_name, td_slck_index);
parent_data[2] = AT91_CLK_PD_HW(sama7d65_pmc->chws[PMC_MAIN]);
for (i = PCK_PARENT_HW_MCK1; i < ARRAY_SIZE(sama7d65_mckx); i++) {
u8 num_parents = 3 + sama7d65_mckx[i].ep_count;
@@ -1262,8 +1260,8 @@ static void __init sama7d65_pmc_setup(struct device_node *np)
if (IS_ERR(hw))
goto err_free;
- parent_data[0] = AT91_CLK_PD_NAME("md_slck", md_slck_index);
- parent_data[1] = AT91_CLK_PD_NAME("td_slck", td_slck_index);
+ parent_data[0] = AT91_CLK_PD_NAME(md_slck_name, md_slck_index);
+ parent_data[1] = AT91_CLK_PD_NAME(td_slck_name, td_slck_index);
parent_data[2] = AT91_CLK_PD_HW(sama7d65_pmc->chws[PMC_MAIN]);
parent_data[3] = AT91_CLK_PD_HW(sama7d65_plls[PLL_ID_SYS][PLL_COMPID_DIV0].hw);
parent_data[4] = AT91_CLK_PD_HW(sama7d65_plls[PLL_ID_DDR][PLL_COMPID_DIV0].hw);
@@ -1313,13 +1311,12 @@ static void __init sama7d65_pmc_setup(struct device_node *np)
sama7d65_pmc->phws[sama7d65_periphck[i].id] = hw;
}
- parent_hws[0] = md_slck_hw;
- parent_hws[1] = td_slck_hw;
- parent_hws[2] = sama7d65_pmc->chws[PMC_MAIN];
- parent_hws[3] = sama7d65_pmc->chws[PMC_MCK1];
+ parent_data[0] = AT91_CLK_PD_NAME(md_slck_name, md_slck_index);
+ parent_data[1] = AT91_CLK_PD_NAME(td_slck_name, td_slck_index);
+ parent_data[2] = AT91_CLK_PD_HW(sama7d65_pmc->chws[PMC_MAIN]);
+ parent_data[3] = AT91_CLK_PD_HW(sama7d65_pmc->chws[PMC_MCK1]);
for (i = 0; i < ARRAY_SIZE(sama7d65_gck); i++) {
u8 num_parents = 4 + sama7d65_gck[i].pp_count;
- struct clk_hw *tmp_parent_hws[8];
u32 *mux_table;
mux_table = kmalloc_array(num_parents, sizeof(*mux_table),
@@ -1336,15 +1333,13 @@ static void __init sama7d65_pmc_setup(struct device_node *np)
u8 pll_id = sama7d65_gck[i].pp[j].pll_id;
u8 pll_compid = sama7d65_gck[i].pp[j].pll_compid;
- tmp_parent_hws[j] = sama7d65_plls[pll_id][pll_compid].hw;
+ parent_data[4 + j] = AT91_CLK_PD_HW(sama7d65_plls[pll_id][pll_compid].hw);
}
- PMC_FILL_TABLE(&parent_hws[4], tmp_parent_hws,
- sama7d65_gck[i].pp_count);
hw = at91_clk_register_generated(regmap, &pmc_pcr_lock,
&sama7d65_pcr_layout,
sama7d65_gck[i].n, NULL,
- parent_hws, mux_table,
+ parent_data, mux_table,
num_parents,
sama7d65_gck[i].id,
&sama7d65_gck[i].r,
diff --git a/drivers/clk/at91/sama7g5.c b/drivers/clk/at91/sama7g5.c
index a6824d0accb9..505db97e989b 100644
--- a/drivers/clk/at91/sama7g5.c
+++ b/drivers/clk/at91/sama7g5.c
@@ -971,10 +971,10 @@ static void __init sama7g5_pmc_setup(struct device_node *np)
{
u8 td_slck_index = 0, md_slck_index = 1, main_xtal_index = 2;
const char * const main_xtal_name = "main_xtal";
+ const char * const td_slck_name = "td_slck";
+ const char * const md_slck_name = "md_slck";
struct clk_hw *hw, *main_rc_hw, *main_osc_hw;
struct clk_parent_data parent_data[10];
- struct clk_hw *td_slck_hw, *md_slck_hw;
- struct clk_hw *parent_hws[10];
struct pmc_data *sama7g5_pmc;
void **alloc_mem = NULL;
int alloc_mem_size = 0;
@@ -983,11 +983,6 @@ static void __init sama7g5_pmc_setup(struct device_node *np)
bool bypass;
int i, j;
- td_slck_hw = __clk_get_hw(of_clk_get_by_name(np, "td_slck"));
- md_slck_hw = __clk_get_hw(of_clk_get_by_name(np, "md_slck"));
- if (!td_slck_hw || !md_slck_hw)
- return;
-
main_xtal = of_clk_get(np, main_xtal_index);
if (IS_ERR(main_xtal))
return;
@@ -1097,8 +1092,8 @@ static void __init sama7g5_pmc_setup(struct device_node *np)
sama7g5_mckx[PCK_PARENT_HW_MCK0].hw = sama7g5_pmc->chws[PMC_MCK] = hw;
- parent_data[0] = AT91_CLK_PD_NAME("md_slck", md_slck_index);
- parent_data[1] = AT91_CLK_PD_NAME("td_slck", td_slck_index);
+ parent_data[0] = AT91_CLK_PD_NAME(md_slck_name, md_slck_index);
+ parent_data[1] = AT91_CLK_PD_NAME(td_slck_name, td_slck_index);
parent_data[2] = AT91_CLK_PD_HW(sama7g5_pmc->chws[PMC_MAIN]);
for (i = PCK_PARENT_HW_MCK1; i < ARRAY_SIZE(sama7g5_mckx); i++) {
u8 num_parents = 3 + sama7g5_mckx[i].ep_count;
@@ -1141,8 +1136,8 @@ static void __init sama7g5_pmc_setup(struct device_node *np)
sama7g5_pmc->chws[PMC_UTMI] = hw;
- parent_data[0] = AT91_CLK_PD_NAME("md_slck", md_slck_index);
- parent_data[1] = AT91_CLK_PD_NAME("td_slck", td_slck_index);
+ parent_data[0] = AT91_CLK_PD_NAME(md_slck_name, md_slck_index);
+ parent_data[1] = AT91_CLK_PD_NAME(td_slck_name, td_slck_index);
parent_data[2] = AT91_CLK_PD_HW(sama7g5_pmc->chws[PMC_MAIN]);
parent_data[3] = AT91_CLK_PD_HW(sama7g5_plls[PLL_ID_SYS][PLL_COMPID_DIV0].hw);
parent_data[4] = AT91_CLK_PD_HW(sama7g5_plls[PLL_ID_DDR][PLL_COMPID_DIV0].hw);
@@ -1191,12 +1186,11 @@ static void __init sama7g5_pmc_setup(struct device_node *np)
sama7g5_pmc->phws[sama7g5_periphck[i].id] = hw;
}
- parent_hws[0] = md_slck_hw;
- parent_hws[1] = td_slck_hw;
- parent_hws[2] = sama7g5_pmc->chws[PMC_MAIN];
+ parent_data[0] = AT91_CLK_PD_NAME(md_slck_name, md_slck_index);
+ parent_data[1] = AT91_CLK_PD_NAME(td_slck_name, td_slck_index);
+ parent_data[2] = AT91_CLK_PD_HW(sama7g5_pmc->chws[PMC_MAIN]);
for (i = 0; i < ARRAY_SIZE(sama7g5_gck); i++) {
u8 num_parents = 3 + sama7g5_gck[i].pp_count;
- struct clk_hw *tmp_parent_hws[8];
u32 *mux_table;
mux_table = kmalloc_array(num_parents, sizeof(*mux_table),
@@ -1211,15 +1205,13 @@ static void __init sama7g5_pmc_setup(struct device_node *np)
u8 pll_id = sama7g5_gck[i].pp[j].pll_id;
u8 pll_compid = sama7g5_gck[i].pp[j].pll_compid;
- tmp_parent_hws[j] = sama7g5_plls[pll_id][pll_compid].hw;
+ parent_data[3 + j] = AT91_CLK_PD_HW(sama7g5_plls[pll_id][pll_compid].hw);
}
- PMC_FILL_TABLE(&parent_hws[3], tmp_parent_hws,
- sama7g5_gck[i].pp_count);
hw = at91_clk_register_generated(regmap, &pmc_pcr_lock,
&sama7g5_pcr_layout,
sama7g5_gck[i].n, NULL,
- parent_hws, mux_table,
+ parent_data, mux_table,
num_parents,
sama7g5_gck[i].id,
&sama7g5_gck[i].r,
--
2.43.0
next prev parent reply other threads:[~2025-07-10 20:08 UTC|newest]
Thread overview: 62+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-07-10 20:06 [PATCH v3 00/32] clk: at91: add support for parent_data and Ryan.Wanner
2025-07-10 20:06 ` [PATCH v3 01/32] clk: at91: pmc: add macros for clk_parent_data Ryan.Wanner
2025-08-28 16:52 ` Brian Masney
2025-09-06 18:33 ` claudiu beznea
2025-09-16 1:21 ` Stephen Boyd
2025-07-10 20:06 ` [PATCH v3 02/32] clk: at91: pmc: Move macro to header file Ryan.Wanner
2025-08-28 16:53 ` Brian Masney
2025-07-10 20:06 ` [PATCH v3 03/32] clk: at91: sam9x75: switch to parent_hw and parent_data Ryan.Wanner
2025-08-28 17:38 ` Brian Masney
2025-09-06 18:33 ` Claudiu Beznea
2025-07-10 20:06 ` [PATCH v3 04/32] clk: at91: clk-sam9x60-pll: use clk_parent_data Ryan.Wanner
2025-08-28 17:04 ` Brian Masney
2025-09-06 18:34 ` claudiu beznea
2025-07-10 20:06 ` [PATCH v3 05/32] clk: at91: clk-peripheral: switch to clk_parent_data Ryan.Wanner
2025-09-06 18:34 ` claudiu beznea
2025-07-10 20:06 ` [PATCH v3 06/32] clk: at91: clk-main: switch to clk parent data Ryan.Wanner
2025-09-06 18:35 ` claudiu beznea
2025-07-10 20:07 ` [PATCH v3 07/32] clk: at91: clk-utmi: use clk_parent_data Ryan.Wanner
2025-09-06 18:36 ` claudiu beznea
2025-07-10 20:07 ` [PATCH v3 08/32] clk: at91: clk-master: " Ryan.Wanner
2025-09-06 18:36 ` claudiu beznea
2025-09-16 17:35 ` Ryan Wanner
2025-09-17 6:49 ` Claudiu Beznea
2025-07-10 20:07 ` [PATCH v3 09/32] clk: at91: clk-programmable: " Ryan.Wanner
2025-09-06 18:36 ` claudiu beznea
2025-07-10 20:07 ` Ryan.Wanner [this message]
2025-09-06 18:37 ` [PATCH v3 10/32] clk: at91: clk-generated: " claudiu beznea
2025-07-10 20:07 ` [PATCH v3 11/32] clk: at91: clk-usb: add support for clk_parent_data Ryan.Wanner
2025-09-06 18:37 ` claudiu beznea
2025-07-10 20:07 ` [PATCH v3 12/32] clk: at91: clk-system: use clk_parent_data Ryan.Wanner
2025-07-10 20:07 ` [PATCH v3 13/32] clk: at91: sama7d65: switch to parent_hw and parent_data Ryan.Wanner
2025-09-06 18:39 ` claudiu beznea
2025-07-10 20:07 ` [PATCH v3 14/32] clk: at91: clk-pll: add support for parent_hw Ryan.Wanner
2025-07-10 20:07 ` [PATCH v3 15/32] clk: at91: clk-audio-pll: " Ryan.Wanner
2025-10-20 19:18 ` Claudiu Beznea
2025-07-10 20:07 ` [PATCH v3 16/32] clk: at91: clk-plldiv: " Ryan.Wanner
2025-07-10 20:07 ` [PATCH v3 17/32] clk: at91: clk-h32mx: " Ryan.Wanner
2025-07-10 20:07 ` [PATCH v3 18/32] clk: at91: clk-i2s-mux: " Ryan.Wanner
2025-07-10 20:07 ` [PATCH v3 19/32] clk: at91: clk-smd: add support for clk_parent_data Ryan.Wanner
2025-07-10 20:07 ` [PATCH v3 20/32] clk: at91: clk-slow: add support for parent_hw Ryan.Wanner
2025-07-10 20:07 ` [PATCH v3 21/32] clk: at91: dt-compat: switch to parent_hw and parent_data Ryan.Wanner
2025-07-10 20:07 ` [PATCH v3 22/32] clk: at91: sam9x60: " Ryan.Wanner
2025-09-06 18:46 ` claudiu beznea
2025-07-10 20:07 ` [PATCH v3 23/32] clk: at91: sama5d2: " Ryan.Wanner
2025-09-06 18:48 ` claudiu beznea
2025-07-10 20:07 ` [PATCH v3 24/32] clk: at91: sama5d3: " Ryan.Wanner
2025-09-06 18:49 ` claudiu beznea
2025-07-10 20:07 ` [PATCH v3 25/32] clk: at91: sama5d4: " Ryan.Wanner
2025-09-06 18:51 ` claudiu beznea
2025-07-10 20:07 ` [PATCH v3 26/32] clk: at91: at91sam9x5: " Ryan.Wanner
[not found] ` <10f016fd-2ceb-40b0-a81d-9c5663f65191@tuxon.dev>
2025-09-06 18:52 ` Claudiu Beznea
2025-07-10 20:07 ` [PATCH v3 27/32] clk: at91: at91rm9200: " Ryan.Wanner
2025-07-10 20:07 ` [PATCH v3 28/32] clk: at91: at91sam9260: " Ryan.Wanner
2025-07-10 20:07 ` [PATCH v3 29/32] clk: at91: at91sam9g45: " Ryan.Wanner
2025-07-10 20:07 ` [PATCH v3 30/32] clk: at91: at91sam9n12: " Ryan.Wanner
2025-07-10 20:07 ` [PATCH v3 31/32] clk: at91: at91sam9rl: switch to clk_parent_data Ryan.Wanner
2025-07-10 20:07 ` [PATCH v3 32/32] clk: at91: sam9x7: Clean up formatting Ryan.Wanner
2025-08-27 20:31 ` [PATCH v3 00/32] clk: at91: add support for parent_data and Ryan Wanner
2025-08-28 15:51 ` Brian Masney
2025-08-28 16:16 ` Ryan Wanner
2025-08-28 16:48 ` Brian Masney
2025-08-28 20:40 ` Konstantin Ryabitsev
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