From: claudiu beznea <claudiu.beznea@tuxon.dev>
To: Ryan.Wanner@microchip.com, mturquette@baylibre.com,
sboyd@kernel.org, nicolas.ferre@microchip.com,
alexandre.belloni@bootlin.com
Cc: varshini.rajendran@microchip.com, linux-clk@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, robh@kernel.org
Subject: Re: [PATCH v3 06/32] clk: at91: clk-main: switch to clk parent data
Date: Sat, 6 Sep 2025 21:35:34 +0300 [thread overview]
Message-ID: <e2d8757b-9554-49b0-a067-f5aa657f3003@tuxon.dev> (raw)
In-Reply-To: <33cec8a2f82e1bc747aa4315e47d535b7cec5a63.1752176711.git.Ryan.Wanner@microchip.com>
Hi, Ryan,
On 7/10/25 23:06, Ryan.Wanner@microchip.com wrote:
> From: Claudiu Beznea <claudiu.beznea@tuxon.dev>
>
> Use struct clk_parent_data instead of parent_hw for the main clock.
Same here as in patch 05/32. Please check the other patches as well.
>
> Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
> [ryan.wanner@microchip: Add SAMA7D65 and SAM9X75 SoCs to use parent_data.]
> Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
> ---
> drivers/clk/at91/clk-main.c | 16 ++++++++--------
> drivers/clk/at91/pmc.h | 4 ++--
> drivers/clk/at91/sam9x7.c | 21 ++++++++++-----------
> drivers/clk/at91/sama7d65.c | 21 ++++++++++-----------
> drivers/clk/at91/sama7g5.c | 21 ++++++++++-----------
> 5 files changed, 40 insertions(+), 43 deletions(-)
>
> diff --git a/drivers/clk/at91/clk-main.c b/drivers/clk/at91/clk-main.c
> index 9b462becc693..514c5690253f 100644
> --- a/drivers/clk/at91/clk-main.c
> +++ b/drivers/clk/at91/clk-main.c
> @@ -402,7 +402,7 @@ struct clk_hw * __init
> at91_clk_register_rm9200_main(struct regmap *regmap,
> const char *name,
> const char *parent_name,
> - struct clk_hw *parent_hw)
> + struct clk_parent_data *parent_data)
> {
> struct clk_rm9200_main *clkmain;
> struct clk_init_data init = {};
> @@ -412,7 +412,7 @@ at91_clk_register_rm9200_main(struct regmap *regmap,
> if (!name)
> return ERR_PTR(-EINVAL);
>
> - if (!(parent_name || parent_hw))
> + if (!(parent_name || parent_data))
> return ERR_PTR(-EINVAL);
>
> clkmain = kzalloc(sizeof(*clkmain), GFP_KERNEL);
> @@ -421,8 +421,8 @@ at91_clk_register_rm9200_main(struct regmap *regmap,
>
> init.name = name;
> init.ops = &rm9200_main_ops;
> - if (parent_hw)
> - init.parent_hws = (const struct clk_hw **)&parent_hw;
> + if (parent_data)
> + init.parent_data = (const struct clk_parent_data *)parent_data;
> else
> init.parent_names = &parent_name;
> init.num_parents = 1;
> @@ -552,7 +552,7 @@ struct clk_hw * __init
> at91_clk_register_sam9x5_main(struct regmap *regmap,
> const char *name,
> const char **parent_names,
> - struct clk_hw **parent_hws,
> + struct clk_parent_data *parent_data,
> int num_parents)
> {
> struct clk_sam9x5_main *clkmain;
> @@ -564,7 +564,7 @@ at91_clk_register_sam9x5_main(struct regmap *regmap,
> if (!name)
> return ERR_PTR(-EINVAL);
>
> - if (!(parent_hws || parent_names) || !num_parents)
> + if (!(parent_data || parent_names) || !num_parents)
> return ERR_PTR(-EINVAL);
>
> clkmain = kzalloc(sizeof(*clkmain), GFP_KERNEL);
> @@ -573,8 +573,8 @@ at91_clk_register_sam9x5_main(struct regmap *regmap,
>
> init.name = name;
> init.ops = &sam9x5_main_ops;
> - if (parent_hws)
> - init.parent_hws = (const struct clk_hw **)parent_hws;
> + if (parent_data)
> + init.parent_data = (const struct clk_parent_data *)parent_data;
> else
> init.parent_names = parent_names;
> init.num_parents = num_parents;
> diff --git a/drivers/clk/at91/pmc.h b/drivers/clk/at91/pmc.h
> index b6f2aca1e1fd..e32a5e85d08f 100644
> --- a/drivers/clk/at91/pmc.h
> +++ b/drivers/clk/at91/pmc.h
> @@ -195,11 +195,11 @@ struct clk_hw * __init
> at91_clk_register_rm9200_main(struct regmap *regmap,
> const char *name,
> const char *parent_name,
> - struct clk_hw *parent_hw);
> + struct clk_parent_data *parent_data);
> struct clk_hw * __init
> at91_clk_register_sam9x5_main(struct regmap *regmap, const char *name,
> const char **parent_names,
> - struct clk_hw **parent_hws, int num_parents);
> + struct clk_parent_data *parent_data, int num_parents);
>
> struct clk_hw * __init
> at91_clk_register_master_pres(struct regmap *regmap, const char *name,
> diff --git a/drivers/clk/at91/sam9x7.c b/drivers/clk/at91/sam9x7.c
> index d7dc5f381ebe..eaae05ba21ad 100644
> --- a/drivers/clk/at91/sam9x7.c
> +++ b/drivers/clk/at91/sam9x7.c
> @@ -747,7 +747,7 @@ static void __init sam9x7_pmc_setup(struct device_node *np)
> struct regmap *regmap;
> struct clk_hw *hw, *main_rc_hw, *main_osc_hw, *main_xtal_hw;
> struct clk_hw *td_slck_hw, *md_slck_hw, *usbck_hw;
> - static struct clk_parent_data parent_data;
> + struct clk_parent_data parent_data[2];
> struct clk_hw *parent_hws[9];
> int i, j;
>
> @@ -780,15 +780,14 @@ static void __init sam9x7_pmc_setup(struct device_node *np)
> if (IS_ERR(main_rc_hw))
> goto err_free;
>
> - parent_data.name = main_xtal_name;
> - parent_data.fw_name = main_xtal_name;
> - main_osc_hw = at91_clk_register_main_osc(regmap, "main_osc", NULL, &parent_data, 0);
> + main_osc_hw = at91_clk_register_main_osc(regmap, "main_osc", NULL,
> + &AT91_CLK_PD_NAME(main_xtal_name, main_xtal_index), 0);
here &AT91_CLK_PD_NAME(main_xtal_name)
where main_xtal_name is retrieved with of_clk_get_parent_name(). Same for
the other SoCs touched in this patch. Same approach would have to be taken
into account for patches in this series using main_xtal, md_slck, td_slck
as parents through AT91_CLK_PD_NAME().
> if (IS_ERR(main_osc_hw))
> goto err_free;
>
> - parent_hws[0] = main_rc_hw;
> - parent_hws[1] = main_osc_hw;
> - hw = at91_clk_register_sam9x5_main(regmap, "mainck", NULL, parent_hws, 2);
> + parent_data[0] = AT91_CLK_PD_HW(main_rc_hw);
> + parent_data[1] = AT91_CLK_PD_HW(main_osc_hw);
> + hw = at91_clk_register_sam9x5_main(regmap, "mainck", NULL, parent_data, 2);
> if (IS_ERR(hw))
> goto err_free;
>
> @@ -805,12 +804,12 @@ static void __init sam9x7_pmc_setup(struct device_node *np)
> case PLL_TYPE_FRAC:
> switch (sam9x7_plls[i][j].p) {
> case SAM9X7_PLL_PARENT_MAINCK:
> - parent_data = AT91_CLK_PD_NAME("mainck", -1);
> + parent_data[0] = AT91_CLK_PD_NAME("mainck", -1);
> hw = sam9x7_pmc->chws[PMC_MAIN];
> break;
> case SAM9X7_PLL_PARENT_MAIN_XTAL:
> - parent_data = AT91_CLK_PD_NAME(main_xtal_name,
> - main_xtal_index);
> + parent_data[0] = AT91_CLK_PD_NAME(main_xtal_name,
> + main_xtal_index);
> hw = main_xtal_hw;
> break;
> default:
> @@ -825,7 +824,7 @@ static void __init sam9x7_pmc_setup(struct device_node *np)
> hw = sam9x60_clk_register_frac_pll(regmap,
> &pmc_pll_lock,
> sam9x7_plls[i][j].n,
> - &parent_data, parent_rate, i,
> + parent_data, parent_rate, i,
> sam9x7_plls[i][j].c,
> sam9x7_plls[i][j].l,
> sam9x7_plls[i][j].f);
> diff --git a/drivers/clk/at91/sama7d65.c b/drivers/clk/at91/sama7d65.c
> index 372e530f4107..1d461db0438f 100644
> --- a/drivers/clk/at91/sama7d65.c
> +++ b/drivers/clk/at91/sama7d65.c
> @@ -1098,7 +1098,7 @@ static void __init sama7d65_pmc_setup(struct device_node *np)
> struct regmap *regmap;
> struct clk_hw *hw, *main_rc_hw, *main_osc_hw, *main_xtal_hw;
> struct clk_hw *td_slck_hw, *md_slck_hw;
> - static struct clk_parent_data parent_data;
> + struct clk_parent_data parent_data[2];
> struct clk_hw *parent_hws[10];
> bool bypass;
> int i, j;
> @@ -1134,16 +1134,15 @@ static void __init sama7d65_pmc_setup(struct device_node *np)
>
> bypass = of_property_read_bool(np, "atmel,osc-bypass");
>
> - parent_data.name = main_xtal_name;
> - parent_data.fw_name = main_xtal_name;
> main_osc_hw = at91_clk_register_main_osc(regmap, "main_osc", NULL,
> - &parent_data, bypass);
> + &AT91_CLK_PD_NAME(main_xtal_name, main_xtal_index),
> + bypass);
> if (IS_ERR(main_osc_hw))
> goto err_free;
>
> - parent_hws[0] = main_rc_hw;
> - parent_hws[1] = main_osc_hw;
> - hw = at91_clk_register_sam9x5_main(regmap, "mainck", NULL, parent_hws, 2);
> + parent_data[0] = AT91_CLK_PD_HW(main_rc_hw);
> + parent_data[1] = AT91_CLK_PD_HW(main_osc_hw);
> + hw = at91_clk_register_sam9x5_main(regmap, "mainck", NULL, parent_data, 2);
> if (IS_ERR(hw))
> goto err_free;
>
> @@ -1160,12 +1159,12 @@ static void __init sama7d65_pmc_setup(struct device_node *np)
> case PLL_TYPE_FRAC:
> switch (sama7d65_plls[i][j].p) {
> case SAMA7D65_PLL_PARENT_MAINCK:
> - parent_data = AT91_CLK_PD_NAME("mainck", -1);
> + parent_data[0] = AT91_CLK_PD_NAME("mainck", -1);
> hw = sama7d65_pmc->chws[PMC_MAIN];
> break;
> case SAMA7D65_PLL_PARENT_MAIN_XTAL:
> - parent_data = AT91_CLK_PD_NAME(main_xtal_name,
> - main_xtal_index);
> + parent_data[0] = AT91_CLK_PD_NAME(main_xtal_name,
> + main_xtal_index);
> hw = main_xtal_hw;
> break;
> default:
> @@ -1178,7 +1177,7 @@ static void __init sama7d65_pmc_setup(struct device_node *np)
>
> hw = sam9x60_clk_register_frac_pll(regmap,
> &pmc_pll_lock, sama7d65_plls[i][j].n,
> - &parent_data, parent_rate, i,
> + parent_data, parent_rate, i,
> sama7d65_plls[i][j].c,
> sama7d65_plls[i][j].l,
> sama7d65_plls[i][j].f);
> diff --git a/drivers/clk/at91/sama7g5.c b/drivers/clk/at91/sama7g5.c
> index f28fe419ae5e..f816a5551277 100644
> --- a/drivers/clk/at91/sama7g5.c
> +++ b/drivers/clk/at91/sama7g5.c
> @@ -977,7 +977,7 @@ static void __init sama7g5_pmc_setup(struct device_node *np)
> struct regmap *regmap;
> struct clk_hw *hw, *main_rc_hw, *main_osc_hw, *main_xtal_hw;
> struct clk_hw *td_slck_hw, *md_slck_hw;
> - static struct clk_parent_data parent_data;
> + struct clk_parent_data parent_data[2];
> struct clk_hw *parent_hws[10];
> bool bypass;
> int i, j;
> @@ -1013,16 +1013,15 @@ static void __init sama7g5_pmc_setup(struct device_node *np)
>
> bypass = of_property_read_bool(np, "atmel,osc-bypass");
>
> - parent_data.name = main_xtal_name;
> - parent_data.fw_name = main_xtal_name;
> main_osc_hw = at91_clk_register_main_osc(regmap, "main_osc", NULL,
> - &parent_data, bypass);
> + &AT91_CLK_PD_NAME(main_xtal_name, main_xtal_index),
> + bypass);
> if (IS_ERR(main_osc_hw))
> goto err_free;
>
> - parent_hws[0] = main_rc_hw;
> - parent_hws[1] = main_osc_hw;
> - hw = at91_clk_register_sam9x5_main(regmap, "mainck", NULL, parent_hws, 2);
> + parent_data[0] = AT91_CLK_PD_HW(main_rc_hw);
> + parent_data[1] = AT91_CLK_PD_HW(main_osc_hw);
> + hw = at91_clk_register_sam9x5_main(regmap, "mainck", NULL, parent_data, 2);
> if (IS_ERR(hw))
> goto err_free;
>
> @@ -1039,12 +1038,12 @@ static void __init sama7g5_pmc_setup(struct device_node *np)
> case PLL_TYPE_FRAC:
> switch (sama7g5_plls[i][j].p) {
> case SAMA7G5_PLL_PARENT_MAINCK:
> - parent_data = AT91_CLK_PD_NAME("mainck", -1);
> + parent_data[0] = AT91_CLK_PD_NAME("mainck", -1);
> hw = sama7g5_pmc->chws[PMC_MAIN];
> break;
> case SAMA7G5_PLL_PARENT_MAIN_XTAL:
> - parent_data = AT91_CLK_PD_NAME(main_xtal_name,
> - main_xtal_index);
> + parent_data[0] = AT91_CLK_PD_NAME(main_xtal_name,
> + main_xtal_index);
> hw = main_xtal_hw;
> break;
> default:
> @@ -1058,7 +1057,7 @@ static void __init sama7g5_pmc_setup(struct device_node *np)
>
> hw = sam9x60_clk_register_frac_pll(regmap,
> &pmc_pll_lock, sama7g5_plls[i][j].n,
> - &parent_data, parent_rate, i,
> + parent_data, parent_rate, i,
> sama7g5_plls[i][j].c,
> sama7g5_plls[i][j].l,
> sama7g5_plls[i][j].f);
next prev parent reply other threads:[~2025-09-06 18:35 UTC|newest]
Thread overview: 62+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-07-10 20:06 [PATCH v3 00/32] clk: at91: add support for parent_data and Ryan.Wanner
2025-07-10 20:06 ` [PATCH v3 01/32] clk: at91: pmc: add macros for clk_parent_data Ryan.Wanner
2025-08-28 16:52 ` Brian Masney
2025-09-06 18:33 ` claudiu beznea
2025-09-16 1:21 ` Stephen Boyd
2025-07-10 20:06 ` [PATCH v3 02/32] clk: at91: pmc: Move macro to header file Ryan.Wanner
2025-08-28 16:53 ` Brian Masney
2025-07-10 20:06 ` [PATCH v3 03/32] clk: at91: sam9x75: switch to parent_hw and parent_data Ryan.Wanner
2025-08-28 17:38 ` Brian Masney
2025-09-06 18:33 ` Claudiu Beznea
2025-07-10 20:06 ` [PATCH v3 04/32] clk: at91: clk-sam9x60-pll: use clk_parent_data Ryan.Wanner
2025-08-28 17:04 ` Brian Masney
2025-09-06 18:34 ` claudiu beznea
2025-07-10 20:06 ` [PATCH v3 05/32] clk: at91: clk-peripheral: switch to clk_parent_data Ryan.Wanner
2025-09-06 18:34 ` claudiu beznea
2025-07-10 20:06 ` [PATCH v3 06/32] clk: at91: clk-main: switch to clk parent data Ryan.Wanner
2025-09-06 18:35 ` claudiu beznea [this message]
2025-07-10 20:07 ` [PATCH v3 07/32] clk: at91: clk-utmi: use clk_parent_data Ryan.Wanner
2025-09-06 18:36 ` claudiu beznea
2025-07-10 20:07 ` [PATCH v3 08/32] clk: at91: clk-master: " Ryan.Wanner
2025-09-06 18:36 ` claudiu beznea
2025-09-16 17:35 ` Ryan Wanner
2025-09-17 6:49 ` Claudiu Beznea
2025-07-10 20:07 ` [PATCH v3 09/32] clk: at91: clk-programmable: " Ryan.Wanner
2025-09-06 18:36 ` claudiu beznea
2025-07-10 20:07 ` [PATCH v3 10/32] clk: at91: clk-generated: " Ryan.Wanner
2025-09-06 18:37 ` claudiu beznea
2025-07-10 20:07 ` [PATCH v3 11/32] clk: at91: clk-usb: add support for clk_parent_data Ryan.Wanner
2025-09-06 18:37 ` claudiu beznea
2025-07-10 20:07 ` [PATCH v3 12/32] clk: at91: clk-system: use clk_parent_data Ryan.Wanner
2025-07-10 20:07 ` [PATCH v3 13/32] clk: at91: sama7d65: switch to parent_hw and parent_data Ryan.Wanner
2025-09-06 18:39 ` claudiu beznea
2025-07-10 20:07 ` [PATCH v3 14/32] clk: at91: clk-pll: add support for parent_hw Ryan.Wanner
2025-07-10 20:07 ` [PATCH v3 15/32] clk: at91: clk-audio-pll: " Ryan.Wanner
2025-10-20 19:18 ` Claudiu Beznea
2025-07-10 20:07 ` [PATCH v3 16/32] clk: at91: clk-plldiv: " Ryan.Wanner
2025-07-10 20:07 ` [PATCH v3 17/32] clk: at91: clk-h32mx: " Ryan.Wanner
2025-07-10 20:07 ` [PATCH v3 18/32] clk: at91: clk-i2s-mux: " Ryan.Wanner
2025-07-10 20:07 ` [PATCH v3 19/32] clk: at91: clk-smd: add support for clk_parent_data Ryan.Wanner
2025-07-10 20:07 ` [PATCH v3 20/32] clk: at91: clk-slow: add support for parent_hw Ryan.Wanner
2025-07-10 20:07 ` [PATCH v3 21/32] clk: at91: dt-compat: switch to parent_hw and parent_data Ryan.Wanner
2025-07-10 20:07 ` [PATCH v3 22/32] clk: at91: sam9x60: " Ryan.Wanner
2025-09-06 18:46 ` claudiu beznea
2025-07-10 20:07 ` [PATCH v3 23/32] clk: at91: sama5d2: " Ryan.Wanner
2025-09-06 18:48 ` claudiu beznea
2025-07-10 20:07 ` [PATCH v3 24/32] clk: at91: sama5d3: " Ryan.Wanner
2025-09-06 18:49 ` claudiu beznea
2025-07-10 20:07 ` [PATCH v3 25/32] clk: at91: sama5d4: " Ryan.Wanner
2025-09-06 18:51 ` claudiu beznea
2025-07-10 20:07 ` [PATCH v3 26/32] clk: at91: at91sam9x5: " Ryan.Wanner
[not found] ` <10f016fd-2ceb-40b0-a81d-9c5663f65191@tuxon.dev>
2025-09-06 18:52 ` Claudiu Beznea
2025-07-10 20:07 ` [PATCH v3 27/32] clk: at91: at91rm9200: " Ryan.Wanner
2025-07-10 20:07 ` [PATCH v3 28/32] clk: at91: at91sam9260: " Ryan.Wanner
2025-07-10 20:07 ` [PATCH v3 29/32] clk: at91: at91sam9g45: " Ryan.Wanner
2025-07-10 20:07 ` [PATCH v3 30/32] clk: at91: at91sam9n12: " Ryan.Wanner
2025-07-10 20:07 ` [PATCH v3 31/32] clk: at91: at91sam9rl: switch to clk_parent_data Ryan.Wanner
2025-07-10 20:07 ` [PATCH v3 32/32] clk: at91: sam9x7: Clean up formatting Ryan.Wanner
2025-08-27 20:31 ` [PATCH v3 00/32] clk: at91: add support for parent_data and Ryan Wanner
2025-08-28 15:51 ` Brian Masney
2025-08-28 16:16 ` Ryan Wanner
2025-08-28 16:48 ` Brian Masney
2025-08-28 20:40 ` Konstantin Ryabitsev
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