From: "Suthikulpanit, Suravee" <suravee.suthikulpanit@amd.com>
To: Jason Gunthorpe <jgg@nvidia.com>
Cc: linux-kernel@vger.kernel.org, iommu@lists.linux.dev,
joro@8bytes.org, yi.l.liu@intel.com, kevin.tian@intel.com,
nicolinc@nvidia.com, vasant.hegde@amd.com, jon.grimm@amd.com,
santosh.shukla@amd.com, Sairaj.K@amd.com, jay.chen@amd.com,
wvw@google.com, wnliu@google.com, dantuluris@google.com,
chriscli@google.com, kpsingh@google.com,
alejandro.j.jimenez@oracle.com, joao.m.martins@oracle.com
Subject: Re: [PATCH 13/24] iommu/amd: Assign IOMMU Private Address domain to IOMMU
Date: Tue, 8 Sep 2026 13:57:48 +0700 [thread overview]
Message-ID: <78e40c23-b033-46a7-af7b-75cdf7148e61@amd.com> (raw)
In-Reply-To: <178759229635.3131778.5081474165505014029.b4-review@b4>
On 8/25/2026 12:24 AM, Jason Gunthorpe wrote:
>> [ ... 39 lines skipped ... ]
>> +void amd_iommu_free_dev_data(struct amd_iommu *iommu,
>> + struct iommu_dev_data *dev_data)
>> +{
>> + struct amd_iommu_pci_seg *pci_seg = iommu->pci_seg;
>> + struct llist_node *prev = NULL, *node;
>> +
>> + if (!dev_data)
>> + return;
>> +
>> + for (node = pci_seg->dev_data_list.first; node;
>> + prev = node, node = node->next) {
>> + if (node == &dev_data->dev_data_list) {
>> + if (prev)
>> + prev->next = node->next;
>> + else
>> + pci_seg->dev_data_list.first = node->next;
>> + break;
>
> Why is this open coding llist manipulation? That stuff is tricky, if
> you can't do the mutation you want using the existing helpers then you
> probably shouldn't be using llist..
For v5, I'm replacing the per-segment llist of iommu_dev_data with an
xarray keyed by devid so lookup is O(1) and a given id can be removed on
teardown.
>
>> [ ... 45 lines skipped ... ]
>> +static void set_dte_ipa(struct amd_iommu *iommu, struct dev_table_entry *new)
>> +{
>
> This is a strange name for a function that fills a DTE with the paging
> domain for the "viommu_pdom"
>
Removing this in V5.
>> [ ... 7 lines skipped ... ]
>> int __init amd_viommu_init(struct amd_iommu *iommu)
>> {
>> int ret;
>> + bool dte_set = false;
>> + struct dev_table_entry new = {};
>>
>> if (!amd_iommu_viommu ||
>> !check_feature(FEATURE_VIOMMU))
>> return 0;
>>
>> + iommu->viommu_dev_data = amd_iommu_alloc_dev_data(iommu, iommu->devid);
>> + if (!iommu->viommu_dev_data) {
>> + pr_err("%s: Failed to allocate dev_data\n", __func__);
>> + return -ENOMEM;
>> + }
>> + iommu->viommu_dev_data->dev = &iommu->dev->dev;
>> +
>> ret = viommu_init_pci_vsc(iommu);
>> if (ret)
>> - return ret;
>> + goto err_dev_data;
>>
>> ret = viommu_vf_vfcntl_init(iommu);
>> if (ret)
>> - return ret;
>> + goto err_dev_data;
>>
>> amd_viommu_gid_ida_init(iommu);
>>
>> @@ -318,5 +355,15 @@ int __init amd_viommu_init(struct amd_iommu *iommu)
>> if (ret)
>> return ret;
>>
>> + /* Set DTE for IOMMU device */
>> + amd_iommu_make_clear_dte(iommu, iommu->devid, &new);
>> + set_dte_ipa(iommu, &new);
>> + amd_iommu_update_dte(iommu, iommu->viommu_dev_data, &new);
>> + dte_set = true;
>
> Why split this so far from the alloc_dev_data() ? The dte set cannot
> even fail?
>
> If you make the alloc and set one function then the free function
> viommu_free_self_dev_data() will naturally pair and no need for the
> weird dte_set
Ok, I'll clean up this part in V5.
Thanks,
Suravee
next prev parent reply other threads:[~2026-09-08 6:58 UTC|newest]
Thread overview: 71+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-27 13:28 [PATCH v4 00/24] iommu/amd: Introduce AMD Hardware-accelerated Virtualized IOMMU (vIOMMU) Support Suravee Suthikulpanit
2026-07-27 13:28 ` [PATCH 01/24] iommu/amd: Make amd_iommu_completion_wait() non-static Suravee Suthikulpanit
2026-08-05 17:01 ` Vasant Hegde
2026-09-01 7:56 ` Suthikulpanit, Suravee
2026-07-27 13:28 ` [PATCH 02/24] iommu/amd: Introduce vIOMMU-specific events and event Suravee Suthikulpanit
2026-08-10 7:12 ` Vasant Hegde
2026-09-01 8:28 ` Suthikulpanit, Suravee
2026-08-19 8:17 ` guanghuifeng
2026-09-01 14:21 ` Suthikulpanit, Suravee
2026-07-27 13:28 ` [PATCH 03/24] iommu/amd: Detect and initialize AMD vIOMMU feature Suravee Suthikulpanit
2026-08-10 8:13 ` Vasant Hegde
2026-09-01 16:32 ` Suthikulpanit, Suravee
2026-07-27 13:28 ` [PATCH 04/24] iommu/amd: Introduce IOMMUFD vIOMMU support for AMD Suravee Suthikulpanit
2026-08-24 17:24 ` Jason Gunthorpe
2026-07-27 13:28 ` [PATCH 05/24] iommu/amd: Allocate Guest IDs for IOMMUFD vIOMMU instances Suravee Suthikulpanit
2026-08-10 9:21 ` Vasant Hegde
2026-09-02 7:49 ` Suthikulpanit, Suravee
2026-08-24 17:24 ` Jason Gunthorpe
2026-09-02 7:50 ` Suthikulpanit, Suravee
2026-07-27 13:28 ` [PATCH 06/24] iommu/amd: Map vIOMMU VF and VF Control MMIO BARs Suravee Suthikulpanit
2026-08-10 10:00 ` Vasant Hegde
2026-09-02 12:16 ` Suthikulpanit, Suravee
2026-08-19 13:18 ` guanghuifeng
2026-09-02 12:16 ` Suthikulpanit, Suravee
2026-07-27 13:28 ` [PATCH 07/24] iommu/amd: Add support for AMD vIOMMU VF MMIO region Suravee Suthikulpanit
2026-08-10 10:49 ` Vasant Hegde
2026-08-24 17:24 ` Jason Gunthorpe
2026-07-27 13:28 ` [PATCH 08/24] iommu/amd: Introduce Reset vMMIO Command Suravee Suthikulpanit
2026-08-19 8:34 ` guanghuifeng
2026-09-02 22:33 ` Suthikulpanit, Suravee
2026-07-27 13:28 ` [PATCH 09/24] iommu/amd: Introduce and map vIOMMU private IPA region Suravee Suthikulpanit
2026-08-24 17:24 ` Jason Gunthorpe
2026-07-27 13:28 ` [PATCH 10/24] iommu/amd: Pass iommu to device_flush_dte() Suravee Suthikulpanit
2026-08-10 11:07 ` Vasant Hegde
2026-08-24 17:24 ` Jason Gunthorpe
2026-07-27 13:29 ` [PATCH 11/24] iommu/amd: Export amd_iommu_alloc_dev_data() helper Suravee Suthikulpanit
2026-08-24 17:24 ` Jason Gunthorpe
2026-07-27 13:29 ` [PATCH 12/24] iommu/amd: Pass iommu and devid to amd_iommu_make_clear_dte() Suravee Suthikulpanit
2026-08-24 17:24 ` Jason Gunthorpe
2026-07-27 13:29 ` [PATCH 13/24] iommu/amd: Assign IOMMU Private Address domain to IOMMU Suravee Suthikulpanit
2026-08-24 17:24 ` Jason Gunthorpe
2026-09-08 6:57 ` Suthikulpanit, Suravee [this message]
2026-07-27 13:29 ` [PATCH 14/24] iommu/amd: Add per-VM private IPA alloc/map helpers Suravee Suthikulpanit
2026-08-24 17:24 ` Jason Gunthorpe
2026-07-27 13:29 ` [PATCH 15/24] iommu/amd: Add helper functions to manage DevID / DomID mapping tables Suravee Suthikulpanit
2026-08-19 13:30 ` guanghuifeng
2026-09-03 0:41 ` Suthikulpanit, Suravee
2026-07-27 13:29 ` [PATCH 16/24] iommu/amd: Introduce IOMMUFD vDevice support for AMD Suravee Suthikulpanit
2026-08-19 13:34 ` guanghuifeng
2026-09-03 2:41 ` Suthikulpanit, Suravee
2026-08-24 17:24 ` Jason Gunthorpe
2026-07-27 13:29 ` [PATCH 17/24] iommu/amd: Introduce helper function for updating domain ID mapping table Suravee Suthikulpanit
2026-08-19 10:45 ` guanghuifeng
2026-09-03 3:26 ` Suthikulpanit, Suravee
2026-07-27 13:29 ` [PATCH 18/24] iommu/amd: Introduce helper function for updating device " Suravee Suthikulpanit
2026-08-10 15:17 ` Vasant Hegde
2026-09-03 3:19 ` Suthikulpanit, Suravee
2026-08-19 10:26 ` guanghuifeng
2026-09-08 9:40 ` Suthikulpanit, Suravee
2026-07-27 13:29 ` [PATCH 19/24] iommu/amd: Add per-segment translate device ID pool Suravee Suthikulpanit
2026-07-27 13:29 ` [PATCH 20/24] iommu/amd: Reserve translate-device-id for PCI requestor aliases Suravee Suthikulpanit
2026-07-27 13:29 ` [PATCH 21/24] iommu/amd: Add translation DTE and VFctrl TransDevID helpers Suravee Suthikulpanit
2026-07-27 13:29 ` [PATCH 22/24] iommu/amd: Add translate-device-id alloc/free with vIOMMU owner Suravee Suthikulpanit
2026-07-27 13:29 ` [PATCH 23/24] iommu/amd: Assign per-vIOMMU translate device ID Suravee Suthikulpanit
2026-08-19 10:18 ` guanghuifeng
2026-09-08 11:42 ` Suthikulpanit, Suravee
2026-07-27 13:29 ` [PATCH 24/24] iommu/amd: Relocate vIOMMU translate-device-id on PCI reserve Suravee Suthikulpanit
2026-08-19 9:42 ` guanghuifeng
2026-09-03 3:56 ` Suthikulpanit, Suravee
2026-08-11 7:18 ` [PATCH v4 00/24] iommu/amd: Introduce AMD Hardware-accelerated Virtualized IOMMU (vIOMMU) Support Tian, Kevin
2026-08-24 17:24 ` Jason Gunthorpe
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=78e40c23-b033-46a7-af7b-75cdf7148e61@amd.com \
--to=suravee.suthikulpanit@amd.com \
--cc=Sairaj.K@amd.com \
--cc=alejandro.j.jimenez@oracle.com \
--cc=chriscli@google.com \
--cc=dantuluris@google.com \
--cc=iommu@lists.linux.dev \
--cc=jay.chen@amd.com \
--cc=jgg@nvidia.com \
--cc=joao.m.martins@oracle.com \
--cc=jon.grimm@amd.com \
--cc=joro@8bytes.org \
--cc=kevin.tian@intel.com \
--cc=kpsingh@google.com \
--cc=linux-kernel@vger.kernel.org \
--cc=nicolinc@nvidia.com \
--cc=santosh.shukla@amd.com \
--cc=vasant.hegde@amd.com \
--cc=wnliu@google.com \
--cc=wvw@google.com \
--cc=yi.l.liu@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
all inboxes | Powered by JetHome®