From: Tom Lendacky <thomas.lendacky@amd.com>
To: Borislav Petkov <bp@alien8.de>, Kai Huang <kai.huang@intel.com>
Cc: dave.hansen@intel.com, tglx@linutronix.de, peterz@infradead.org,
mingo@redhat.com, hpa@zytor.com, x86@kernel.org,
kirill.shutemov@linux.intel.com, rick.p.edgecombe@intel.com,
linux-kernel@vger.kernel.org, pbonzini@redhat.com,
seanjc@google.com, kvm@vger.kernel.org,
reinette.chatre@intel.com, isaku.yamahata@intel.com,
dan.j.williams@intel.com, ashish.kalra@amd.com,
nik.borisov@suse.com, sagis@google.com
Subject: Re: [PATCH v3 1/6] x86/sme: Use percpu boolean to control wbinvd during kexec
Date: Sat, 28 Jun 2025 12:04:16 -0500 [thread overview]
Message-ID: <92c7f4b9-5f08-f01e-a711-69fef94c2628@amd.com> (raw)
In-Reply-To: <20250628125001.GDaF_k-e2KTo4QlKjl@fat_crate.local>
On 6/28/25 07:50, Borislav Petkov wrote:
> On Thu, Jun 26, 2025 at 10:48:47PM +1200, Kai Huang wrote:
>
>> + * support SME. This provides support for performing a successful
>> + * kexec when going from SME inactive to SME active (or vice-versa).
>> + *
>> + * The cache must be cleared so that if there are entries with the
>> + * same physical address, both with and without the encryption bit,
>> + * they don't race each other when flushed and potentially end up
>> + * with the wrong entry being committed to memory.
>> + *
>> + * Test the CPUID bit directly because the machine might've cleared
>> + * X86_FEATURE_SME due to cmdline options.
>
> Where?
>
> That same function does the clearing later...
I think he means that if this function does clear X86_FEATURE_SME during
the BSP boot, then when the APs boot they won't see the feature set, so
you have to check the CPUID information directly. So maybe that can better
worded.
I did verify that booting with mem_encrypt=off will start with
X86_FEATURE_SME set, the BSP will clear it and then all APs will not see
it set after that.
Thanks,
Tom
>
next prev parent reply other threads:[~2025-06-28 17:04 UTC|newest]
Thread overview: 42+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-06-26 10:48 [PATCH v3 0/6] TDX host: kexec/kdump support Kai Huang
2025-06-26 10:48 ` [PATCH v3 1/6] x86/sme: Use percpu boolean to control wbinvd during kexec Kai Huang
2025-06-26 17:59 ` Edgecombe, Rick P
2025-06-26 18:42 ` Edgecombe, Rick P
2025-06-27 0:30 ` Huang, Kai
2025-06-30 7:09 ` Binbin Wu
2025-06-27 0:37 ` Huang, Kai
2025-06-27 0:39 ` Edgecombe, Rick P
2025-06-27 1:06 ` Huang, Kai
2025-06-27 15:08 ` Tom Lendacky
2025-06-30 11:35 ` Huang, Kai
2025-06-28 12:50 ` Borislav Petkov
2025-06-28 17:04 ` Tom Lendacky [this message]
2025-06-30 11:34 ` Huang, Kai
2025-06-30 11:34 ` Huang, Kai
2025-07-01 12:12 ` Borislav Petkov
2025-07-02 3:06 ` Huang, Kai
2025-06-26 10:48 ` [PATCH v3 2/6] x86/virt/tdx: Mark memory cache state incoherent when making SEAMCALL Kai Huang
2025-06-26 18:37 ` Edgecombe, Rick P
2025-06-26 23:36 ` Huang, Kai
2025-06-27 0:52 ` Edgecombe, Rick P
2025-06-27 1:47 ` Huang, Kai
2025-06-26 10:48 ` [PATCH v3 3/6] x86/kexec: Disable kexec/kdump on platforms with TDX partial write erratum Kai Huang
2025-06-26 18:49 ` Edgecombe, Rick P
2025-07-01 5:37 ` Binbin Wu
2025-07-02 3:12 ` Huang, Kai
2025-07-02 8:25 ` Chao Gao
2025-07-02 8:43 ` Huang, Kai
2025-07-02 22:16 ` Vishal Annapurve
2025-07-02 23:57 ` Edgecombe, Rick P
2025-06-26 10:48 ` [PATCH v3 4/6] x86/virt/tdx: Remove the !KEXEC_CORE dependency Kai Huang
2025-06-26 18:49 ` Edgecombe, Rick P
2025-06-26 10:48 ` [PATCH v3 5/6] x86/virt/tdx: Update the kexec section in the TDX documentation Kai Huang
2025-06-26 18:51 ` Edgecombe, Rick P
2025-06-26 10:48 ` [PATCH v3 6/6] KVM: TDX: Explicitly do WBINVD upon reboot notifier Kai Huang
2025-06-27 0:01 ` Edgecombe, Rick P
2025-06-27 1:00 ` Huang, Kai
2025-07-01 6:09 ` Binbin Wu
2025-07-02 3:14 ` Huang, Kai
2025-07-02 7:54 ` Chao Gao
2025-07-02 9:22 ` Huang, Kai
2025-07-07 12:37 ` Huang, Kai
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