From: "Huang, Kai" <kai.huang@intel.com>
To: "bp@alien8.de" <bp@alien8.de>
Cc: "kvm@vger.kernel.org" <kvm@vger.kernel.org>,
"ashish.kalra@amd.com" <ashish.kalra@amd.com>,
"Hansen, Dave" <dave.hansen@intel.com>,
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"kirill.shutemov@linux.intel.com"
<kirill.shutemov@linux.intel.com>,
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"mingo@redhat.com" <mingo@redhat.com>,
"Yamahata, Isaku" <isaku.yamahata@intel.com>,
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"Edgecombe, Rick P" <rick.p.edgecombe@intel.com>,
"x86@kernel.org" <x86@kernel.org>,
"Williams, Dan J" <dan.j.williams@intel.com>
Subject: Re: [PATCH v3 1/6] x86/sme: Use percpu boolean to control wbinvd during kexec
Date: Mon, 30 Jun 2025 11:34:34 +0000 [thread overview]
Message-ID: <e7d539757247e603e0e5511d1e26bfcd58d308d1.camel@intel.com> (raw)
In-Reply-To: <20250628125001.GDaF_k-e2KTo4QlKjl@fat_crate.local>
On Sat, 2025-06-28 at 14:50 +0200, Borislav Petkov wrote:
> On Thu, Jun 26, 2025 at 10:48:47PM +1200, Kai Huang wrote:
>
> ...
>
> > Doing WBINVD in stop_this_cpu() could potentially increase the chance to
> > trigger the above "race" despite it's still rare to happen.
>
> Oh the amount of text...
>
> Please run it and all your comments through AI to simplify formulations etc.
> It is a lot to read.
Hi Boris,
Thanks for the comments.
Yeah I agree the text can be improved. I tried to run AI to simplify but so
far I am not quite happy about the result yet. I'll try more.
>
> > Signed-off-by: Kai Huang <kai.huang@intel.com>
> > ---
> > arch/x86/include/asm/kexec.h | 2 +-
> > arch/x86/include/asm/processor.h | 2 ++
> > arch/x86/kernel/cpu/amd.c | 16 ++++++++++++++++
> > arch/x86/kernel/machine_kexec_64.c | 15 ++++++++++-----
> > arch/x86/kernel/process.c | 16 +++-------------
> > arch/x86/kernel/relocate_kernel_64.S | 15 +++++++++++----
> > 6 files changed, 43 insertions(+), 23 deletions(-)
> >
> > diff --git a/arch/x86/include/asm/kexec.h b/arch/x86/include/asm/kexec.h
> > index f2ad77929d6e..d7e93522b93d 100644
> > --- a/arch/x86/include/asm/kexec.h
> > +++ b/arch/x86/include/asm/kexec.h
> > @@ -122,7 +122,7 @@ relocate_kernel_fn(unsigned long indirection_page,
> > unsigned long pa_control_page,
> > unsigned long start_address,
> > unsigned int preserve_context,
> > - unsigned int host_mem_enc_active);
> > + unsigned int cache_incoherent);
>
> So preserve_context and cache_incoherent are both a *single* bit of
> information. And we use two u32s for that?!?!
>
> How about flags please?
Yeah I agree a single u32 + flags is better. However this is the problem in
the existing code (this patch only does renaming).
I think I can come up with a patch to clean this up and put it as the first
patch of this series, or I can do a patch to clean this up after this series
(either together with this series, or separately at a later time). Which
way do you prefer?
>
> > #endif
> > extern relocate_kernel_fn relocate_kernel;
> > #define ARCH_HAS_KIMAGE_ARCH
> > diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h
> > index bde58f6510ac..a24c7805acdb 100644
> > --- a/arch/x86/include/asm/processor.h
> > +++ b/arch/x86/include/asm/processor.h
> > @@ -731,6 +731,8 @@ void __noreturn stop_this_cpu(void *dummy);
> > void microcode_check(struct cpuinfo_x86 *prev_info);
> > void store_cpu_caps(struct cpuinfo_x86 *info);
> >
>
> So much text above - not a single comment here explaining what this var is
> for.
Agreed a comment is needed. How about below?
/*
* The cache may be in an incoherent state (e.g., due to memory
* encryption) and needs flushing during kexec.
*/
>
> > +DECLARE_PER_CPU(bool, cache_state_incoherent);
> > +
> > enum l1tf_mitigations {
> > L1TF_MITIGATION_OFF,
> > L1TF_MITIGATION_AUTO,
> > diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
> > index f18f540db58c..4c7fde344216 100644
> > --- a/arch/x86/kernel/cpu/amd.c
> > +++ b/arch/x86/kernel/cpu/amd.c
> > @@ -503,6 +503,22 @@ static void early_detect_mem_encrypt(struct cpuinfo_x86 *c)
> > {
> > u64 msr;
> >
> > + /*
> > + * Mark using wbinvd is needed during kexec on processors that
>
> For all text: write insns in caps pls - WBINVD.
Will do.
>
> > + * support SME. This provides support for performing a successful
> > + * kexec when going from SME inactive to SME active (or vice-versa).
> > + *
> > + * The cache must be cleared so that if there are entries with the
> > + * same physical address, both with and without the encryption bit,
> > + * they don't race each other when flushed and potentially end up
> > + * with the wrong entry being committed to memory.
> > + *
> > + * Test the CPUID bit directly because the machine might've cleared
> > + * X86_FEATURE_SME due to cmdline options.
>
> Where?
>
> That same function does the clearing later...
IIUC the X86_FEATURE_SME could be cleared via 'clearcpuid' kernel cmdline.
Please also see my reply to Tom.
next prev parent reply other threads:[~2025-06-30 11:35 UTC|newest]
Thread overview: 42+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-06-26 10:48 [PATCH v3 0/6] TDX host: kexec/kdump support Kai Huang
2025-06-26 10:48 ` [PATCH v3 1/6] x86/sme: Use percpu boolean to control wbinvd during kexec Kai Huang
2025-06-26 17:59 ` Edgecombe, Rick P
2025-06-26 18:42 ` Edgecombe, Rick P
2025-06-27 0:30 ` Huang, Kai
2025-06-30 7:09 ` Binbin Wu
2025-06-27 0:37 ` Huang, Kai
2025-06-27 0:39 ` Edgecombe, Rick P
2025-06-27 1:06 ` Huang, Kai
2025-06-27 15:08 ` Tom Lendacky
2025-06-30 11:35 ` Huang, Kai
2025-06-28 12:50 ` Borislav Petkov
2025-06-28 17:04 ` Tom Lendacky
2025-06-30 11:34 ` Huang, Kai
2025-06-30 11:34 ` Huang, Kai [this message]
2025-07-01 12:12 ` Borislav Petkov
2025-07-02 3:06 ` Huang, Kai
2025-06-26 10:48 ` [PATCH v3 2/6] x86/virt/tdx: Mark memory cache state incoherent when making SEAMCALL Kai Huang
2025-06-26 18:37 ` Edgecombe, Rick P
2025-06-26 23:36 ` Huang, Kai
2025-06-27 0:52 ` Edgecombe, Rick P
2025-06-27 1:47 ` Huang, Kai
2025-06-26 10:48 ` [PATCH v3 3/6] x86/kexec: Disable kexec/kdump on platforms with TDX partial write erratum Kai Huang
2025-06-26 18:49 ` Edgecombe, Rick P
2025-07-01 5:37 ` Binbin Wu
2025-07-02 3:12 ` Huang, Kai
2025-07-02 8:25 ` Chao Gao
2025-07-02 8:43 ` Huang, Kai
2025-07-02 22:16 ` Vishal Annapurve
2025-07-02 23:57 ` Edgecombe, Rick P
2025-06-26 10:48 ` [PATCH v3 4/6] x86/virt/tdx: Remove the !KEXEC_CORE dependency Kai Huang
2025-06-26 18:49 ` Edgecombe, Rick P
2025-06-26 10:48 ` [PATCH v3 5/6] x86/virt/tdx: Update the kexec section in the TDX documentation Kai Huang
2025-06-26 18:51 ` Edgecombe, Rick P
2025-06-26 10:48 ` [PATCH v3 6/6] KVM: TDX: Explicitly do WBINVD upon reboot notifier Kai Huang
2025-06-27 0:01 ` Edgecombe, Rick P
2025-06-27 1:00 ` Huang, Kai
2025-07-01 6:09 ` Binbin Wu
2025-07-02 3:14 ` Huang, Kai
2025-07-02 7:54 ` Chao Gao
2025-07-02 9:22 ` Huang, Kai
2025-07-07 12:37 ` Huang, Kai
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