From: John Madieu <john.madieu.xa@bp.renesas.com>
To: geert <geert@linux-m68k.org>
Cc: "conor+dt@kernel.org" <conor+dt@kernel.org>,
"daniel.lezcano@linaro.org" <daniel.lezcano@linaro.org>,
"krzk+dt@kernel.org" <krzk+dt@kernel.org>,
"rafael@kernel.org" <rafael@kernel.org>,
Biju Das <biju.das.jz@bp.renesas.com>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
"john.madieu@gmail.com" <john.madieu@gmail.com>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"linux-pm@vger.kernel.org" <linux-pm@vger.kernel.org>,
"linux-renesas-soc@vger.kernel.org"
<linux-renesas-soc@vger.kernel.org>,
"lukasz.luba@arm.com" <lukasz.luba@arm.com>,
magnus.damm <magnus.damm@gmail.com>,
"robh@kernel.org" <robh@kernel.org>,
"rui.zhang@intel.com" <rui.zhang@intel.com>,
"sboyd@kernel.org" <sboyd@kernel.org>,
"niklas.soderlund+renesas@ragnatech.se"
<niklas.soderlund+renesas@ragnatech.se>,
Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Subject: RE: [PATCH v6 1/5] soc: renesas: rz-sysc: Add syscon/regmap support
Date: Tue, 5 Aug 2025 12:38:13 +0000 [thread overview]
Message-ID: <OSCPR01MB14647AC1598F8D20657366260FF22A@OSCPR01MB14647.jpnprd01.prod.outlook.com> (raw)
In-Reply-To: <CAMuHMdVyf3Xtpw=LWHrnD2CVQX4xYm=FBHvY_dx9OesHDz5zNg@mail.gmail.com>
Hi Geert,
Thanks for your review!
> -----Original Message-----
> From: Geert Uytterhoeven <geert@linux-m68k.org>
> Sent: Monday, August 4, 2025 11:19 AM
> To: John Madieu <john.madieu.xa@bp.renesas.com>
> Subject: Re: [PATCH v6 1/5] soc: renesas: rz-sysc: Add syscon/regmap
> support
>
> Hi John,
>
> On Thu, 22 May 2025 at 20:23, John Madieu <john.madieu.xa@bp.renesas.com>
> wrote:
> > The RZ/G3E system controller has various registers that control or
> > report some properties specific to individual IPs. The regmap is
> > registered as a syscon device to allow these IP drivers to access the
> > registers through the regmap API.
> >
> > As other RZ SoCs might have custom read/write callbacks or
> > max-offsets, add register a custom regmap configuration.
> >
> > Signed-off-by: John Madieu <john.madieu.xa@bp.renesas.com>
> > [claudiu.beznea:
> > - s/rzg3e_sysc_regmap/rzv2h_sysc_regmap in RZ/V2H sysc
> > file
> > - do not check the match->data validity in rz_sysc_probe() as it is
> > always valid
> > - register the regmap if data->regmap_cfg is valid]
> > Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
>
> Thanks for your patch!
>
> As you probably noticed, I am not a big fan of syscon, so I try to avoid
> getting involved with syscon patches as much as possible.
> But this patch has appeared in multiple series, so I am afraid I cannot
> avoid it anymore ;-)
>
> > --- a/drivers/soc/renesas/r9a08g045-sysc.c
> > +++ b/drivers/soc/renesas/r9a08g045-sysc.c
> > @@ -18,6 +18,16 @@ static const struct rz_sysc_soc_id_init_data
> rzg3s_sysc_soc_id_init_data __initc
> > .specific_id_mask = GENMASK(27, 0), };
> >
> > +static const struct regmap_config rzg3s_sysc_regmap __initconst = {
> > + .name = "rzg3s_sysc_regs",
> > + .reg_bits = 32,
> > + .reg_stride = 4,
> > + .val_bits = 32,
> > + .fast_io = true,
> > + .max_register = 0xe20,
> > +};
>
> Struct regmap_config is a rather large structure, and the only SoC-specific
> members are the .name (which doesn't really matter) and .max_register
> members. Hence please move .max_register back to struct rz_sysc_init_data
> (like in v5), and allocate struct regmap_config dynamically (by embedding
> it into struct rz_sysc).
>
> > +
> > const struct rz_sysc_init_data rzg3s_sysc_init_data __initconst = {
> > .soc_id_init_data = &rzg3s_sysc_soc_id_init_data,
> > + .regmap_cfg = &rzg3s_sysc_regmap,
> > };
>
> > --- a/drivers/soc/renesas/rz-sysc.c
> > +++ b/drivers/soc/renesas/rz-sysc.c
> > @@ -117,7 +124,15 @@ static int rz_sysc_probe(struct platform_device
> *pdev)
> > return PTR_ERR(sysc->base);
> >
> > sysc->dev = dev;
> > - return rz_sysc_soc_init(sysc, match);
> > + ret = rz_sysc_soc_init(sysc, match);
> > + if (ret || !data->regmap_cfg)
>
> data->regmap_cfg should never be NULL (but this doesn't matter anymore,
> in the context of my request above).
>
> > + return ret;
> > +
> > + regmap = devm_regmap_init_mmio(dev, sysc->base, data-
> >regmap_cfg);
> > + if (IS_ERR(regmap))
> > + return PTR_ERR(regmap);
> > +
> > + return of_syscon_register_regmap(dev->of_node, regmap);
> > }
>
> The rest LGTM.
Will make the changes as per the v5. Thanks!
>
> Gr{oetje,eeting}s,
>
> Geert
>
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-
> m68k.org
>
> In personal conversations with technical people, I call myself a hacker.
> But when I'm talking to journalists I just say "programmer" or something
> like that.
> -- Linus Torvalds
Regards,
John
next prev parent reply other threads:[~2025-08-05 12:38 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-05-22 18:22 [PATCH v6 0/5] thermal: renesas: Add support for RZ/G3E John Madieu
2025-05-22 18:22 ` [PATCH v6 1/5] soc: renesas: rz-sysc: Add syscon/regmap support John Madieu
2025-08-04 9:19 ` Geert Uytterhoeven
2025-08-05 12:38 ` John Madieu [this message]
2025-05-22 18:22 ` [PATCH v6 2/5] dt-bindings: thermal: r9a09g047-tsu: Document the TSU unit John Madieu
2025-05-22 18:22 ` [PATCH v6 3/5] thermal: renesas: rzg3e: Add thermal driver for the Renesas RZ/G3E SoC John Madieu
2025-06-06 6:17 ` Biju Das
2025-06-11 10:54 ` John Madieu
2025-07-16 21:11 ` Daniel Lezcano
2025-07-31 17:19 ` John Madieu
2025-08-04 16:08 ` Daniel Lezcano
2025-08-05 7:49 ` John Madieu
2025-08-05 10:05 ` Daniel Lezcano
2025-08-13 17:44 ` John Madieu
2025-08-04 9:28 ` Geert Uytterhoeven
2025-08-05 8:27 ` John Madieu
2025-08-05 8:47 ` Geert Uytterhoeven
2025-08-05 9:22 ` John Madieu
2025-08-05 9:35 ` Geert Uytterhoeven
2025-08-05 9:52 ` John Madieu
2025-05-22 18:22 ` [PATCH v6 4/5] arm64: dts: renesas: r9a09g047: Add TSU node John Madieu
2025-05-22 18:22 ` [PATCH v6 5/5] arm64: defconfig: Enable the Renesas RZ/G3E thermal driver John Madieu
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