Re: [PATCH v7 06/11] arm64: dts: qcom: ipq5210: Add ICE support to SDHCI

[Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>]

On 10/12/26 9:23 AM, Varadarajan Narayanan wrote:
> Describe the SDHCI ICE register region and clock, and enable CQE support
> for the IPQ5210 SDHCI controller.
> 
> Signed-off-by: Varadarajan Narayanan <varadarajan.narayanan@oss.qualcomm.com>
> ---
>  arch/arm64/boot/dts/qcom/ipq5210.dtsi | 15 +++++++++++----
>  1 file changed, 11 insertions(+), 4 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/qcom/ipq5210.dtsi b/arch/arm64/boot/dts/qcom/ipq5210.dtsi
> index d28d68a10958..c14b42c22616 100644
> --- a/arch/arm64/boot/dts/qcom/ipq5210.dtsi
> +++ b/arch/arm64/boot/dts/qcom/ipq5210.dtsi
> @@ -416,9 +416,11 @@ uart1: serial@1a84000 {
>  		sdhc: mmc@7804000 {
>  			compatible = "qcom,ipq5210-sdhci", "qcom,sdhci-msm-v5";
>  			reg = <0x0 0x07804000 0x0 0x1000>,
> -			      <0x0 0x07805000 0x0 0x1000>;
> +			      <0x0 0x07805000 0x0 0x1000>,
> +			      <0x0 0x07808000 0x0 0x2000>;
>  			reg-names = "hc",
> -				    "cqhci";
> +				    "cqhci",
> +				    "ice";

This should be a separate node, like on other SoCs to allow things
like frequency scaling

Konrad