[PATCH 0/5] x86,fs/resctrl: Cleanups in preparation for multiple

[PATCH 0/5] x86,fs/resctrl: Cleanups in preparation for multiple

[Reinette Chatre]

Hi Everybody,

For resource allocation resctrl assumes there is only one way to allocate
portions of a resource. That is, every resource supporting allocation has
a single control in the schemata file that user space can use to allocate
portions of that resource.

All architectures supported by resctrl already or will soon support multiple
controls per resource. For example, the "memory bandwidth" resource may have
a "maximum bandwidth" as well as a "minimum bandwidth" control.

Adding support for multiple controls to resctrl is a major endeavour. [1]
provides a description of the goals with a summary available in last year's
plumbers slides [2]. The implementation is in progress with most recent
PoC at [3].

The cleanups included in this series are the preparatory patches from the PoC
that trickled to the top, thus kicking off the support for multiple controllers
to resctrl.

While this is v1 of the series these patches did make an appearance in both
RFCs of the PoC. Changes since these postings can be found in the individual
patches.

[1] https://lore.kernel.org/lkml/aPtfMFfLV1l%2FRB0L@e133380.arm.com/
[2] https://lpc.events/event/19/contributions/2093/attachments/1958/4172/resctrl%20Microconference%20LPC%202025%20Tokyo.pdf
[3] https://lore.kernel.org/lkml/d258a32f-12d5-464d-abe9-4720fb3e44b3@intel.com/

Reinette Chatre (5):
  fs/resctrl: Drop support for different bandwidth delay mappings
  x86,fs/resctrl: Remove "arch_needs_linear"
  x86,fs/resctrl: Make MSR_IA32_L{2,3}_QOS_CFG scope architecture
    specific
  fs/resctrl: Drop unnecessary is_mba_linear() helper
  fs/resctrl: Drop unnecessary parameter from
    resctrl_io_alloc_parse_line()

 arch/x86/kernel/cpu/resctrl/core.c     | 69 +++++++-------------------
 arch/x86/kernel/cpu/resctrl/internal.h |  3 ++
 arch/x86/kernel/cpu/resctrl/rdtgroup.c |  4 +-
 fs/resctrl/ctrlmondata.c               | 15 ++----
 fs/resctrl/rdtgroup.c                  |  7 +--
 include/linux/resctrl.h                |  7 ---
 6 files changed, 29 insertions(+), 76 deletions(-)

-- 
2.55.0

[PATCH 1/5] fs/resctrl: Drop support for different bandwidth delay mappings

[Reinette Chatre]

The original Intel MBA support added by commit

05b93417ce5b ("x86/intel_rdt/mba: Add primary support for Memory Bandwidth Allocation (MBA)")

introduced but never used support for different bandwidth delay mappings.

Intel systems only support linear delay values for which there is a
direct map to the percentage based memory bandwidth control. There is no
need to support other bandwidth delay mappings.

Remove the unused resctrl_membw::mb_map and the unnecessary bandwidth delay
mapping function. Perform the direct map to percentage when writing the
control value to hardware.

Signed-off-by: Reinette Chatre <reinette.chatre@intel.com>
---
Changes since RFC v1:
- Also drop separate delay_bw_map() and instead integrate the only
  mapping to when control value is written.

Changes since RFC v2:
- Rework changelog.
---
 arch/x86/kernel/cpu/resctrl/core.c | 23 +++++++----------------
 include/linux/resctrl.h            |  2 --
 2 files changed, 7 insertions(+), 18 deletions(-)

diff --git a/arch/x86/kernel/cpu/resctrl/core.c b/arch/x86/kernel/cpu/resctrl/core.c
index 55214d6fdc49..65cfde0d6a9b 100644
--- a/arch/x86/kernel/cpu/resctrl/core.c
+++ b/arch/x86/kernel/cpu/resctrl/core.c
@@ -323,29 +323,20 @@ static void mba_wrmsr_amd(struct msr_param *m)
 		wrmsrq(hw_res->msr_base + i, hw_dom->ctrl_val[i]);
 }
 
-/*
- * Map the memory b/w percentage value to delay values
- * that can be written to QOS_MSRs.
- * There are currently no SKUs which support non linear delay values.
- */
-static u32 delay_bw_map(unsigned long bw, struct rdt_resource *r)
-{
-	if (r->membw.delay_linear)
-		return MAX_MBA_BW - bw;
-
-	pr_warn_once("Non Linear delay-bw map not supported but queried\n");
-	return MAX_MBA_BW;
-}
-
 static void mba_wrmsr_intel(struct msr_param *m)
 {
 	struct rdt_hw_ctrl_domain *hw_dom = resctrl_to_arch_ctrl_dom(m->dom);
 	struct rdt_hw_resource *hw_res = resctrl_to_arch_res(m->res);
 	unsigned int i;
 
-	/*  Write the delay values for mba. */
+	if (!m->res->membw.delay_linear) {
+		pr_warn_once("Non-linear bandwidth delay not supported\n");
+		return;
+	}
+
+	/* Program bandwidth percentage mapped to linear delay value. */
 	for (i = m->low; i < m->high; i++)
-		wrmsrq(hw_res->msr_base + i, delay_bw_map(hw_dom->ctrl_val[i], m->res));
+		wrmsrq(hw_res->msr_base + i, MAX_MBA_BW - hw_dom->ctrl_val[i]);
 }
 
 static void cat_wrmsr(struct msr_param *m)
diff --git a/include/linux/resctrl.h b/include/linux/resctrl.h
index 10dfdca7f4bf..b63dc62690ca 100644
--- a/include/linux/resctrl.h
+++ b/include/linux/resctrl.h
@@ -253,7 +253,6 @@ enum membw_throttle_mode {
  * @throttle_mode:	Bandwidth throttling mode when threads request
  *			different memory bandwidths
  * @mba_sc:		True if MBA software controller(mba_sc) is enabled
- * @mb_map:		Mapping of memory B/W percentage to memory B/W delay
  */
 struct resctrl_membw {
 	u32				min_bw;
@@ -263,7 +262,6 @@ struct resctrl_membw {
 	bool				arch_needs_linear;
 	enum membw_throttle_mode	throttle_mode;
 	bool				mba_sc;
-	u32				*mb_map;
 };
 
 struct resctrl_schema;
-- 
2.55.0

[PATCH 2/5] x86,fs/resctrl: Remove "arch_needs_linear"

[Reinette Chatre]

arch_needs_linear is used to reject any configuration attempt on
a non-linear Intel MBA resource yet there are no Intel SKUs that support
non-linear delay. If such non-existent non-linear Intel MBA resource is
encountered during enumeration then it will not be marked as alloc_capable
anyway and thus resctrl will never attempt configuration because of it not
being capable of allocation, not because of the arch_needs_linear value.

On Intel the MBA resource will thus always have:
    delay_linear == true and arch_needs_linear == true
On AMD the MBA resource will always have:
    delay_linear == false and arch_needs_linear == false
MPAM does not set arch_needs_linear.

rdt_get_mb_table() is only called during enumeration and since it always
returns false an Intel MBA resource without MBA_IS_LINEAR is not supported.
Drop the unnecessary venture to rdt_get_mb_table() to make it clear that
an Intel MBA resource without MBA_IS_LINEAR is not considered capable of
allocation. Drop the dead code that sets arch_needs_linear to false on Intel.

Since "if (!delay_linear && arch_needs_linear)" can never be true, drop
arch_needs_linear and its only usage during bandwidth validation.

Signed-off-by: Reinette Chatre <reinette.chatre@intel.com>
---
Changes since RFC v1:
- Fix typo in changelog

Changes since RFC v2:
- Rework changelog.
- Group all r->membw assignments together.
---
 arch/x86/kernel/cpu/resctrl/core.c | 39 ++++++------------------------
 fs/resctrl/ctrlmondata.c           |  8 ------
 include/linux/resctrl.h            |  2 --
 3 files changed, 7 insertions(+), 42 deletions(-)

diff --git a/arch/x86/kernel/cpu/resctrl/core.c b/arch/x86/kernel/cpu/resctrl/core.c
index 65cfde0d6a9b..0e34a1c541b9 100644
--- a/arch/x86/kernel/cpu/resctrl/core.c
+++ b/arch/x86/kernel/cpu/resctrl/core.c
@@ -181,27 +181,6 @@ static inline void cache_alloc_hsw_probe(void)
 	rdt_alloc_capable = true;
 }
 
-/*
- * rdt_get_mb_table() - get a mapping of bandwidth(b/w) percentage values
- * exposed to user interface and the h/w understandable delay values.
- *
- * The non-linear delay values have the granularity of power of two
- * and also the h/w does not guarantee a curve for configured delay
- * values vs. actual b/w enforced.
- * Hence we need a mapping that is pre calibrated so the user can
- * express the memory b/w as a percentage value.
- */
-static inline bool rdt_get_mb_table(struct rdt_resource *r)
-{
-	/*
-	 * There are no Intel SKUs as of now to support non-linear delay.
-	 */
-	pr_info("MBA b/w map not implemented for cpu:%d, model:%d",
-		boot_cpu_data.x86, boot_cpu_data.x86_model);
-
-	return false;
-}
-
 static __init bool __get_mem_config_intel(struct rdt_resource *r)
 {
 	struct rdt_hw_resource *hw_res = resctrl_to_arch_res(r);
@@ -213,16 +192,13 @@ static __init bool __get_mem_config_intel(struct rdt_resource *r)
 	hw_res->num_closid = edx.split.cos_max + 1;
 	max_delay = eax.split.max_delay + 1;
 	r->membw.max_bw = MAX_MBA_BW;
-	r->membw.arch_needs_linear = true;
-	if (ecx & MBA_IS_LINEAR) {
-		r->membw.delay_linear = true;
-		r->membw.min_bw = MAX_MBA_BW - max_delay;
-		r->membw.bw_gran = MAX_MBA_BW - max_delay;
-	} else {
-		if (!rdt_get_mb_table(r))
-			return false;
-		r->membw.arch_needs_linear = false;
-	}
+
+	if (!(ecx & MBA_IS_LINEAR))
+		return false;
+
+	r->membw.delay_linear = true;
+	r->membw.min_bw = MAX_MBA_BW - max_delay;
+	r->membw.bw_gran = MAX_MBA_BW - max_delay;
 
 	if (boot_cpu_has(X86_FEATURE_PER_THREAD_MBA))
 		r->membw.throttle_mode = THREAD_THROTTLE_PER_THREAD;
@@ -255,7 +231,6 @@ static __init bool __rdt_get_mem_config_amd(struct rdt_resource *r)
 
 	/* AMD does not use delay */
 	r->membw.delay_linear = false;
-	r->membw.arch_needs_linear = false;
 
 	/*
 	 * AMD does not use memory delay throttle model to control
diff --git a/fs/resctrl/ctrlmondata.c b/fs/resctrl/ctrlmondata.c
index cafebdff70dc..4562072b8ba6 100644
--- a/fs/resctrl/ctrlmondata.c
+++ b/fs/resctrl/ctrlmondata.c
@@ -45,14 +45,6 @@ static bool bw_validate(char *buf, u32 *data, struct rdt_resource *r)
 	int ret;
 	u32 bw;
 
-	/*
-	 * Only linear delay values is supported for current Intel SKUs.
-	 */
-	if (!r->membw.delay_linear && r->membw.arch_needs_linear) {
-		rdt_last_cmd_puts("No support for non-linear MB domains\n");
-		return false;
-	}
-
 	ret = kstrtou32(buf, 10, &bw);
 	if (ret) {
 		rdt_last_cmd_printf("Invalid MB value %s\n", buf);
diff --git a/include/linux/resctrl.h b/include/linux/resctrl.h
index b63dc62690ca..66dc9813c888 100644
--- a/include/linux/resctrl.h
+++ b/include/linux/resctrl.h
@@ -249,7 +249,6 @@ enum membw_throttle_mode {
  * @max_bw:		Maximum memory bandwidth value, used as the reset value
  * @bw_gran:		Granularity at which the memory bandwidth is allocated
  * @delay_linear:	True if memory B/W delay is in linear scale
- * @arch_needs_linear:	True if we can't configure non-linear resources
  * @throttle_mode:	Bandwidth throttling mode when threads request
  *			different memory bandwidths
  * @mba_sc:		True if MBA software controller(mba_sc) is enabled
@@ -259,7 +258,6 @@ struct resctrl_membw {
 	u32				max_bw;
 	u32				bw_gran;
 	u32				delay_linear;
-	bool				arch_needs_linear;
 	enum membw_throttle_mode	throttle_mode;
 	bool				mba_sc;
 };
-- 
2.55.0

[PATCH 3/5] x86,fs/resctrl: Make MSR_IA32_L{2,3}_QOS_CFG scope architecture specific

[Reinette Chatre]

The architecture specific cache bitmap control property
resctrl_cache::arch_has_per_cpu_cfg reflects whether the x86 cache
configuration registers MSR_IA32_L{2,3}_QOS_CFG have scope that is per-CPU
or matches the associated cache. This property is maintained, but never
used, by the resctrl filesystem.

Each cache resource only supports one control. In preparation for resources
supporting multiple controls it is no longer appropriate to place the x86
architecture cache resource property with the cache control properties
since that would result in the resource property being duplicated among
all its controls. Additionally, the scope of the x86 MSR_IA32_L{2,3}_QOS_CFG
registers is x86 architecture specific - the resctrl filesystem does not
use it at all and should therefore not need to maintain it.

Make the scope of MSR_IA32_L{2,3}_QOS_CFG an x86 hardware resource
specific property with a direct name of qos_cfg_has_cpu_scope.

Signed-off-by: Reinette Chatre <reinette.chatre@intel.com>
---
Changes since RFC v1:
- Remove stray ";" in kernel-doc comment.

Changes since RFC v2:
- Rewrite changelog, shorten subject.
- Rework comment instead of copy&paste the original.
- Rename property to be more specific now that it does not need to aim
  for generic resctrl filesystem support.
---
 arch/x86/kernel/cpu/resctrl/core.c     | 7 ++++---
 arch/x86/kernel/cpu/resctrl/internal.h | 3 +++
 arch/x86/kernel/cpu/resctrl/rdtgroup.c | 4 +++-
 include/linux/resctrl.h                | 3 ---
 4 files changed, 10 insertions(+), 7 deletions(-)

diff --git a/arch/x86/kernel/cpu/resctrl/core.c b/arch/x86/kernel/cpu/resctrl/core.c
index 0e34a1c541b9..a251ba657ab7 100644
--- a/arch/x86/kernel/cpu/resctrl/core.c
+++ b/arch/x86/kernel/cpu/resctrl/core.c
@@ -441,6 +441,7 @@ static int get_domain_id_from_scope(int cpu, enum resctrl_scope scope)
 
 static void domain_add_cpu_ctrl(int cpu, struct rdt_resource *r)
 {
+	struct rdt_hw_resource *hw_res = resctrl_to_arch_res(r);
 	int id = get_domain_id_from_scope(cpu, r->ctrl_scope);
 	struct rdt_hw_ctrl_domain *hw_dom;
 	struct list_head *add_pos = NULL;
@@ -463,7 +464,7 @@ static void domain_add_cpu_ctrl(int cpu, struct rdt_resource *r)
 		d = container_of(hdr, struct rdt_ctrl_domain, hdr);
 
 		cpumask_set_cpu(cpu, &d->hdr.cpu_mask);
-		if (r->cache.arch_has_per_cpu_cfg)
+		if (hw_res->qos_cfg_has_cpu_scope)
 			rdt_domain_reconfigure_cdp(r);
 		return;
 	}
@@ -998,7 +999,7 @@ static __init void rdt_init_res_defs_intel(void)
 
 		if (r->rid == RDT_RESOURCE_L3 ||
 		    r->rid == RDT_RESOURCE_L2) {
-			r->cache.arch_has_per_cpu_cfg = false;
+			hw_res->qos_cfg_has_cpu_scope = false;
 			r->cache.min_cbm_bits = 1;
 		} else if (r->rid == RDT_RESOURCE_MBA) {
 			hw_res->msr_base = MSR_IA32_MBA_THRTL_BASE;
@@ -1017,8 +1018,8 @@ static __init void rdt_init_res_defs_amd(void)
 
 		if (r->rid == RDT_RESOURCE_L3 ||
 		    r->rid == RDT_RESOURCE_L2) {
+			hw_res->qos_cfg_has_cpu_scope = true;
 			r->cache.arch_has_sparse_bitmasks = true;
-			r->cache.arch_has_per_cpu_cfg = true;
 			r->cache.min_cbm_bits = 0;
 		} else if (r->rid == RDT_RESOURCE_MBA) {
 			hw_res->msr_base = MSR_IA32_MBA_BW_BASE;
diff --git a/arch/x86/kernel/cpu/resctrl/internal.h b/arch/x86/kernel/cpu/resctrl/internal.h
index e3cfa0c10e92..861151f008fa 100644
--- a/arch/x86/kernel/cpu/resctrl/internal.h
+++ b/arch/x86/kernel/cpu/resctrl/internal.h
@@ -125,6 +125,8 @@ struct msr_param {
  * @mon_scale:		cqm counter * mon_scale = occupancy in bytes
  * @mbm_width:		Monitor width, to detect and correct for overflow.
  * @cdp_enabled:	CDP state of this resource
+ * @qos_cfg_has_cpu_scope:	True if MSR_IA32_L{2,3}_QOS_CFG has CPU scope,
+ *				false if the scope matches the associated cache.
  * @mbm_cntr_assign_enabled:	ABMC feature is enabled
  * @sdciae_enabled:	SDCIAE feature (backing "io_alloc") is enabled.
  *
@@ -140,6 +142,7 @@ struct rdt_hw_resource {
 	unsigned int		mon_scale;
 	unsigned int		mbm_width;
 	bool			cdp_enabled;
+	bool			qos_cfg_has_cpu_scope;
 	bool			mbm_cntr_assign_enabled;
 	bool			sdciae_enabled;
 };
diff --git a/arch/x86/kernel/cpu/resctrl/rdtgroup.c b/arch/x86/kernel/cpu/resctrl/rdtgroup.c
index 5ffa39fa86fa..6e4eeccd4891 100644
--- a/arch/x86/kernel/cpu/resctrl/rdtgroup.c
+++ b/arch/x86/kernel/cpu/resctrl/rdtgroup.c
@@ -131,6 +131,7 @@ static void l2_qos_cfg_update(void *arg)
 
 static int set_cache_qos_cfg(int level, bool enable)
 {
+	struct rdt_hw_resource *hw_res;
 	void (*update)(void *arg);
 	struct rdt_ctrl_domain *d;
 	struct rdt_resource *r_l;
@@ -151,8 +152,9 @@ static int set_cache_qos_cfg(int level, bool enable)
 		return -ENOMEM;
 
 	r_l = &rdt_resources_all[level].r_resctrl;
+	hw_res = resctrl_to_arch_res(r_l);
 	list_for_each_entry_rcu(d, &r_l->ctrl_domains, hdr.list, lockdep_is_cpus_held()) {
-		if (r_l->cache.arch_has_per_cpu_cfg)
+		if (hw_res->qos_cfg_has_cpu_scope)
 			/* Pick all the CPUs in the domain instance */
 			for_each_cpu(cpu, &d->hdr.cpu_mask)
 				cpumask_set_cpu(cpu, cpu_mask);
diff --git a/include/linux/resctrl.h b/include/linux/resctrl.h
index 66dc9813c888..b6b4519a5190 100644
--- a/include/linux/resctrl.h
+++ b/include/linux/resctrl.h
@@ -215,8 +215,6 @@ struct rdt_l3_mon_domain {
  * @shareable_bits:	Bitmask of shareable resource with other
  *			executing entities
  * @arch_has_sparse_bitmasks:	True if a bitmask like f00f is valid.
- * @arch_has_per_cpu_cfg:	True if QOS_CFG register for this cache
- *				level has CPU scope.
  * @io_alloc_capable:	True if portion of the cache can be configured
  *			for I/O traffic.
  */
@@ -225,7 +223,6 @@ struct resctrl_cache {
 	unsigned int	min_cbm_bits;
 	unsigned int	shareable_bits;
 	bool		arch_has_sparse_bitmasks;
-	bool		arch_has_per_cpu_cfg;
 	bool		io_alloc_capable;
 };
 
-- 
2.55.0

[PATCH 4/5] fs/resctrl: Drop unnecessary is_mba_linear() helper

[Reinette Chatre]

is_mba_linear() assumes it operates on the MBA resource and returns whether
the resource is linear. There is only one caller that separately makes the
same assumption.

Avoid duplicating the resource assumptions and let the only caller access
the needed property directly.

Signed-off-by: Reinette Chatre <reinette.chatre@intel.com>
---
Changes from RFC v1:
- RFC v1 made bandwidth delay a resource property. That change was dropped
  and this cleanup is all that remained.
---
 fs/resctrl/rdtgroup.c | 7 +------
 1 file changed, 1 insertion(+), 6 deletions(-)

diff --git a/fs/resctrl/rdtgroup.c b/fs/resctrl/rdtgroup.c
index 68be9b903ac6..821c6e2b10f4 100644
--- a/fs/resctrl/rdtgroup.c
+++ b/fs/resctrl/rdtgroup.c
@@ -2577,11 +2577,6 @@ mongroup_create_dir(struct kernfs_node *parent_kn, struct rdtgroup *prgrp,
 	return ret;
 }
 
-static inline bool is_mba_linear(void)
-{
-	return resctrl_arch_get_resource(RDT_RESOURCE_MBA)->membw.delay_linear;
-}
-
 static int mba_sc_domain_allocate(struct rdt_resource *r, struct rdt_ctrl_domain *d)
 {
 	u32 num_closid = resctrl_arch_get_num_closid(r);
@@ -2621,7 +2616,7 @@ static bool supports_mba_mbps(void)
 	struct rdt_resource *r = resctrl_arch_get_resource(RDT_RESOURCE_MBA);
 
 	return (resctrl_is_mbm_enabled() &&
-		r->alloc_capable && is_mba_linear() &&
+		r->alloc_capable && r->membw.delay_linear &&
 		r->ctrl_scope == rmbm->mon_scope &&
 		!rmbm->mon.mbm_cntr_assignable);
 }
-- 
2.55.0

[PATCH 5/5] fs/resctrl: Drop unnecessary parameter from resctrl_io_alloc_parse_line()

[Reinette Chatre]

resctrl_io_alloc_parse_line() only has one caller that determines the
resource via resctrl_schema::res and then passes a pointer to the resource
as well as struct resctrl_schema.

Only pass pointer to struct resctrl_schema. resctrl_io_alloc_parse_line()
can determine the resource itself.

Signed-off-by: Reinette Chatre <reinette.chatre@intel.com>
---
Changes since RFC v2:
- Rework changelog.
---
 fs/resctrl/ctrlmondata.c | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/fs/resctrl/ctrlmondata.c b/fs/resctrl/ctrlmondata.c
index 4562072b8ba6..69123b2a3274 100644
--- a/fs/resctrl/ctrlmondata.c
+++ b/fs/resctrl/ctrlmondata.c
@@ -955,11 +955,12 @@ int resctrl_io_alloc_cbm_show(struct kernfs_open_file *of, struct seq_file *seq,
 	return ret;
 }
 
-static int resctrl_io_alloc_parse_line(char *line,  struct rdt_resource *r,
-				       struct resctrl_schema *s, u32 closid)
+static int resctrl_io_alloc_parse_line(char *line, struct resctrl_schema *s,
+				       u32 closid)
 {
 	enum resctrl_conf_type peer_type;
 	unsigned long dom_id = ULONG_MAX;
+	struct rdt_resource *r = s->res;
 	struct rdt_parse_data data;
 	struct rdt_ctrl_domain *d;
 	bool update_all = false;
@@ -1052,7 +1053,7 @@ ssize_t resctrl_io_alloc_cbm_write(struct kernfs_open_file *of, char *buf,
 	io_alloc_closid = resctrl_io_alloc_closid(r);
 
 	rdt_staged_configs_clear();
-	ret = resctrl_io_alloc_parse_line(buf, r, s, io_alloc_closid);
+	ret = resctrl_io_alloc_parse_line(buf, s, io_alloc_closid);
 	if (ret)
 		goto out_clear_configs;
 
-- 
2.55.0

Re: [PATCH 0/5] x86,fs/resctrl: Cleanups in preparation for multiple

[Reinette Chatre]

I don't know what caused subject to be trimmed. It is intended to be:

	x86,fs/resctrl: Cleanups in preparation for multiple controller support

Re: [PATCH 2/5] x86,fs/resctrl: Remove "arch_needs_linear"

[Chen Yu]

Hi Reinette,

On Thu, Sep 03, 2026 at 09:57:04AM -0700, Reinette Chatre wrote:

[ ... ]

>  static __init bool __get_mem_config_intel(struct rdt_resource *r)
>  {
>  	struct rdt_hw_resource *hw_res = resctrl_to_arch_res(r);
> @@ -213,16 +192,13 @@ static __init bool __get_mem_config_intel(struct rdt_resource *r)
>  	hw_res->num_closid = edx.split.cos_max + 1;
>  	max_delay = eax.split.max_delay + 1;
>  	r->membw.max_bw = MAX_MBA_BW;
> -	r->membw.arch_needs_linear = true;
> -	if (ecx & MBA_IS_LINEAR) {
> -		r->membw.delay_linear = true;
> -		r->membw.min_bw = MAX_MBA_BW - max_delay;
> -		r->membw.bw_gran = MAX_MBA_BW - max_delay;
> -	} else {
> -		if (!rdt_get_mb_table(r))
> -			return false;
> -		r->membw.arch_needs_linear = false;
> -	}
> +
> +	if (!(ecx & MBA_IS_LINEAR))

Maybe also print the following from rdt_get_mb_table()?
	pr_info("MBA b/w map not implemented for cpu:%d, model:%d",
		boot_cpu_data.x86, boot_cpu_data.x86_model);

In the previous patch, a "Non Linear delay-bw map" warning is triggered
during the actual write operation. Similarly, displaying such a message
during bootup in this patch might also be helpful.

Thanks,
Chenyu

Re: [PATCH 1/5] fs/resctrl: Drop support for different bandwidth delay mappings

[Chen Yu]

Hi Reinette,

On Thu, Sep 03, 2026 at 09:57:03AM -0700, Reinette Chatre wrote:
>  
> -/*
> - * Map the memory b/w percentage value to delay values
> - * that can be written to QOS_MSRs.
> - * There are currently no SKUs which support non linear delay values.
> - */
> -static u32 delay_bw_map(unsigned long bw, struct rdt_resource *r)
> -{
> -	if (r->membw.delay_linear)
> -		return MAX_MBA_BW - bw;
> -
> -	pr_warn_once("Non Linear delay-bw map not supported but queried\n");
> -	return MAX_MBA_BW;
> -}
> -
>  static void mba_wrmsr_intel(struct msr_param *m)
>  {
>  	struct rdt_hw_ctrl_domain *hw_dom = resctrl_to_arch_ctrl_dom(m->dom);
>  	struct rdt_hw_resource *hw_res = resctrl_to_arch_res(m->res);
>  	unsigned int i;
>  
> -	/*  Write the delay values for mba. */
> +	if (!m->res->membw.delay_linear) {
> +		pr_warn_once("Non-linear bandwidth delay not supported\n");
> +		return;

Previously if linear delay is not supported, we still write MAX_MBA_BW
to MSR, and here we return with MSR untouched, this should be the expected
behavior? Besides, in patch 2, __get_mem_config_intel() returns false for
non-linear-delay platform thus MB resource's alloc_capable is false,
do we still need to do the linear check in mba_wrmsr_intel() in patch 1
as the code path will not be triggered?

thanks,
Chenyu

Re: [PATCH 4/5] fs/resctrl: Drop unnecessary is_mba_linear() helper

[Chen Yu]

On Thu, Sep 03, 2026 at 09:57:06AM -0700, Reinette Chatre wrote:
> is_mba_linear() assumes it operates on the MBA resource and returns whether
> the resource is linear. There is only one caller that separately makes the
> same assumption.
> 
> Avoid duplicating the resource assumptions and let the only caller access
> the needed property directly.
> 
> Signed-off-by: Reinette Chatre <reinette.chatre@intel.com>
> ---

Reviewed-by: Chen Yu <yu.c.chen@intel.com>

thanks,
Chenyu

Re: [PATCH 1/5] fs/resctrl: Drop support for different bandwidth delay mappings

[Reinette Chatre]

Hi Chenyu,

On 9/3/26 8:33 PM, Chen Yu wrote:
> On Thu, Sep 03, 2026 at 09:57:03AM -0700, Reinette Chatre wrote:
>>  
>> -/*
>> - * Map the memory b/w percentage value to delay values
>> - * that can be written to QOS_MSRs.
>> - * There are currently no SKUs which support non linear delay values.
>> - */
>> -static u32 delay_bw_map(unsigned long bw, struct rdt_resource *r)
>> -{
>> -	if (r->membw.delay_linear)
>> -		return MAX_MBA_BW - bw;
>> -
>> -	pr_warn_once("Non Linear delay-bw map not supported but queried\n");
>> -	return MAX_MBA_BW;
>> -}
>> -
>>  static void mba_wrmsr_intel(struct msr_param *m)
>>  {
>>  	struct rdt_hw_ctrl_domain *hw_dom = resctrl_to_arch_ctrl_dom(m->dom);
>>  	struct rdt_hw_resource *hw_res = resctrl_to_arch_res(m->res);
>>  	unsigned int i;
>>  
>> -	/*  Write the delay values for mba. */
>> +	if (!m->res->membw.delay_linear) {
>> +		pr_warn_once("Non-linear bandwidth delay not supported\n");
>> +		return;
> 
> Previously if linear delay is not supported, we still write MAX_MBA_BW
> to MSR, and here we return with MSR untouched, this should be the expected
> behavior?

I believe so, yes. Two reasons:
a) This is not a supported scenario. This code path should never execute
   and already complains loudly if encountered.
b) In the unlikely case that this unsupported scenario is encountered I
   find leaving the hardware as-is to be the safer option.

> Besides, in patch 2, __get_mem_config_intel() returns false for
> non-linear-delay platform thus MB resource's alloc_capable is false,
> do we still need to do the linear check in mba_wrmsr_intel() in patch 1
> as the code path will not be triggered?

You are right that the check is not required. I view this check more like
why we use "lockdep_assert_held()". More specifically, it uses the code to
document the requirements instead of comments. For Intel this is valuable
since the transition to controls and their flags means that when a developer
builds on the new resctrl capabilities to initialize multiple controls it is
required for *each* control to have the "this scalar is linear" flag set. This
test makes that requirement clear.

Reinette

Re: [PATCH 2/5] x86,fs/resctrl: Remove "arch_needs_linear"

[Reinette Chatre]

Hi Chenyu,

On 9/3/26 8:14 PM, Chen Yu wrote:
> Hi Reinette,
> 
> On Thu, Sep 03, 2026 at 09:57:04AM -0700, Reinette Chatre wrote:
> 
> [ ... ]
> 
>>  static __init bool __get_mem_config_intel(struct rdt_resource *r)
>>  {
>>  	struct rdt_hw_resource *hw_res = resctrl_to_arch_res(r);
>> @@ -213,16 +192,13 @@ static __init bool __get_mem_config_intel(struct rdt_resource *r)
>>  	hw_res->num_closid = edx.split.cos_max + 1;
>>  	max_delay = eax.split.max_delay + 1;
>>  	r->membw.max_bw = MAX_MBA_BW;
>> -	r->membw.arch_needs_linear = true;
>> -	if (ecx & MBA_IS_LINEAR) {
>> -		r->membw.delay_linear = true;
>> -		r->membw.min_bw = MAX_MBA_BW - max_delay;
>> -		r->membw.bw_gran = MAX_MBA_BW - max_delay;
>> -	} else {
>> -		if (!rdt_get_mb_table(r))
>> -			return false;
>> -		r->membw.arch_needs_linear = false;
>> -	}
>> +
>> +	if (!(ecx & MBA_IS_LINEAR))
> 
> Maybe also print the following from rdt_get_mb_table()?
> 	pr_info("MBA b/w map not implemented for cpu:%d, model:%d",
> 		boot_cpu_data.x86, boot_cpu_data.x86_model);
> 
> In the previous patch, a "Non Linear delay-bw map" warning is triggered
> during the actual write operation. Similarly, displaying such a message
> during bootup in this patch might also be helpful.
ok ... but who will the message be helpful to? This is a check of
hardware state, not x86 resctrl driver state as in the previous patch.

Reinette

Re: [PATCH 4/5] fs/resctrl: Drop unnecessary is_mba_linear() helper

[Reinette Chatre]

Hi Chenyu,

On 9/3/26 9:38 PM, Chen Yu wrote:
> On Thu, Sep 03, 2026 at 09:57:06AM -0700, Reinette Chatre wrote:
>> is_mba_linear() assumes it operates on the MBA resource and returns whether
>> the resource is linear. There is only one caller that separately makes the
>> same assumption.
>>
>> Avoid duplicating the resource assumptions and let the only caller access
>> the needed property directly.
>>
>> Signed-off-by: Reinette Chatre <reinette.chatre@intel.com>
>> ---
> 
> Reviewed-by: Chen Yu <yu.c.chen@intel.com>
> 

Thank you very much.

Reinette