mirror of https://lore.kernel.org/lkml/
 help / color / mirror / Atom feed
From: Naveen N Rao <naveen@kernel.org>
To: Sean Christopherson <seanjc@google.com>
Cc: Borislav Petkov <bp@alien8.de>,
	kvm@vger.kernel.org,  linux-kernel@vger.kernel.org,
	Paolo Bonzini <pbonzini@redhat.com>,
	 Nikunj A Dadhania <nikunj@amd.com>,
	Tom Lendacky <thomas.lendacky@amd.com>,
	 Tianyu Lan <tiala@microsoft.com>,
	Dave Hansen <dave.hansen@linux.intel.com>,
	 Thomas Gleixner <tglx@kernel.org>,
	David Kaplan <david.kaplan@amd.com>,
	 Neeraj Upadhyay <neeraj.upadhyay@kernel.org>
Subject: Re: [RFC PATCH v3 16/27] KVM: SVM: Add handler for VMGEXIT Secure AVIC NAE event
Date: Tue, 22 Sep 2026 20:31:45 +0530	[thread overview]
Message-ID: <arKHLaVluCNCTaau@blrnaveerao1> (raw)
In-Reply-To: <ao8PtliwDo8H49sa@google.com>

Hi Sean,

On Wed, Aug 26, 2026 at 09:09:26AM -0700, Sean Christopherson wrote:
> On Wed, Jul 08, 2026, Naveen N Rao (AMD) wrote:
> > From: Neeraj Upadhyay <Neeraj.Upadhyay@amd.com>
> > 
> > [DO NOT MERGE]
> > 
> > VMGEXIT Secure AVIC NAE event is used by the guest for two purposes
> > determined by VMCB->EXITINFO1:
> > 1. SVM_VMGEXIT_SAVIC_REGISTER_GPA: Used to inform the hypervisor about
> >    the GPA of the page (RBX) being used as the Secure AVIC backing page.
> >    RAX indicates APIC ID of the target vCPU (-1 for self)
> > 2. SVM_VMGEXIT_SAVIC_UNREGISTER_GPA: Used to inform the hypervisor that
> >    the GPA is no longer being used as the backing page for Secure AVIC.
> >    The previously registered GPA for the Secure AVIC backing page is
> >    returned by the hypervisor to the guest.
> > 
> > The primary motivation behind these is to ensure that Secure AVIC
> > hardware accesses to the guest APIC backing page never generate an #NPF,
> > since Secure AVIC hardware cannot recover from such faults. Quoting the
> > APM:
> >   "It is required that the guest APIC backing page for a vCPU is
> >    pinned in system memory between VMRUN and VMEXIT because some AVIC
> >    hardware acceleration sequences may not be restartable when secure
> >    AVIC is enabled. If an access to the guest's own backing page by
> >    AVIC hardware results in a nested page fault, EXITINFO1 bit 63
> >    (Not Restartable) is set (this is an Automatic Exit) and the BUSY
> >    bit in the VMSA is set."
> > 
> > A guest vCPU that has the BUSY bit set in the VMSA cannot be restarted
> > and the guest will have to be killed.
> > 
> > One of the main reasons why the SPTE for a Secure AVIC backing page may
> > be invalidated is if it is backed by a huge page in the host, and an
> > adjacent page changes state forcing the huge page to be split. Currently
> > though, KVM uses guest_memfd to back SEV-SNP guest private memory, and
> > those only use 4k pages. As such, this _may_ not be an issue today.
> > 
> > It is possible that KVM may still invalidate an SPTE for other reasons -
> > those will need to be addressed.
> 
> As I said in PUCK, this is going to be painful to support, both now and in the
> future.  We _could_ get it working, but I'm not at all convinced that I want to
> commit to supporting Secure AVIC in its current form.

...

> Those are solvable problems, but I'm not exactly chomping at the bit to take on
> the complexity to support what IMO is a poorly designed feature.  There's a very
> good reason why control pages are referenced by their host PA in both the VMCS
> and VMCB.

As an update: I had a discussion with the hardware team about this.  My 
understanding so far is that this is by design, i.e., referencing the 
backing page by GPA (as against using an SPA) was intentional for 
specific micro-architectural reasons and the #NPF issue is a side-effect 
of that.

> 
> Though on a slightly happier note, I was wrong about KVM_X86_QUIRK_SLOT_ZAP_ALL.
> That quirk only applies to KVM_X86_DEFAULT_VM VMs, i.e. wouldn't need to be
> manually disabled for SNP.

Great!

> 
> And if we go with my suggestion[1] to force KVM_MEMSLOT_GMEM_ONLY when binding to
> a gmem instance with in-place conversion enabled, then the fix/optimization to
> ignore mmu_notifiers for gmem-only memslots will avoids spurious zaps on that
> front[2].

Nice, this has been the one path that I have been able to trigger a non 
restartable #NPF reliably in my testing so far. So, this will be 
definitely needed and I suppose this will imply a dependency on in-place 
conversion.

> 
> However, there are still problems.  E.g. when converting memory, userspace would
> need to make sure to never do a redundant/superfluous KVM_SET_MEMORY_ATTRIBUTES2
> on a range that contains a Secure AVIC page, because __kvm_gmem_set_attributes()
> will tell the MMU to invalidate SHARED mappings for the entire range.  I.e. by
> design, guest_memfd will not chunk the invalidations based on the per-page state
> of PRIVATE vs. SHARED, because cross-referencing the current attributes would
> incur non-trivial complexity.  For TDX, this isn't a problem because the S-EPT
> is a separate paging structure, and so kvm_gfn_range_filter_to_root_types() can
> simply skip MIRROR roots to avoid over-zapping PRIVATE memory.  SNP doesn't have
> such a thing.

I suppose this is one of the bigger concerns (next to ensuring all 
invalidation paths are covered). If I'm reading this right, I think your 
idea (thanks!) to skip zap'ing SPTEs for attribute updates addresses 
this path:
https://lore.kernel.org/all/ao9CKMXAX-hScRSa@google.com/

In fact, as far as I can tell, it likely also addresses the MMU Notifier 
path independently.

I believe the other larger concern was ensuring coverage so that there 
aren't surprises in a production deployment. I was thinking if a check 
for the Secure AVIC backing page GPA in sev_gmem_invalidate_range() 
(with a subsequent kvm_vm_dead() or such on a match) can serve as a way 
to ensure we aren't missing any paths, and to guard against future 
changes.

> 
> Converting a subset of a huge PRIVATE page would also be problematic, although
> that one isn't so bad since we already need to call into the TDP MMU to pre-split
> S-EPT pages, because those too can't tolerate spurious zappings.

For hugepages, the intent is to split as part of the Secure AVIC NAE 
Event for backing page registration. i.e., PSMASH()+prefault at the time 
of registration. And since there is no PUNSMASH(), the backing page 
should never end up as part of a hugepage again.


- Naveen

  reply	other threads:[~2026-09-22 15:02 UTC|newest]

Thread overview: 47+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-07-08  6:31 [RFC PATCH v3 00/27] KVM: SVM: Add support for SEV-SNP Secure AVIC Naveen N Rao (AMD)
2026-07-08  6:31 ` [RFC PATCH v3 01/27] x86/apic: Propagate APIC_SPIV writes to hv for " Naveen N Rao (AMD)
2026-07-10  2:03   ` Borislav Petkov
2026-07-10 15:02     ` Naveen N Rao
2026-07-11  4:37       ` Borislav Petkov
2026-07-13 17:38       ` Tom Lendacky
2026-07-14  8:57         ` Naveen N Rao
2026-07-08  6:32 ` [RFC PATCH v3 02/27] x86/apic: Drop savic_eoi() in favor of native_apic_msr_eoi() " Naveen N Rao (AMD)
2026-07-13 17:43   ` Tom Lendacky
2026-07-14  9:02     ` Naveen N Rao
2026-07-08  6:32 ` [RFC PATCH v3 03/27] x86/kvm: Disable PV_SEND_IPI if Secure AVIC is enabled Naveen N Rao (AMD)
2026-07-13 17:52   ` Tom Lendacky
2026-07-14  9:42     ` Naveen N Rao
2026-07-08  6:32 ` [RFC PATCH v3 04/27] x86/apic: Use AVIC_INCOMPLETE_IPI VMGEXIT for Secure AVIC IPI handling Naveen N Rao (AMD)
2026-07-13 17:59   ` Tom Lendacky
2026-07-14 10:03     ` Naveen N Rao
2026-07-08  6:32 ` [RFC PATCH v3 05/27] x86/cpufeatures: Add Secure AVIC CPU feature Naveen N Rao (AMD)
2026-07-13 18:32   ` Tom Lendacky
2026-07-08  6:32 ` [RFC PATCH v3 06/27] KVM: SVM: Add helper to check if Secure AVIC is enabled for a guest Naveen N Rao (AMD)
2026-07-13 18:35   ` Tom Lendacky
2026-07-08  6:32 ` [RFC PATCH v3 07/27] KVM: SVM: Set guest_apic_protected if Secure AVIC is enabled Naveen N Rao (AMD)
2026-07-08  6:32 ` [RFC PATCH v3 08/27] kvm: irqfd: Have kvm_arch_has_irq_bypass() take struct kvm pointer Naveen N Rao (AMD)
2026-07-08  6:32 ` [RFC PATCH v3 09/27] KVM: SVM: Disable IRQ bypass for Secure AVIC Naveen N Rao (AMD)
2026-07-08  6:32 ` [RFC PATCH v3 10/27] KVM: SVM: Add avic_ipiv_is_soft_disabled() as a wrapper around enable_ipiv Naveen N Rao (AMD)
2026-07-08  6:32 ` [RFC PATCH v3 11/27] KVM: SVM: Disable IPIv for Secure AVIC Naveen N Rao (AMD)
2026-07-08  6:32 ` [RFC PATCH v3 12/27] KVM: SVM: Short-circuit a few AVIC flows " Naveen N Rao (AMD)
2026-07-08  6:32 ` [RFC PATCH v3 13/27] KVM: SVM: Warn if we ever receive AVIC_UNACCELERATED_ACCESS #VMEXIT Naveen N Rao (AMD)
2026-07-08  6:32 ` [RFC PATCH v3 14/27] KVM: SVM: Do not inhibit AVIC for SEV-SNP guests if Secure AVIC is enabled Naveen N Rao (AMD)
2026-07-08  6:32 ` [RFC PATCH v3 15/27] KVM: SVM: Set VGIF in VMSA area for Secure AVIC guests Naveen N Rao (AMD)
2026-07-08  6:32 ` [RFC PATCH v3 16/27] KVM: SVM: Add handler for VMGEXIT Secure AVIC NAE event Naveen N Rao (AMD)
2026-08-26 16:09   ` Sean Christopherson
2026-09-22 15:01     ` Naveen N Rao [this message]
2026-09-30 14:43       ` Naveen N Rao
2026-09-30 15:45         ` Sean Christopherson
2026-09-30 19:54           ` Naveen N Rao
2026-07-08  6:32 ` [RFC PATCH v3 17/27] KVM: SVM: Do not intercept SECURE_AVIC_CONTROL MSR for Secure AVIC guests Naveen N Rao (AMD)
2026-07-08  6:32 ` [RFC PATCH v3 18/27] KVM: x86: Add a new kvm_x86_op protected_apic_has_injectable_intr() Naveen N Rao (AMD)
2026-07-08  6:32 ` [RFC PATCH v3 19/27] KVM: SVM: Implement kvm_x86_ops->protected_apic_has_injectable_intr() for Secure AVIC Naveen N Rao (AMD)
2026-07-08  6:32 ` [RFC PATCH v3 20/27] KVM: SVM: Implement kvm_x86_ops->protected_apic_has_interrupt() " Naveen N Rao (AMD)
2026-07-08  6:32 ` [RFC PATCH v3 21/27] KVM: SVM: Add interrupt delivery support for Secure AVIC guests Naveen N Rao (AMD)
2026-07-08  6:32 ` [RFC PATCH v3 22/27] KVM: SVM: Add support for incomplete IPI handling for Secure AVIC Naveen N Rao (AMD)
2026-07-08  6:32 ` [RFC PATCH v3 23/27] KVM: SVM: Add support for injecting NMIs for Secure AVIC guests Naveen N Rao (AMD)
2026-07-08  6:32 ` [RFC PATCH v3 24/27] KVM: SVM: Mandate use of split irqchip for Secure AVIC Naveen N Rao (AMD)
2026-07-08  6:32 ` [RFC PATCH v3 25/27] KVM: SVM: Do not inject exceptions " Naveen N Rao (AMD)
2026-07-08  6:32 ` [RFC PATCH v3 26/27] KVM: SVM: Do not intercept exceptions for Secure AVIC guests Naveen N Rao (AMD)
2026-07-08  6:32 ` [RFC PATCH v3 27/27] KVM: SVM: Advertise Secure AVIC support for SEV-SNP guests Naveen N Rao (AMD)
2026-07-08  9:20 ` [RFC PATCH v3 00/27] KVM: SVM: Add support for SEV-SNP Secure AVIC Naveen N Rao

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=arKHLaVluCNCTaau@blrnaveerao1 \
    --to=naveen@kernel.org \
    --cc=bp@alien8.de \
    --cc=dave.hansen@linux.intel.com \
    --cc=david.kaplan@amd.com \
    --cc=kvm@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=neeraj.upadhyay@kernel.org \
    --cc=nikunj@amd.com \
    --cc=pbonzini@redhat.com \
    --cc=seanjc@google.com \
    --cc=tglx@kernel.org \
    --cc=thomas.lendacky@amd.com \
    --cc=tiala@microsoft.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox

all inboxes | Powered by JetHome®