Re: [PATCH 2/2] x86/virt/tdx: Drop tdh_phymem_page_wbinvd_*()

[Chao Gao <chao.gao@intel.com>]

On Tue, Sep 22, 2026 at 01:52:15PM -0700, Rick Edgecombe wrote:
>In the early days of TDX it was expected that pages being reclaimed from 
>the TDX module would need any cacheline from their private KeyID alias 
>flushed. The TDX docs describe doing this in a couple cases, for example 
>reclaiming the TDR memory:
>  Flush MODIFIED cache lines: this is required to avoid corruption due to
>  cache line aliasing. Note that all cache lines for all other TD pages
>  must have been flushed before the TDR page was reclaimed.
>
>For a similar reasons as why the CLFLUSH_BEFORE_ALLOC features0 bit was
>never actually set in any TDX module, this flush of the private KeyID
>cachelines turned out to not be needed by the final TDX solution.

The reason isn't clear to me. Is it that the hardware doesn't have the
aliasing problem, or that the TDX module does the flush internally?

I'm asking because the answer should also tell us whether the kernel still
needs to set cache_state_incoherent on every SEAMCALL. Not asking to clean
that up in this series, though.