From: Brian Masney <bmasney@redhat.com>
To: Conor Dooley <conor@kernel.org>
Cc: Changhuang Liang <changhuang.liang@starfivetech.com>,
Michael Turquette <mturquette@baylibre.com>,
Jerome Brunet <jbrunet+clk@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>,
Philipp Zabel <p.zabel@pengutronix.de>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Paul Walmsley <pjw@kernel.org>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Alexandre Ghiti <alex@ghiti.fr>,
Emil Renner Berthing <kernel@esmil.dk>,
Kees Cook <kees@kernel.org>,
"Gustavo A . R . Silva" <gustavoars@kernel.org>,
Richard Cochran <richardcochran@gmail.com>,
linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org,
devicetree@vger.kernel.org, linux-riscv@lists.infradead.org,
linux-hardening@vger.kernel.org, netdev@vger.kernel.org,
Hal Feng <hal.feng@starfivetech.com>
Subject: Re: [PATCH v5 00/23] Add basic clocks and resets for JHB100 SoC
Date: Fri, 2 Oct 2026 14:30:12 -0400 [thread overview]
Message-ID: <ar_4NBLHrq2W7_vc@redhat.com> (raw)
In-Reply-To: <20260930-grafting-undertake-ff3e01060284@spud>
Hi Conor,
On Wed, Sep 30, 2026 at 11:43:22PM +0100, Conor Dooley wrote:
> FYI clock folks,
>
> On Wed, Sep 30, 2026 at 05:42:54AM -0700, Changhuang Liang wrote:
> > The JHB100 SoC includes CRG (Clock and Reset Generator) for multiple
> > subsystems:
> >
> > The JHB100 SoC is divided into multiple subsystems, and basically
> > each subsystem includes a CRG(Clock and Reset Generator):
> > - sys0crg/sys1crg/sys2crg/
> > - per0crg/per1crg/per2crg/per3crg/
> > - voutcrg
> > - vcecrg
> > - gpu0crg/gpu1crg
> > - cpucrg
> > - usbcrg
> > - host0crg/host1crg
> > - pcierpcrg
> > - husb0crg/husb1crg
> > - husbcmncrg
> > - husbd0crg/husbd1crg
> > - npucrg
> >
> > In the current series, we will only add the following CRG:
> > - sys0crg/sys1crg/sys2crg/
> > - per0crg/per1crg/per2crg/per3crg/
> >
> > The remaining CRG will be implemented in future series.
> >
> > This series depends on the series:
> > https://lore.kernel.org/all/20260806122553.182449-1-changhuang.liang@starfivetech.com/
> > and it has been tested on the StarFive JHB100 EVB-1.
>
> If this revision of the series is acceptable, I'd (although I'm not a
> listed driver maintainer) like to send you a PR as I've done in the past
> for Starfive stuff so that I can get some of these binding patches that
> contain headers as part of a shared tag to be able to unblock a bunch of
> the soc tree stuff. With conferences next week I understand that, with it
> being -rc5, it's probably this doesn't make v7.4 but I figured it was
> worth getting my intentions out there!
I am going through this series now, and I have a few minor changes to
the clk drivers themselves.
Feel free to send a pull for the bindings and headers though.
Brian
next prev parent reply other threads:[~2026-10-02 18:30 UTC|newest]
Thread overview: 39+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-30 12:42 Changhuang Liang
2026-09-30 12:42 ` [PATCH v5 01/23] clk: starfive: jh7110-sys: Fix memory leak in reset controller register Changhuang Liang
2026-09-30 12:42 ` [PATCH v5 02/23] clk: starfive: JH71x0: Move reset controller registration to jh71x0 common code Changhuang Liang
2026-09-30 12:42 ` [PATCH v5 03/23] reset: starfive: jh7110: Match auxiliary device names to jh71x0 clk driver Changhuang Liang
2026-09-30 12:42 ` [PATCH v5 04/23] clk: starfive: jh71x0: Add generic CRG probe helper Changhuang Liang
2026-10-02 18:51 ` Brian Masney
2026-10-03 14:58 ` Changhuang Liang
2026-09-30 12:42 ` [PATCH v5 05/23] dt-bindings: clock: Add StarFive JHB100 System-0 clock and reset generator Changhuang Liang
2026-09-30 12:43 ` [PATCH v5 06/23] clk: starfive: Add JHB100 System-0 clock generator driver Changhuang Liang
2026-10-02 18:51 ` Brian Masney
2026-10-03 15:05 ` Changhuang Liang
2026-09-30 12:43 ` [PATCH v5 07/23] dt-bindings: clock: Add StarFive JHB100 System-1 clock and reset generator Changhuang Liang
2026-09-30 12:43 ` [PATCH v5 08/23] clk: starfive: Add JHB100 System-1 clock generator driver Changhuang Liang
2026-09-30 12:43 ` [PATCH v5 09/23] dt-bindings: clock: Add StarFive JHB100 System-2 clock and reset generator Changhuang Liang
2026-09-30 12:43 ` [PATCH v5 10/23] clk: starfive: Add JHB100 System-2 clock generator driver Changhuang Liang
2026-10-02 18:51 ` Brian Masney
2026-10-03 15:08 ` Changhuang Liang
2026-10-02 19:50 ` Brian Masney
2026-10-04 4:09 ` Changhuang Liang
2026-09-30 12:43 ` [PATCH v5 11/23] dt-bindings: clock: Add StarFive JHB100 Peripheral-0 clock and reset generator Changhuang Liang
2026-10-02 18:51 ` Brian Masney
2026-09-30 12:43 ` [PATCH v5 12/23] clk: starfive: Introduce idiv ops for inverted divider clocks Changhuang Liang
2026-10-02 18:51 ` Brian Masney
2026-09-30 12:43 ` [PATCH v5 13/23] clk: starfive: Expand the storage of clock parent index Changhuang Liang
2026-09-30 12:43 ` [PATCH v5 14/23] clk: starfive: Add StarFive JHB100 Peripheral-0 clock driver Changhuang Liang
2026-09-30 12:43 ` [PATCH v5 15/23] dt-bindings: clock: Add StarFive JHB100 Peripheral-1 clock and reset generator Changhuang Liang
2026-09-30 12:43 ` [PATCH v5 16/23] clk: starfive: Add StarFive JHB100 Peripheral-1 clock driver Changhuang Liang
2026-09-30 12:43 ` [PATCH v5 17/23] dt-bindings: clock: Add StarFive JHB100 Peripheral-2 clock and reset generator Changhuang Liang
2026-09-30 12:43 ` [PATCH v5 18/23] clk: starfive: Add StarFive JHB100 Peripheral-2 clock driver Changhuang Liang
2026-09-30 12:43 ` [PATCH v5 19/23] dt-bindings: clock: Add StarFive JHB100 Peripheral-3 clock and reset generator Changhuang Liang
2026-09-30 12:43 ` [PATCH v5 20/23] clk: starfive: Add StarFive JHB100 Peripheral-3 clock driver Changhuang Liang
2026-09-30 12:43 ` [PATCH v5 21/23] reset: starfive: jh71x0: Support discontiguous reset IDs Changhuang Liang
2026-09-30 12:43 ` [PATCH v5 22/23] reset: starfive: Add StarFive JHB100 reset driver Changhuang Liang
2026-09-30 12:43 ` [PATCH v5 23/23] riscv: dts: starfive: jhb100: Add clocks and resets nodes Changhuang Liang
2026-09-30 22:43 ` [PATCH v5 00/23] Add basic clocks and resets for JHB100 SoC Conor Dooley
2026-10-02 18:30 ` Brian Masney [this message]
2026-10-02 20:11 ` Conor Dooley
2026-10-02 20:26 ` Conor Dooley
2026-10-02 21:47 ` Brian Masney
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