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From: Dave Jiang <dave.jiang@intel.com>
To: "Bowman, Terry" <terry.bowman@amd.com>,
	PradeepVineshReddy.Kodamati@amd.com, dave@stgolabs.net,
	jonathan.cameron@huawei.com, alison.schofield@intel.com,
	vishal.l.verma@intel.com, ira.weiny@intel.com,
	dan.j.williams@intel.com, bhelgaas@google.com, bp@alien8.de,
	ming.li@zohomail.com, shiju.jose@huawei.com,
	dan.carpenter@linaro.org, Smita.KoralahalliChannabasappa@amd.com,
	kobayashi.da-06@fujitsu.com, yanfei.xu@intel.com,
	rrichter@amd.com, peterz@infradead.org, colyli@suse.de,
	uaisheng.ye@intel.com, fabio.m.de.francesco@linux.intel.com,
	ilpo.jarvinen@linux.intel.com, yazen.ghannam@amd.com,
	linux-cxl@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-pci@vger.kernel.org
Subject: Re: [PATCH v9 11/16] cxl/pci: Update __cxl_handle_cor_ras() to return early if no RAS errors
Date: Fri, 6 Jun 2025 15:38:00 -0700	[thread overview]
Message-ID: <c09c31bd-aa4f-4ea0-b35b-3dc4abac871a@intel.com> (raw)
In-Reply-To: <e633dcd9-2208-4eb0-aeed-61af0206f6d1@amd.com>



On 6/6/25 1:55 PM, Bowman, Terry wrote:
> 
> 
> On 6/6/2025 3:30 PM, Dave Jiang wrote:
>>
>> On 6/3/25 10:22 AM, Terry Bowman wrote:
>>> __cxl_handle_cor_ras() is missing logic to leave the function early in the
>>> case there is no RAS error. Update __cxl_handle_cor_ras() to exit early in
>>> the case there is no RAS errors detected after applying the mask.
>> This change is small enough that I would just fold it into the patch that introduces this function.
>>
>> DJ
> I agree. The problem is it was already present before this series. This is a 'fix'. I had this change in:
> [PATCH v9 09/16] cxl/pci: Log message if RAS registers are unmapped
> but was asked to move out because it appeared as an unrelated miscellaneous patch.

Ok. Then

Reviewed-by: Dave Jiang <dave.jiang@intel.com>

> 
> Terry
>>> Signed-off-by: Terry Bowman <terry.bowman@amd.com>
>>> ---
>>>  drivers/cxl/core/pci.c | 9 +++++----
>>>  1 file changed, 5 insertions(+), 4 deletions(-)
>>>
>>> diff --git a/drivers/cxl/core/pci.c b/drivers/cxl/core/pci.c
>>> index 0f4c07fd64a5..f5f87c2c3fd5 100644
>>> --- a/drivers/cxl/core/pci.c
>>> +++ b/drivers/cxl/core/pci.c
>>> @@ -677,10 +677,11 @@ static void __cxl_handle_cor_ras(struct device *dev, u64 serial,
>>>  
>>>  	addr = ras_base + CXL_RAS_CORRECTABLE_STATUS_OFFSET;
>>>  	status = readl(addr);
>>> -	if (status & CXL_RAS_CORRECTABLE_STATUS_MASK) {
>>> -		writel(status & CXL_RAS_CORRECTABLE_STATUS_MASK, addr);
>>> -		trace_cxl_aer_correctable_error(dev, serial, status);
>>> -	}
>>> +	if (!(status & CXL_RAS_CORRECTABLE_STATUS_MASK))
>>> +		return;
>>> +	writel(status & CXL_RAS_CORRECTABLE_STATUS_MASK, addr);
>>> +
>>> +	trace_cxl_aer_correctable_error(dev, serial, status);
>>>  }
>>>  
>>>  static void cxl_handle_endpoint_cor_ras(struct cxl_dev_state *cxlds)
> 


  reply	other threads:[~2025-06-06 22:38 UTC|newest]

Thread overview: 90+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-06-03 17:22 [PATCH v9 00/16] Enable CXL PCIe port protocol error handling and logging Terry Bowman
2025-06-03 17:22 ` [PATCH v9 01/16] PCI/CXL: Add pcie_is_cxl() Terry Bowman
2025-06-04 19:06   ` Sathyanarayanan Kuppuswamy
2025-06-04 19:18     ` Bowman, Terry
2025-06-05 23:24   ` Dave Jiang
2025-06-03 17:22 ` [PATCH v9 02/16] PCI/AER: Report CXL or PCIe bus error type in trace logging Terry Bowman
2025-06-03 22:02   ` Sathyanarayanan Kuppuswamy
2025-06-04 14:32     ` Bowman, Terry
2025-06-04 19:24       ` Sathyanarayanan Kuppuswamy
2025-06-04 21:30         ` Bowman, Terry
2025-06-05 23:28   ` Dave Jiang
2025-06-03 17:22 ` [PATCH v9 03/16] CXL/AER: Introduce kfifo for forwarding CXL errors Terry Bowman
2025-06-04  6:01   ` Dan Carpenter
2025-06-04 14:37     ` Bowman, Terry
2025-06-04 17:24       ` Dan Carpenter
2025-06-04 19:21         ` Bowman, Terry
2025-06-04 22:50   ` Sathyanarayanan Kuppuswamy
2025-06-05 14:04     ` Bowman, Terry
2025-06-06  0:27   ` Dave Jiang
2025-06-06 14:27     ` Bowman, Terry
2025-06-06 14:36       ` Dave Jiang
2025-06-12 11:04   ` Jonathan Cameron
2025-06-12 14:29     ` Bowman, Terry
2025-06-03 17:22 ` [PATCH v9 04/16] PCI/AER: Dequeue forwarded CXL error Terry Bowman
2025-06-04  6:05   ` Dan Carpenter
2025-06-04 14:38     ` Bowman, Terry
2025-06-04 23:58   ` Sathyanarayanan Kuppuswamy
2025-06-06 15:57   ` Dave Jiang
2025-06-06 18:14     ` Bowman, Terry
2025-06-06 22:43       ` Dave Jiang
2025-06-09 19:57         ` Bowman, Terry
2025-06-09 20:34           ` Dave Jiang
2025-06-12 11:17             ` Jonathan Cameron
2025-06-06 21:08     ` Bowman, Terry
2025-06-06 23:15     ` Bowman, Terry
2025-06-09 20:17       ` Dave Jiang
2025-06-10  4:15   ` Lukas Wunner
2025-06-10 18:07     ` Bowman, Terry
2025-06-10 21:20       ` Bowman, Terry
2025-06-11  4:38         ` Lukas Wunner
2025-06-17 16:08           ` Dave Jiang
2025-06-17 18:20             ` Robert Richter
2025-06-12 11:36   ` Jonathan Cameron
2025-06-12 18:35     ` Bowman, Terry
2025-06-03 17:22 ` [PATCH v9 05/16] CXL/PCI: Introduce CXL uncorrectable protocol error recovery Terry Bowman
2025-06-05 15:14   ` Sathyanarayanan Kuppuswamy
2025-06-05 16:01     ` Bowman, Terry
2025-06-06 16:45   ` Dave Jiang
2025-06-06 18:16     ` Bowman, Terry
2025-06-12 16:06   ` Jonathan Cameron
2025-06-12 16:29     ` Bowman, Terry
2025-06-03 17:22 ` [PATCH v9 06/16] cxl/pci: Move RAS initialization to cxl_port driver Terry Bowman
2025-06-06 17:04   ` Dave Jiang
2025-06-06 18:17     ` Bowman, Terry
2025-06-03 17:22 ` [PATCH v9 07/16] cxl/pci: Map CXL Endpoint Port and CXL Switch Port RAS registers Terry Bowman
2025-06-03 17:22 ` [PATCH v9 08/16] cxl/pci: Update RAS handler interfaces to also support CXL Ports Terry Bowman
2025-06-05 16:42   ` Sathyanarayanan Kuppuswamy
2025-06-03 17:22 ` [PATCH v9 09/16] cxl/pci: Log message if RAS registers are unmapped Terry Bowman
2025-06-05 16:42   ` Sathyanarayanan Kuppuswamy
2025-06-06 17:27   ` Dave Jiang
2025-06-03 17:22 ` [PATCH v9 10/16] cxl/pci: Unify CXL trace logging for CXL Endpoints and CXL Ports Terry Bowman
2025-06-05 16:49   ` Sathyanarayanan Kuppuswamy
2025-06-06  9:08   ` Shiju Jose
2025-06-06 14:41     ` Bowman, Terry
2025-06-06 15:24       ` Bowman, Terry
2025-06-12 16:25         ` Jonathan Cameron
2025-06-03 17:22 ` [PATCH v9 11/16] cxl/pci: Update __cxl_handle_cor_ras() to return early if no RAS errors Terry Bowman
2025-06-05 18:37   ` Sathyanarayanan Kuppuswamy
2025-06-06 20:30   ` Dave Jiang
2025-06-06 20:55     ` Bowman, Terry
2025-06-06 22:38       ` Dave Jiang [this message]
2025-06-12 16:46   ` Jonathan Cameron
2025-06-16 20:30     ` Bowman, Terry
2025-06-03 17:22 ` [PATCH v9 12/16] cxl/pci: Introduce CXL Endpoint protocol error handlers Terry Bowman
2025-06-06  0:22   ` Sathyanarayanan Kuppuswamy
2025-06-12 16:55   ` Jonathan Cameron
2025-06-03 17:22 ` [PATCH v9 13/16] cxl/pci: Introduce CXL Port " Terry Bowman
2025-06-06  0:50   ` Sathyanarayanan Kuppuswamy
2025-06-12 17:14   ` Jonathan Cameron
2025-06-16 22:17     ` Bowman, Terry
2025-06-03 17:22 ` [PATCH v9 14/16] cxl/pci: Remove unnecessary CXL Endpoint handling helper functions Terry Bowman
2025-06-06  0:50   ` Sathyanarayanan Kuppuswamy
2025-06-12 17:16   ` Jonathan Cameron
2025-06-03 17:22 ` [PATCH v9 15/16] CXL/PCI: Enable CXL protocol errors during CXL Port probe Terry Bowman
2025-06-06  0:51   ` Sathyanarayanan Kuppuswamy
2025-06-03 17:22 ` [PATCH v9 16/16] CXL/PCI: Disable CXL protocol error interrupts during CXL Port cleanup Terry Bowman
2025-06-06  0:52   ` Sathyanarayanan Kuppuswamy
2025-06-06 13:51     ` Bowman, Terry
2025-06-06 22:59   ` Dave Jiang
2025-06-12 17:19   ` Jonathan Cameron

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