From: Dave Jiang <dave.jiang@intel.com>
To: Srirangan Madhavan <smadhavan@nvidia.com>,
Alison Schofield <alison.schofield@intel.com>,
Bjorn Helgaas <bhelgaas@google.com>,
Davidlohr Bueso <dave@stgolabs.net>,
Ira Weiny <ira.weiny@intel.com>,
Jonathan Cameron <jic23@kernel.org>,
Vishal Verma <vishal.l.verma@intel.com>,
linux-cxl@vger.kernel.org, linux-pci@vger.kernel.org,
linux-kernel@vger.kernel.org
Cc: Alex Williamson <alex.williamson@redhat.com>,
vsethi@nvidia.com, alwilliamson@nvidia.com,
Sai Yashwanth Reddy Kancherla <skancherla@nvidia.com>,
Vishal Aslot <vaslot@nvidia.com>,
Manish Honap <mhonap@nvidia.com>, Jiandi An <jan@nvidia.com>,
Richard Cheng <icheng@nvidia.com>,
linux-tegra@vger.kernel.org
Subject: Re: [PATCH v14 08/16] cxl: Reject overflowing HDM decoder ranges
Date: Fri, 2 Oct 2026 14:50:59 -0700 [thread overview]
Message-ID: <cc1a68c6-b057-4cc6-bd7a-0f3156bb1af4@intel.com> (raw)
In-Reply-To: <20261001092227.3004747-9-smadhavan@nvidia.com>
On 10/1/26 2:22 AM, Srirangan Madhavan wrote:
> An HDM decoder with a nonzero size can report a base and size whose end
> address wraps the 64-bit address space. Reject that programming before
> publishing the decoder range, so enumeration and later reset handling
> cannot use the wrapped range.
>
> Use check_add_overflow() for nonzero ranges. Preserve the existing
> empty-range representation for zero-size decoders.
Why split this out instead of just introduce it when the function is introduced in the previous patch?
DJ
>
> Signed-off-by: Srirangan Madhavan <smadhavan@nvidia.com>
> ---
> drivers/cxl/core/resource.c | 7 ++++++-
> 1 file changed, 6 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/cxl/core/resource.c b/drivers/cxl/core/resource.c
> index 8dfeb12de8c9..8d2fbc49a06f 100644
> --- a/drivers/cxl/core/resource.c
> +++ b/drivers/cxl/core/resource.c
> @@ -115,16 +115,21 @@ int cxl_hdm_unpack_decoder(struct cxl_decoder_settings *settings, int id,
> int interleave_ways;
> unsigned long flags = 0;
> struct range hpa_range;
> + u64 end;
> int rc;
>
> if (!committed)
> size = 0;
> if (base == U64_MAX || size == U64_MAX)
> return -ENXIO;
> + if (size && check_add_overflow(base, size - 1, &end))
> + return -ENXIO;
> + if (!size)
> + end = base - 1;
>
> hpa_range = (struct range) {
> .start = base,
> - .end = base + size - 1,
> + .end = end,
> };
>
> if (committed) {
next prev parent reply other threads:[~2026-10-02 21:51 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-01 9:22 [PATCH v14 00/16] PCI/CXL: Add CXL reset support for Type 2 devices Srirangan Madhavan
2026-10-01 9:22 ` [PATCH v14 01/16] cxl: Drop stale decoder interleave limit comment Srirangan Madhavan
2026-10-02 9:33 ` Richard Cheng
2026-10-01 9:22 ` [PATCH v14 02/16] cxl: Share CXL port upstream PCI device lookup Srirangan Madhavan
2026-10-02 9:48 ` Richard Cheng
2026-10-01 9:22 ` [PATCH v14 03/16] cxl: Move decoder declarations to shared header Srirangan Madhavan
2026-10-02 9:49 ` Richard Cheng
2026-10-01 9:22 ` [PATCH v14 04/16] cxl: Embed decoder configuration in a standalone structure Srirangan Madhavan
2026-10-02 10:17 ` Richard Cheng
2026-10-02 19:07 ` Dave Jiang
2026-10-01 9:22 ` [PATCH v14 05/16] cxl: Introduce reusable HDM decoder settings Srirangan Madhavan
2026-10-02 19:59 ` Dave Jiang
2026-10-01 9:22 ` [PATCH v14 06/16] cxl: Move HDM decoder helpers to built-in resource code Srirangan Madhavan
2026-10-01 9:22 ` [PATCH v14 07/16] cxl: Share HDM decoder register unpacking Srirangan Madhavan
2026-10-02 21:46 ` Dave Jiang
2026-10-01 9:22 ` [PATCH v14 08/16] cxl: Reject overflowing HDM decoder ranges Srirangan Madhavan
2026-10-02 21:50 ` Dave Jiang [this message]
2026-10-01 9:22 ` [PATCH v14 09/16] cxl: Refresh cached PCI HDM decoder settings Srirangan Madhavan
2026-10-02 23:57 ` Dave Jiang
2026-10-01 9:22 ` [PATCH v14 10/16] cxl: Cache endpoint HDM state during PCI enumeration Srirangan Madhavan
2026-10-01 9:22 ` [PATCH v14 11/16] cxl: Add CXL Device Reset sequencing Srirangan Madhavan
2026-10-01 9:22 ` [PATCH v14 12/16] cxl: Validate and synchronize HDM ranges around reset Srirangan Madhavan
2026-10-02 8:06 ` Richard Cheng
2026-10-01 9:22 ` [PATCH v14 13/16] PCI/CXL: Reject reset with unsafe function scope Srirangan Madhavan
2026-10-01 9:22 ` [PATCH v14 14/16] cxl: Restore CXL state after PCI reset Srirangan Madhavan
2026-10-01 9:22 ` [PATCH v14 15/16] PCI/CXL: Expose CXL Reset as a PCI reset method Srirangan Madhavan
2026-10-01 9:22 ` [PATCH v14 16/16] PCI/CXL: Restore CXL state after CXL bus reset Srirangan Madhavan
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