From: Andrew Lunn <andrew@lunn.ch>
To: Jie Luo <quic_luoj@quicinc.com>
Cc: agross@kernel.org, andersson@kernel.org,
konrad.dybcio@linaro.org, davem@davemloft.net,
edumazet@google.com, kuba@kernel.org, pabeni@redhat.com,
robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org,
conor+dt@kernel.org, hkallweit1@gmail.com, linux@armlinux.org.uk,
robert.marko@sartura.hr, linux-arm-msm@vger.kernel.org,
netdev@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, quic_srichara@quicinc.com
Subject: Re: [PATCH 3/9] net: mdio: ipq4019: Enable GPIO reset for ipq5332 platform
Date: Thu, 16 Nov 2023 18:20:47 +0100 [thread overview]
Message-ID: <dd2c3cfa-f7ee-4abb-9eff-2aac04fa914f@lunn.ch> (raw)
In-Reply-To: <33246b49-2579-4889-9fcb-babec5003a88@quicinc.com>
> FYI, here is the sequence to bring up qca8084.
> a. enable clock output to qca8084.
> b. do gpio reset of qca8084.
> c. customize MDIO address and initialization configurations.
> d. the PHY ID can be acquired.
This all sounds like it is specific to the qca8084, so it should be in
the driver for the qca8084.
Its been pointed out you can get the driver to load by using the PHY
ID in the compatible. You want the SoC clock driver to export a CCF
clock, which the PHY driver can use. The PHY driver should also be
able to get the GPIO. So i think the PHY driver can do all this.
Andrew
next prev parent reply other threads:[~2023-11-16 17:21 UTC|newest]
Thread overview: 55+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-11-15 3:25 [PATCH 0/9] add MDIO changes on " Luo Jie
2023-11-15 3:25 ` [PATCH 1/9] net: mdio: ipq4019: increase eth_ldo_rdy for " Luo Jie
2023-11-15 13:44 ` Andrew Lunn
2023-11-16 9:35 ` Jie Luo
2023-11-16 11:57 ` Krzysztof Kozlowski
2023-11-17 9:56 ` Jie Luo
2023-11-15 3:25 ` [PATCH 2/9] net: mdio: ipq4019: Enable the clocks " Luo Jie
2023-11-20 14:22 ` Konrad Dybcio
2023-11-21 10:28 ` Jie Luo
2023-11-21 14:04 ` Andrew Lunn
2023-11-23 11:02 ` Jie Luo
2023-11-27 9:37 ` Simon Horman
2023-11-28 7:07 ` Jie Luo
2023-11-15 3:25 ` [PATCH 3/9] net: mdio: ipq4019: Enable GPIO reset " Luo Jie
2023-11-15 15:11 ` Andrew Lunn
2023-11-16 11:13 ` Jie Luo
2023-11-16 11:19 ` Robert Marko
2023-11-16 11:29 ` Jie Luo
2023-11-16 17:20 ` Andrew Lunn [this message]
2023-11-17 9:59 ` Jie Luo
2023-12-04 8:53 ` Jie Luo
2023-11-15 3:25 ` [PATCH 4/9] net: mdio: ipq4019: configure CMN PLL clock for ipq5332 Luo Jie
2023-11-15 15:19 ` Andrew Lunn
2023-11-16 10:48 ` Jie Luo
2023-11-22 20:24 ` Konrad Dybcio
2023-11-15 3:25 ` [PATCH 5/9] net: mdio: ipq4019: support MDIO clock frequency divider Luo Jie
2023-11-15 15:22 ` Andrew Lunn
2023-11-16 10:47 ` Jie Luo
2023-11-15 3:25 ` [PATCH 6/9] net: mdio: ipq4019: Support qca8084 switch register access Luo Jie
2023-11-15 3:25 ` [PATCH 7/9] net: mdio: ipq4019: program phy address when "fixup" defined Luo Jie
2023-11-15 16:17 ` Andrew Lunn
2023-11-16 11:17 ` Jie Luo
2023-11-15 3:25 ` [PATCH 8/9] net: mdio: ipq4019: add qca8084 configurations Luo Jie
2023-11-15 16:20 ` Andrew Lunn
2023-11-15 17:01 ` Konrad Dybcio
2023-11-15 17:03 ` Robert Marko
2023-11-16 10:45 ` Jie Luo
2023-11-16 17:08 ` Andrew Lunn
2023-11-17 10:05 ` Jie Luo
2023-11-16 10:44 ` Jie Luo
2023-11-16 10:47 ` Jie Luo
2023-11-16 17:12 ` Andrew Lunn
2023-11-17 10:15 ` Jie Luo
2023-11-15 3:25 ` [PATCH 9/9] dt-bindings: net: ipq4019-mdio: Document ipq5332 platform Luo Jie
2023-11-15 4:20 ` Rob Herring
2023-11-15 14:35 ` Andrew Lunn
2023-11-16 11:22 ` Jie Luo
2023-11-16 11:56 ` Krzysztof Kozlowski
2023-11-17 10:36 ` Jie Luo
2023-11-17 10:40 ` Krzysztof Kozlowski
2023-11-17 11:20 ` Jie Luo
2023-11-17 12:43 ` Krzysztof Kozlowski
2023-11-18 8:07 ` Jie Luo
2023-11-18 15:36 ` Andrew Lunn
2023-11-20 9:00 ` Jie Luo
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