[PATCH] arm64: dts: qcom: sm8750: Add camera clock controller

[PATCH] arm64: dts: qcom: sm8750: Add camera clock controller

[Taniya Das]

Add the camcc clock controller device node for SM8750 SoC.

Signed-off-by: Taniya Das <taniya.das@oss.qualcomm.com>
---
 arch/arm64/boot/dts/qcom/sm8750.dtsi | 35 ++++++++++++++++++++++++++++++++++-
 1 file changed, 34 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/qcom/sm8750.dtsi b/arch/arm64/boot/dts/qcom/sm8750.dtsi
index 3f0b57f428bbb388521c27d9ae96bbef3d62b2e2..f09cec6358806f21827e68e365b492e563c0689a 100644
--- a/arch/arm64/boot/dts/qcom/sm8750.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8750.dtsi
@@ -2,7 +2,8 @@
 /*
  * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
  */
-
+#include <dt-bindings/clock/qcom,sm8750-cambistmclkcc.h>
+#include <dt-bindings/clock/qcom,sm8750-camcc.h>
 #include <dt-bindings/clock/qcom,rpmh.h>
 #include <dt-bindings/clock/qcom,sm8750-gcc.h>
 #include <dt-bindings/clock/qcom,sm8750-tcsr.h>
@@ -2046,6 +2047,22 @@ aggre2_noc: interconnect@1700000 {
 			clocks = <&rpmhcc RPMH_IPA_CLK>;
 		};
 
+		cambistmclkcc: clock-controller@1760000 {
+		       compatible = "qcom,sm8750-cambistmclkcc";
+		       reg = <0x0 0x1760000 0x0 0x6000>;
+		       clocks = <&gcc GCC_CAM_BIST_MCLK_AHB_CLK> ,
+				<&bi_tcxo_div2>,
+				<&bi_tcxo_ao_div2>,
+				<&sleep_clk>;
+			power-domains = <&rpmhpd RPMHPD_MMCX>,
+					<&rpmhpd RPMHPD_MX>;
+			required-opps = <&rpmhpd_opp_low_svs>,
+					<&rpmhpd_opp_low_svs>;
+			#clock-cells = <1>;
+			#reset-cells = <1>;
+			#power-domain-cells = <1>;
+		};
+
 		mmss_noc: interconnect@1780000 {
 			compatible = "qcom,sm8750-mmss-noc";
 			reg = <0x0 0x01780000 0x0 0x5b800>;
@@ -2740,6 +2757,22 @@ usb_dwc3_ss: endpoint {
 			};
 		};
 
+		camcc: clock-controller@ade0000 {
+			compatible = "qcom,sm8750-camcc";
+			reg = <0x0 0xade0000 0x0 0x20000>;
+			clocks = <&gcc GCC_CAMERA_AHB_CLK>,
+				 <&bi_tcxo_div2>,
+				 <&bi_tcxo_ao_div2>,
+				 <&sleep_clk>;
+			power-domains = <&rpmhpd RPMHPD_MMCX>,
+					<&rpmhpd RPMHPD_MXC>;
+			required-opps = <&rpmhpd_opp_low_svs>,
+					<&rpmhpd_opp_low_svs>;
+			#clock-cells = <1>;
+			#reset-cells = <1>;
+			#power-domain-cells = <1>;
+		};
+
 		pdc: interrupt-controller@b220000 {
 			compatible = "qcom,sm8750-pdc", "qcom,pdc";
 			reg = <0x0 0x0b220000 0x0 0x10000>, <0x0 0x164400f0 0x0 0x64>;

---
base-commit: 47b7b5e32bb7264b51b89186043e1ada4090b558
change-id: 20251203-sm8750_camcc_dt-350a8d217376

Best regards,
-- 
Taniya Das <taniya.das@oss.qualcomm.com>

Re: [PATCH] arm64: dts: qcom: sm8750: Add camera clock controller

[Konrad Dybcio]

On 12/3/25 11:32 AM, Taniya Das wrote:
> Add the camcc clock controller device node for SM8750 SoC.
> 
> Signed-off-by: Taniya Das <taniya.das@oss.qualcomm.com>
> ---

[...]

> +		camcc: clock-controller@ade0000 {
> +			compatible = "qcom,sm8750-camcc";
> +			reg = <0x0 0xade0000 0x0 0x20000>;
> +			clocks = <&gcc GCC_CAMERA_AHB_CLK>,
> +				 <&bi_tcxo_div2>,
> +				 <&bi_tcxo_ao_div2>,
> +				 <&sleep_clk>;
> +			power-domains = <&rpmhpd RPMHPD_MMCX>,
> +					<&rpmhpd RPMHPD_MXC>;

I see that a small subset of clocks here also needs MXA

Konrad

Re: [PATCH] arm64: dts: qcom: sm8750: Add camera clock controller

[Vladimir Zapolskiy]

Hi Taniya.

On 12/3/25 12:32, Taniya Das wrote:
> Add the camcc clock controller device node for SM8750 SoC.
> 
> Signed-off-by: Taniya Das <taniya.das@oss.qualcomm.com>
> ---
>   arch/arm64/boot/dts/qcom/sm8750.dtsi | 35 ++++++++++++++++++++++++++++++++++-
>   1 file changed, 34 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/arm64/boot/dts/qcom/sm8750.dtsi b/arch/arm64/boot/dts/qcom/sm8750.dtsi
> index 3f0b57f428bbb388521c27d9ae96bbef3d62b2e2..f09cec6358806f21827e68e365b492e563c0689a 100644
> --- a/arch/arm64/boot/dts/qcom/sm8750.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8750.dtsi
> @@ -2,7 +2,8 @@
>   /*
>    * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
>    */
> -
> +#include <dt-bindings/clock/qcom,sm8750-cambistmclkcc.h>
> +#include <dt-bindings/clock/qcom,sm8750-camcc.h>
>   #include <dt-bindings/clock/qcom,rpmh.h>
>   #include <dt-bindings/clock/qcom,sm8750-gcc.h>
>   #include <dt-bindings/clock/qcom,sm8750-tcsr.h>

Please keep the list of included headers ordered.

> @@ -2046,6 +2047,22 @@ aggre2_noc: interconnect@1700000 {
>   			clocks = <&rpmhcc RPMH_IPA_CLK>;
>   		};
>   
> +		cambistmclkcc: clock-controller@1760000 {
> +		       compatible = "qcom,sm8750-cambistmclkcc";
> +		       reg = <0x0 0x1760000 0x0 0x6000>;
> +		       clocks = <&gcc GCC_CAM_BIST_MCLK_AHB_CLK> ,
> +				<&bi_tcxo_div2>,
> +				<&bi_tcxo_ao_div2>,
> +				<&sleep_clk>;
> +			power-domains = <&rpmhpd RPMHPD_MMCX>,
> +					<&rpmhpd RPMHPD_MX>;
> +			required-opps = <&rpmhpd_opp_low_svs>,
> +					<&rpmhpd_opp_low_svs>;
> +			#clock-cells = <1>;
> +			#reset-cells = <1>;
> +			#power-domain-cells = <1>;

I've briefly checked the recently sent driver, and I didn't find that this
clock controller serves as a reset controller or a power domain controller.

And if so, these properties shall be obviously removed.

> +		};
> +
>   		mmss_noc: interconnect@1780000 {
>   			compatible = "qcom,sm8750-mmss-noc";
>   			reg = <0x0 0x01780000 0x0 0x5b800>;
> @@ -2740,6 +2757,22 @@ usb_dwc3_ss: endpoint {
>   			};
>   		};
>   
> +		camcc: clock-controller@ade0000 {
> +			compatible = "qcom,sm8750-camcc";
> +			reg = <0x0 0xade0000 0x0 0x20000>;
> +			clocks = <&gcc GCC_CAMERA_AHB_CLK>,
> +				 <&bi_tcxo_div2>,
> +				 <&bi_tcxo_ao_div2>,
> +				 <&sleep_clk>;
> +			power-domains = <&rpmhpd RPMHPD_MMCX>,
> +					<&rpmhpd RPMHPD_MXC>;
> +			required-opps = <&rpmhpd_opp_low_svs>,
> +					<&rpmhpd_opp_low_svs>;
> +			#clock-cells = <1>;
> +			#reset-cells = <1>;
> +			#power-domain-cells = <1>;
> +		};
> +
>   		pdc: interrupt-controller@b220000 {
>   			compatible = "qcom,sm8750-pdc", "qcom,pdc";
>   			reg = <0x0 0x0b220000 0x0 0x10000>, <0x0 0x164400f0 0x0 0x64>;
> 

-- 
Best wishes,
Vladimir

Re: [PATCH] arm64: dts: qcom: sm8750: Add camera clock controller

[Abel Vesa]

On 25-12-03 16:02:07, Taniya Das wrote:
> Add the camcc clock controller device node for SM8750 SoC.
> 

So there are 2 clock controller nodes. Maybe you can say something about the
cambistmclkcc in here as well.

The rest looks good, so with that:

Reviewed-by: Abel Vesa <abel.vesa@oss.qualcomm.com>

Re: [PATCH] arm64: dts: qcom: sm8750: Add camera clock controller

[Dmitry Baryshkov]

On Wed, Dec 03, 2025 at 04:03:26PM +0200, Vladimir Zapolskiy wrote:
> Hi Taniya.
> 
> On 12/3/25 12:32, Taniya Das wrote:
> > Add the camcc clock controller device node for SM8750 SoC.
> > 
> > Signed-off-by: Taniya Das <taniya.das@oss.qualcomm.com>
> > ---
> >   arch/arm64/boot/dts/qcom/sm8750.dtsi | 35 ++++++++++++++++++++++++++++++++++-
> >   1 file changed, 34 insertions(+), 1 deletion(-)

> > @@ -2046,6 +2047,22 @@ aggre2_noc: interconnect@1700000 {
> >   			clocks = <&rpmhcc RPMH_IPA_CLK>;
> >   		};
> > +		cambistmclkcc: clock-controller@1760000 {
> > +		       compatible = "qcom,sm8750-cambistmclkcc";
> > +		       reg = <0x0 0x1760000 0x0 0x6000>;
> > +		       clocks = <&gcc GCC_CAM_BIST_MCLK_AHB_CLK> ,
> > +				<&bi_tcxo_div2>,
> > +				<&bi_tcxo_ao_div2>,
> > +				<&sleep_clk>;
> > +			power-domains = <&rpmhpd RPMHPD_MMCX>,
> > +					<&rpmhpd RPMHPD_MX>;
> > +			required-opps = <&rpmhpd_opp_low_svs>,
> > +					<&rpmhpd_opp_low_svs>;
> > +			#clock-cells = <1>;
> > +			#reset-cells = <1>;
> > +			#power-domain-cells = <1>;
> 
> I've briefly checked the recently sent driver, and I didn't find that this
> clock controller serves as a reset controller or a power domain controller.
> 
> And if so, these properties shall be obviously removed.

I'd agree here.

> 
> > +		};
> > +
> >   		mmss_noc: interconnect@1780000 {
> >   			compatible = "qcom,sm8750-mmss-noc";
> >   			reg = <0x0 0x01780000 0x0 0x5b800>;
-- 
With best wishes
Dmitry

Re: [PATCH] arm64: dts: qcom: sm8750: Add camera clock controller

[Taniya Das]

On 12/3/2025 6:39 PM, Konrad Dybcio wrote:
> On 12/3/25 11:32 AM, Taniya Das wrote:
>> Add the camcc clock controller device node for SM8750 SoC.
>>
>> Signed-off-by: Taniya Das <taniya.das@oss.qualcomm.com>
>> ---
> 
> [...]
> 
>> +		camcc: clock-controller@ade0000 {
>> +			compatible = "qcom,sm8750-camcc";
>> +			reg = <0x0 0xade0000 0x0 0x20000>;
>> +			clocks = <&gcc GCC_CAMERA_AHB_CLK>,
>> +				 <&bi_tcxo_div2>,
>> +				 <&bi_tcxo_ao_div2>,
>> +				 <&sleep_clk>;
>> +			power-domains = <&rpmhpd RPMHPD_MMCX>,
>> +					<&rpmhpd RPMHPD_MXC>;
> 
> I see that a small subset of clocks here also needs MXA
> 

Sure, will update the phandle.

-- 
Thanks,
Taniya Das

Re: [PATCH] arm64: dts: qcom: sm8750: Add camera clock controller

[Konrad Dybcio]

On 12/6/25 4:45 AM, Dmitry Baryshkov wrote:
> On Wed, Dec 03, 2025 at 04:03:26PM +0200, Vladimir Zapolskiy wrote:
>> Hi Taniya.
>>
>> On 12/3/25 12:32, Taniya Das wrote:
>>> Add the camcc clock controller device node for SM8750 SoC.
>>>
>>> Signed-off-by: Taniya Das <taniya.das@oss.qualcomm.com>
>>> ---
>>>   arch/arm64/boot/dts/qcom/sm8750.dtsi | 35 ++++++++++++++++++++++++++++++++++-
>>>   1 file changed, 34 insertions(+), 1 deletion(-)
> 
>>> @@ -2046,6 +2047,22 @@ aggre2_noc: interconnect@1700000 {
>>>   			clocks = <&rpmhcc RPMH_IPA_CLK>;
>>>   		};
>>> +		cambistmclkcc: clock-controller@1760000 {
>>> +		       compatible = "qcom,sm8750-cambistmclkcc";
>>> +		       reg = <0x0 0x1760000 0x0 0x6000>;
>>> +		       clocks = <&gcc GCC_CAM_BIST_MCLK_AHB_CLK> ,
>>> +				<&bi_tcxo_div2>,
>>> +				<&bi_tcxo_ao_div2>,
>>> +				<&sleep_clk>;
>>> +			power-domains = <&rpmhpd RPMHPD_MMCX>,
>>> +					<&rpmhpd RPMHPD_MX>;
>>> +			required-opps = <&rpmhpd_opp_low_svs>,
>>> +					<&rpmhpd_opp_low_svs>;
>>> +			#clock-cells = <1>;
>>> +			#reset-cells = <1>;
>>> +			#power-domain-cells = <1>;
>>
>> I've briefly checked the recently sent driver, and I didn't find that this
>> clock controller serves as a reset controller or a power domain controller.
>>
>> And if so, these properties shall be obviously removed.
> 
> I'd agree here.

This block is most definitely a reset provider, but none are described
in Linux as of right now

I don't see any GDSCs though

Konrad