From: Mike Frysinger <vapier@gentoo.org>
To: linux-kernel@vger.kernel.org
Cc: uclinux-dist-devel@blackfin.uclinux.org
Subject: [PATCH 40/72] Blackfin: drop unused MMR defines that only cause bad code to be written
Date: Mon, 14 Sep 2009 16:07:44 -0400 [thread overview]
Message-ID: <1252958896-25150-41-git-send-email-vapier@gentoo.org> (raw)
In-Reply-To: <1252958896-25150-1-git-send-email-vapier@gentoo.org>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
---
arch/blackfin/mach-bf518/include/mach/blackfin.h | 10 ---
arch/blackfin/mach-bf527/include/mach/blackfin.h | 10 ---
arch/blackfin/mach-bf533/dma.c | 8 +-
arch/blackfin/mach-bf533/include/mach/blackfin.h | 7 --
arch/blackfin/mach-bf537/dma.c | 8 +-
arch/blackfin/mach-bf537/include/mach/blackfin.h | 90 ----------------------
arch/blackfin/mach-bf538/include/mach/blackfin.h | 10 ---
arch/blackfin/mach-bf548/include/mach/blackfin.h | 89 ---------------------
8 files changed, 8 insertions(+), 224 deletions(-)
diff --git a/arch/blackfin/mach-bf518/include/mach/blackfin.h b/arch/blackfin/mach-bf518/include/mach/blackfin.h
index e8e14c2..83421d3 100644
--- a/arch/blackfin/mach-bf518/include/mach/blackfin.h
+++ b/arch/blackfin/mach-bf518/include/mach/blackfin.h
@@ -68,11 +68,6 @@
#endif
#endif
-/* UART_IIR Register */
-#define STATUS(x) ((x << 1) & 0x06)
-#define STATUS_P1 0x02
-#define STATUS_P0 0x01
-
#define BFIN_UART_NR_PORTS 2
#define OFFSET_THR 0x00 /* Transmit Holding register */
@@ -88,11 +83,6 @@
#define OFFSET_SCR 0x1C /* SCR Scratch Register */
#define OFFSET_GCTL 0x24 /* Global Control Register */
-/* DPMC*/
-#define bfin_read_STOPCK_OFF() bfin_read_STOPCK()
-#define bfin_write_STOPCK_OFF(val) bfin_write_STOPCK(val)
-#define STOPCK_OFF STOPCK
-
/* PLL_DIV Masks */
#define CCLK_DIV1 CSEL_DIV1 /* CCLK = VCO / 1 */
#define CCLK_DIV2 CSEL_DIV2 /* CCLK = VCO / 2 */
diff --git a/arch/blackfin/mach-bf527/include/mach/blackfin.h b/arch/blackfin/mach-bf527/include/mach/blackfin.h
index 03665a8..ea9cb0f 100644
--- a/arch/blackfin/mach-bf527/include/mach/blackfin.h
+++ b/arch/blackfin/mach-bf527/include/mach/blackfin.h
@@ -56,11 +56,6 @@
#endif
#endif
-/* UART_IIR Register */
-#define STATUS(x) ((x << 1) & 0x06)
-#define STATUS_P1 0x02
-#define STATUS_P0 0x01
-
#define BFIN_UART_NR_PORTS 2
#define OFFSET_THR 0x00 /* Transmit Holding register */
@@ -76,11 +71,6 @@
#define OFFSET_SCR 0x1C /* SCR Scratch Register */
#define OFFSET_GCTL 0x24 /* Global Control Register */
-/* DPMC*/
-#define bfin_read_STOPCK_OFF() bfin_read_STOPCK()
-#define bfin_write_STOPCK_OFF(val) bfin_write_STOPCK(val)
-#define STOPCK_OFF STOPCK
-
/* PLL_DIV Masks */
#define CCLK_DIV1 CSEL_DIV1 /* CCLK = VCO / 1 */
#define CCLK_DIV2 CSEL_DIV2 /* CCLK = VCO / 2 */
diff --git a/arch/blackfin/mach-bf533/dma.c b/arch/blackfin/mach-bf533/dma.c
index 0a6eb8f..7a443c3 100644
--- a/arch/blackfin/mach-bf533/dma.c
+++ b/arch/blackfin/mach-bf533/dma.c
@@ -76,12 +76,12 @@ int channel2irq(unsigned int channel)
ret_irq = IRQ_SPI;
break;
- case CH_UART_RX:
- ret_irq = IRQ_UART_RX;
+ case CH_UART0_RX:
+ ret_irq = IRQ_UART0_RX;
break;
- case CH_UART_TX:
- ret_irq = IRQ_UART_TX;
+ case CH_UART0_TX:
+ ret_irq = IRQ_UART0_TX;
break;
case CH_MEM_STREAM0_SRC:
diff --git a/arch/blackfin/mach-bf533/include/mach/blackfin.h b/arch/blackfin/mach-bf533/include/mach/blackfin.h
index 39aa175..499e897 100644
--- a/arch/blackfin/mach-bf533/include/mach/blackfin.h
+++ b/arch/blackfin/mach-bf533/include/mach/blackfin.h
@@ -43,13 +43,6 @@
#define BFIN_UART_NR_PORTS 1
-#define CH_UART_RX CH_UART0_RX
-#define CH_UART_TX CH_UART0_TX
-
-#define IRQ_UART_ERROR IRQ_UART0_ERROR
-#define IRQ_UART_RX IRQ_UART0_RX
-#define IRQ_UART_TX IRQ_UART0_TX
-
#define OFFSET_THR 0x00 /* Transmit Holding register */
#define OFFSET_RBR 0x00 /* Receive Buffer register */
#define OFFSET_DLL 0x00 /* Divisor Latch (Low-Byte) */
diff --git a/arch/blackfin/mach-bf537/dma.c b/arch/blackfin/mach-bf537/dma.c
index 8118505..d23fc0e 100644
--- a/arch/blackfin/mach-bf537/dma.c
+++ b/arch/blackfin/mach-bf537/dma.c
@@ -96,12 +96,12 @@ int channel2irq(unsigned int channel)
ret_irq = IRQ_SPI;
break;
- case CH_UART_RX:
- ret_irq = IRQ_UART_RX;
+ case CH_UART0_RX:
+ ret_irq = IRQ_UART0_RX;
break;
- case CH_UART_TX:
- ret_irq = IRQ_UART_TX;
+ case CH_UART0_TX:
+ ret_irq = IRQ_UART0_TX;
break;
case CH_MEM_STREAM0_SRC:
diff --git a/arch/blackfin/mach-bf537/include/mach/blackfin.h b/arch/blackfin/mach-bf537/include/mach/blackfin.h
index f5e5015..9ee8834 100644
--- a/arch/blackfin/mach-bf537/include/mach/blackfin.h
+++ b/arch/blackfin/mach-bf537/include/mach/blackfin.h
@@ -45,96 +45,11 @@
#if !defined(__ASSEMBLY__)
#include "cdefBF534.h"
-/* UART 0*/
-#define bfin_read_UART_THR() bfin_read_UART0_THR()
-#define bfin_write_UART_THR(val) bfin_write_UART0_THR(val)
-#define bfin_read_UART_RBR() bfin_read_UART0_RBR()
-#define bfin_write_UART_RBR(val) bfin_write_UART0_RBR(val)
-#define bfin_read_UART_DLL() bfin_read_UART0_DLL()
-#define bfin_write_UART_DLL(val) bfin_write_UART0_DLL(val)
-#define bfin_read_UART_IER() bfin_read_UART0_IER()
-#define bfin_write_UART_IER(val) bfin_write_UART0_IER(val)
-#define bfin_read_UART_DLH() bfin_read_UART0_DLH()
-#define bfin_write_UART_DLH(val) bfin_write_UART0_DLH(val)
-#define bfin_read_UART_IIR() bfin_read_UART0_IIR()
-#define bfin_write_UART_IIR(val) bfin_write_UART0_IIR(val)
-#define bfin_read_UART_LCR() bfin_read_UART0_LCR()
-#define bfin_write_UART_LCR(val) bfin_write_UART0_LCR(val)
-#define bfin_read_UART_MCR() bfin_read_UART0_MCR()
-#define bfin_write_UART_MCR(val) bfin_write_UART0_MCR(val)
-#define bfin_read_UART_LSR() bfin_read_UART0_LSR()
-#define bfin_write_UART_LSR(val) bfin_write_UART0_LSR(val)
-#define bfin_read_UART_SCR() bfin_read_UART0_SCR()
-#define bfin_write_UART_SCR(val) bfin_write_UART0_SCR(val)
-#define bfin_read_UART_GCTL() bfin_read_UART0_GCTL()
-#define bfin_write_UART_GCTL(val) bfin_write_UART0_GCTL(val)
-
#if defined(CONFIG_BF537) || defined(CONFIG_BF536)
#include "cdefBF537.h"
#endif
#endif
-/* MAP used DEFINES from BF533 to BF537 - so we don't need to change them in the driver, kernel, etc. */
-
-/* UART_IIR Register */
-#define STATUS(x) ((x << 1) & 0x06)
-#define STATUS_P1 0x02
-#define STATUS_P0 0x01
-
-/* DMA Channel */
-#define bfin_read_CH_UART_RX() bfin_read_CH_UART0_RX()
-#define bfin_write_CH_UART_RX(val) bfin_write_CH_UART0_RX(val)
-#define CH_UART_RX CH_UART0_RX
-#define bfin_read_CH_UART_TX() bfin_read_CH_UART0_TX()
-#define bfin_write_CH_UART_TX(val) bfin_write_CH_UART0_TX(val)
-#define CH_UART_TX CH_UART0_TX
-
-/* System Interrupt Controller */
-#define bfin_read_IRQ_UART_RX() bfin_read_IRQ_UART0_RX()
-#define bfin_write_IRQ_UART_RX(val) bfin_write_IRQ_UART0_RX(val)
-#define IRQ_UART_RX IRQ_UART0_RX
-#define bfin_read_IRQ_UART_TX() bfin_read_IRQ_UART0_TX()
-#define bfin_write_IRQ_UART_TX(val) bfin_write_IRQ_UART0_TX(val)
-#define IRQ_UART_TX IRQ_UART0_TX
-#define bfin_read_IRQ_UART_ERROR() bfin_read_IRQ_UART0_ERROR()
-#define bfin_write_IRQ_UART_ERROR(val) bfin_write_IRQ_UART0_ERROR(val)
-#define IRQ_UART_ERROR IRQ_UART0_ERROR
-
-/* MMR Registers*/
-#define bfin_read_UART_THR() bfin_read_UART0_THR()
-#define bfin_write_UART_THR(val) bfin_write_UART0_THR(val)
-#define BFIN_UART_THR UART0_THR
-#define bfin_read_UART_RBR() bfin_read_UART0_RBR()
-#define bfin_write_UART_RBR(val) bfin_write_UART0_RBR(val)
-#define BFIN_UART_RBR UART0_RBR
-#define bfin_read_UART_DLL() bfin_read_UART0_DLL()
-#define bfin_write_UART_DLL(val) bfin_write_UART0_DLL(val)
-#define BFIN_UART_DLL UART0_DLL
-#define bfin_read_UART_IER() bfin_read_UART0_IER()
-#define bfin_write_UART_IER(val) bfin_write_UART0_IER(val)
-#define BFIN_UART_IER UART0_IER
-#define bfin_read_UART_DLH() bfin_read_UART0_DLH()
-#define bfin_write_UART_DLH(val) bfin_write_UART0_DLH(val)
-#define BFIN_UART_DLH UART0_DLH
-#define bfin_read_UART_IIR() bfin_read_UART0_IIR()
-#define bfin_write_UART_IIR(val) bfin_write_UART0_IIR(val)
-#define BFIN_UART_IIR UART0_IIR
-#define bfin_read_UART_LCR() bfin_read_UART0_LCR()
-#define bfin_write_UART_LCR(val) bfin_write_UART0_LCR(val)
-#define BFIN_UART_LCR UART0_LCR
-#define bfin_read_UART_MCR() bfin_read_UART0_MCR()
-#define bfin_write_UART_MCR(val) bfin_write_UART0_MCR(val)
-#define BFIN_UART_MCR UART0_MCR
-#define bfin_read_UART_LSR() bfin_read_UART0_LSR()
-#define bfin_write_UART_LSR(val) bfin_write_UART0_LSR(val)
-#define BFIN_UART_LSR UART0_LSR
-#define bfin_read_UART_SCR() bfin_read_UART0_SCR()
-#define bfin_write_UART_SCR(val) bfin_write_UART0_SCR(val)
-#define BFIN_UART_SCR UART0_SCR
-#define bfin_read_UART_GCTL() bfin_read_UART0_GCTL()
-#define bfin_write_UART_GCTL(val) bfin_write_UART0_GCTL(val)
-#define BFIN_UART_GCTL UART0_GCTL
-
#define BFIN_UART_NR_PORTS 2
#define OFFSET_THR 0x00 /* Transmit Holding register */
@@ -150,11 +65,6 @@
#define OFFSET_SCR 0x1C /* SCR Scratch Register */
#define OFFSET_GCTL 0x24 /* Global Control Register */
-/* DPMC*/
-#define bfin_read_STOPCK_OFF() bfin_read_STOPCK()
-#define bfin_write_STOPCK_OFF(val) bfin_write_STOPCK(val)
-#define STOPCK_OFF STOPCK
-
/* PLL_DIV Masks */
#define CCLK_DIV1 CSEL_DIV1 /* CCLK = VCO / 1 */
#define CCLK_DIV2 CSEL_DIV2 /* CCLK = VCO / 2 */
diff --git a/arch/blackfin/mach-bf538/include/mach/blackfin.h b/arch/blackfin/mach-bf538/include/mach/blackfin.h
index 9496196..5ecee16 100644
--- a/arch/blackfin/mach-bf538/include/mach/blackfin.h
+++ b/arch/blackfin/mach-bf538/include/mach/blackfin.h
@@ -47,11 +47,6 @@
#endif
#endif
-/* UART_IIR Register */
-#define STATUS(x) ((x << 1) & 0x06)
-#define STATUS_P1 0x02
-#define STATUS_P0 0x01
-
#define BFIN_UART_NR_PORTS 3
#define OFFSET_THR 0x00 /* Transmit Holding register */
@@ -67,11 +62,6 @@
#define OFFSET_SCR 0x1C /* SCR Scratch Register */
#define OFFSET_GCTL 0x24 /* Global Control Register */
-/* DPMC*/
-#define bfin_read_STOPCK_OFF() bfin_read_STOPCK()
-#define bfin_write_STOPCK_OFF(val) bfin_write_STOPCK(val)
-#define STOPCK_OFF STOPCK
-
/* PLL_DIV Masks */
#define CCLK_DIV1 CSEL_DIV1 /* CCLK = VCO / 1 */
#define CCLK_DIV2 CSEL_DIV2 /* CCLK = VCO / 2 */
diff --git a/arch/blackfin/mach-bf548/include/mach/blackfin.h b/arch/blackfin/mach-bf548/include/mach/blackfin.h
index 6b97396..318667b 100644
--- a/arch/blackfin/mach-bf548/include/mach/blackfin.h
+++ b/arch/blackfin/mach-bf548/include/mach/blackfin.h
@@ -72,97 +72,8 @@
#include "cdefBF549.h"
#endif
-/* UART 1*/
-#define bfin_read_UART_THR() bfin_read_UART1_THR()
-#define bfin_write_UART_THR(val) bfin_write_UART1_THR(val)
-#define bfin_read_UART_RBR() bfin_read_UART1_RBR()
-#define bfin_write_UART_RBR(val) bfin_write_UART1_RBR(val)
-#define bfin_read_UART_DLL() bfin_read_UART1_DLL()
-#define bfin_write_UART_DLL(val) bfin_write_UART1_DLL(val)
-#define bfin_read_UART_IER() bfin_read_UART1_IER()
-#define bfin_write_UART_IER(val) bfin_write_UART1_IER(val)
-#define bfin_read_UART_DLH() bfin_read_UART1_DLH()
-#define bfin_write_UART_DLH(val) bfin_write_UART1_DLH(val)
-#define bfin_read_UART_IIR() bfin_read_UART1_IIR()
-#define bfin_write_UART_IIR(val) bfin_write_UART1_IIR(val)
-#define bfin_read_UART_LCR() bfin_read_UART1_LCR()
-#define bfin_write_UART_LCR(val) bfin_write_UART1_LCR(val)
-#define bfin_read_UART_MCR() bfin_read_UART1_MCR()
-#define bfin_write_UART_MCR(val) bfin_write_UART1_MCR(val)
-#define bfin_read_UART_LSR() bfin_read_UART1_LSR()
-#define bfin_write_UART_LSR(val) bfin_write_UART1_LSR(val)
-#define bfin_read_UART_SCR() bfin_read_UART1_SCR()
-#define bfin_write_UART_SCR(val) bfin_write_UART1_SCR(val)
-#define bfin_read_UART_GCTL() bfin_read_UART1_GCTL()
-#define bfin_write_UART_GCTL(val) bfin_write_UART1_GCTL(val)
-
#endif
-/* MAP used DEFINES from BF533 to BF54x - so we don't need to change
- * them in the driver, kernel, etc. */
-
-/* UART_IIR Register */
-#define STATUS(x) ((x << 1) & 0x06)
-#define STATUS_P1 0x02
-#define STATUS_P0 0x01
-
-/* UART 0*/
-
-/* DMA Channel */
-#define bfin_read_CH_UART_RX() bfin_read_CH_UART1_RX()
-#define bfin_write_CH_UART_RX(val) bfin_write_CH_UART1_RX(val)
-#define bfin_read_CH_UART_TX() bfin_read_CH_UART1_TX()
-#define bfin_write_CH_UART_TX(val) bfin_write_CH_UART1_TX(val)
-#define CH_UART_RX CH_UART1_RX
-#define CH_UART_TX CH_UART1_TX
-
-/* System Interrupt Controller */
-#define bfin_read_IRQ_UART_RX() bfin_read_IRQ_UART1_RX()
-#define bfin_write_IRQ_UART_RX(val) bfin_write_IRQ_UART1_RX(val)
-#define bfin_read_IRQ_UART_TX() bfin_read_IRQ_UART1_TX()
-#define bfin_write_IRQ_UART_TX(val) bfin_write_IRQ_UART1_TX(val)
-#define bfin_read_IRQ_UART_ERROR() bfin_read_IRQ_UART1_ERROR()
-#define bfin_write_IRQ_UART_ERROR(val) bfin_write_IRQ_UART1_ERROR(val)
-#define IRQ_UART_RX IRQ_UART1_RX
-#define IRQ_UART_TX IRQ_UART1_TX
-#define IRQ_UART_ERROR IRQ_UART1_ERROR
-
-/* MMR Registers*/
-#define bfin_read_UART_THR() bfin_read_UART1_THR()
-#define bfin_write_UART_THR(val) bfin_write_UART1_THR(val)
-#define bfin_read_UART_RBR() bfin_read_UART1_RBR()
-#define bfin_write_UART_RBR(val) bfin_write_UART1_RBR(val)
-#define bfin_read_UART_DLL() bfin_read_UART1_DLL()
-#define bfin_write_UART_DLL(val) bfin_write_UART1_DLL(val)
-#define bfin_read_UART_IER() bfin_read_UART1_IER()
-#define bfin_write_UART_IER(val) bfin_write_UART1_IER(val)
-#define bfin_read_UART_DLH() bfin_read_UART1_DLH()
-#define bfin_write_UART_DLH(val) bfin_write_UART1_DLH(val)
-#define bfin_read_UART_IIR() bfin_read_UART1_IIR()
-#define bfin_write_UART_IIR(val) bfin_write_UART1_IIR(val)
-#define bfin_read_UART_LCR() bfin_read_UART1_LCR()
-#define bfin_write_UART_LCR(val) bfin_write_UART1_LCR(val)
-#define bfin_read_UART_MCR() bfin_read_UART1_MCR()
-#define bfin_write_UART_MCR(val) bfin_write_UART1_MCR(val)
-#define bfin_read_UART_LSR() bfin_read_UART1_LSR()
-#define bfin_write_UART_LSR(val) bfin_write_UART1_LSR(val)
-#define bfin_read_UART_SCR() bfin_read_UART1_SCR()
-#define bfin_write_UART_SCR(val) bfin_write_UART1_SCR(val)
-#define bfin_read_UART_GCTL() bfin_read_UART1_GCTL()
-#define bfin_write_UART_GCTL(val) bfin_write_UART1_GCTL(val)
-
-#define BFIN_UART_THR UART1_THR
-#define BFIN_UART_RBR UART1_RBR
-#define BFIN_UART_DLL UART1_DLL
-#define BFIN_UART_IER UART1_IER
-#define BFIN_UART_DLH UART1_DLH
-#define BFIN_UART_IIR UART1_IIR
-#define BFIN_UART_LCR UART1_LCR
-#define BFIN_UART_MCR UART1_MCR
-#define BFIN_UART_LSR UART1_LSR
-#define BFIN_UART_SCR UART1_SCR
-#define BFIN_UART_GCTL UART1_GCTL
-
#define BFIN_UART_NR_PORTS 4
#define OFFSET_DLL 0x00 /* Divisor Latch (Low-Byte) */
--
1.6.4.2
next prev parent reply other threads:[~2009-09-14 20:17 UTC|newest]
Thread overview: 86+ messages / expand[flat|nested] mbox.gz Atom feed top
2009-09-14 20:07 [PATCH 00/72] Blackfin updates for 2.6.32 Mike Frysinger
2009-09-14 20:07 ` [PATCH 01/72] Blackfin: bf537-stamp: update ADP5588 header name Mike Frysinger
2009-09-14 20:07 ` [PATCH 02/72] Blackfin: bf537-stamp: declare SPI IRQ resources Mike Frysinger
2009-09-14 20:07 ` [PATCH 03/72] Blackfin: bf537-stamp: add resources for AD1938 audio card Mike Frysinger
2009-09-14 20:07 ` [PATCH 04/72] Blackfin: make EVT3->EVT5 lowering more robust wrt IPEND[4] Mike Frysinger
2009-09-14 20:07 ` [PATCH 05/72] Blackfin: checkpatch --file arch/blackfin/kernel/ipipe.c Mike Frysinger
2009-09-14 20:07 ` [PATCH 06/72] Blackfin: fix misnomer of some I-pipe helpers Mike Frysinger
2009-09-14 20:07 ` [PATCH 07/72] Blackfin: export show_stack() to modules Mike Frysinger
2009-09-14 20:07 ` [PATCH 08/72] Blackfin: allow high priority domains to preempt schedule_tail() Mike Frysinger
2009-09-14 20:07 ` [PATCH 09/72] Blackfin: use generic name for EVT14 handler Mike Frysinger
2009-09-14 20:07 ` [PATCH 10/72] Blackfin: reuse evt_evt14 handler to perform irqtail epilogue Mike Frysinger
2009-09-14 20:07 ` [PATCH 11/72] Blackfin: allow EVT5 to preempt irqtail prologue (CONFIG_DEBUG_HWERR) Mike Frysinger
2009-09-14 20:07 ` [PATCH 12/72] Blackfin: document __ipipe_call_irqtail Mike Frysinger
2009-09-14 20:07 ` [PATCH 13/72] Blackfin: sanitize manual control of IPEND[4] Mike Frysinger
2009-09-14 20:07 ` [PATCH 14/72] Blackfin: inline I-pipe bypass code in ret_from_exception Mike Frysinger
2009-09-14 20:07 ` [PATCH 15/72] Blackfin: cleanup traps decode_address() a bit Mike Frysinger
2009-09-14 20:07 ` [PATCH 16/72] Blackfin: convert ptrace to new memory functions Mike Frysinger
2009-09-14 20:07 ` [PATCH 17/72] Blackfin: reject outdated/unused/wrong relocation types Mike Frysinger
2009-09-14 20:07 ` [PATCH 18/72] Blackfin: cleanup printk() usage in module code Mike Frysinger
2009-09-14 20:07 ` [PATCH 19/72] Blackfin: convert malloc()/memset() to zalloc() " Mike Frysinger
2009-09-14 20:07 ` [PATCH 20/72] Blackfin: cleanup module section checking Mike Frysinger
2009-09-14 20:07 ` [PATCH 21/72] Blackfin: fix module reloc handling for all memory regions Mike Frysinger
2009-09-14 20:07 ` [PATCH 22/72] Blackfin: clean up early memory setup code Mike Frysinger
2009-09-14 20:07 ` [PATCH 23/72] Blackfin: rename PCF8574 driver config Mike Frysinger
2009-09-14 20:07 ` [PATCH 24/72] Blackfin: unify duplicated SMP checks in L2 cache kconfig Mike Frysinger
2009-09-14 20:07 ` [PATCH 25/72] Blackfin: push SRAM locks down into related ifdefs Mike Frysinger
2009-09-14 20:07 ` [PATCH 26/72] Blackfin: add support for common FDPIC ptrace requests Mike Frysinger
2009-09-14 20:07 ` [PATCH 27/72] Blackfin: add an early shadow console Mike Frysinger
2009-09-14 20:07 ` [PATCH 28/72] Blackfin: catch hardware errors earlier during booting Mike Frysinger
2009-09-14 20:07 ` [PATCH 29/72] Blackfin: fix BF548 UART0 DMA IRQ translation Mike Frysinger
2009-09-14 20:07 ` [PATCH 30/72] Blackfin: bf538: add bfin_clear_PPI_STATUS() helper Mike Frysinger
2009-09-14 20:07 ` [PATCH 31/72] Blackfin: bf533-stamp: add resources for mmc_spi card Mike Frysinger
2009-09-14 20:07 ` [PATCH 32/72] Blackfin: do not try displaying the end of the stack Mike Frysinger
2009-09-14 20:07 ` [PATCH 33/72] Blackfin: bf537-stamp: update AD714x resources Mike Frysinger
2009-09-14 20:07 ` [PATCH 34/72] Blackfin: clean up duplicate I2C device type definitions Mike Frysinger
2009-09-14 20:07 ` [PATCH 35/72] Blackfin: fix MPU handling of invalid memory accesses Mike Frysinger
2009-09-14 20:07 ` [PATCH 36/72] Blackfin: bf533-stamp: fix typo in SPI frequency for ad1836 codec Mike Frysinger
2009-09-14 20:07 ` [PATCH 37/72] Blackfin: improve double fault debug handling Mike Frysinger
2009-09-14 20:07 ` [PATCH 38/72] Blackfin: bf537-stamp: drop ATA interrupt probe workaround Mike Frysinger
2009-09-14 20:07 ` [PATCH 39/72] Blackfin: convert boards to use platform data with smc91x Mike Frysinger
2009-09-14 20:07 ` Mike Frysinger [this message]
2009-09-14 20:07 ` [PATCH 41/72] Blackfin: cm-bf527/bf537-stamp: fix dm9000 resources Mike Frysinger
2009-09-14 20:07 ` [PATCH 42/72] Blackfin: bf548-ezkit: fix incorrect LCD size parameters Mike Frysinger
2009-09-14 20:07 ` [PATCH 43/72] Blackfin: fix read buffer overflow Mike Frysinger
2009-09-14 20:07 ` [PATCH 44/72] Blackfin: bf538-ezkit: add resources for parallel flash Mike Frysinger
2009-09-14 20:07 ` [PATCH 45/72] Blackfin: update anomaly lists Mike Frysinger
2009-09-14 20:07 ` [PATCH 46/72] Blackfin: bf537-stamp: update ad1836 resources Mike Frysinger
2009-09-14 20:07 ` [PATCH 47/72] Blackfin: cleanup sync handling when enabling/disabling cplbs Mike Frysinger
2009-09-14 20:07 ` [PATCH 48/72] Blackfin: SMP port does not yet support cpu frequency scaling Mike Frysinger
2009-09-14 20:07 ` [PATCH 49/72] Blackfin: fix BF522/BF523 max VCO mixup Mike Frysinger
2009-09-14 20:07 ` [PATCH 50/72] Blackfin: do not trace the exception handler Mike Frysinger
2009-09-14 20:07 ` [PATCH 51/72] Blackfin: drop board resources for dead devices (pbx/ad9960) Mike Frysinger
2009-09-14 20:07 ` [PATCH 52/72] Blackfin: punt dead cache locking code Mike Frysinger
2009-09-14 20:07 ` [PATCH 53/72] Blackfin: delete '-spi' suffix in ad1836/ad1938 driver name Mike Frysinger
2009-09-14 20:07 ` [PATCH 54/72] Blackfin: optimize fixed code handling for the most common case Mike Frysinger
2009-09-14 20:07 ` [PATCH 55/72] Blackfin: handle the core timer interrupt with handle_percpu_irq on SMP Mike Frysinger
2009-09-14 20:08 ` [PATCH 56/72] Blackfin: Fix link errors with binutils 2.19 and GCC 4.3 Mike Frysinger
2009-09-14 20:08 ` [PATCH 57/72] Blackfin: remove useless duplicated assignment in gpio code Mike Frysinger
2009-09-14 20:08 ` [PATCH 58/72] Blackfin: use raw_smp_processor_id() in exception code Mike Frysinger
2009-09-14 20:08 ` [PATCH 59/72] Blackfin: fix spelling in a few comments Mike Frysinger
2009-09-14 20:08 ` [PATCH 60/72] Blackfin: workaround anomaly 05000283 Mike Frysinger
2009-09-14 20:08 ` [PATCH 61/72] Blackfin: add some isram-driver self tests Mike Frysinger
2009-09-14 20:08 ` [PATCH 62/72] Blackfin: bf537-stamp: add adp5588 gpio resources Mike Frysinger
2009-09-14 20:08 ` [PATCH 63/72] Blackfin: fix typo in isram_write() Mike Frysinger
2009-09-14 20:08 ` [PATCH 64/72] Blackfin: fix BF54x SPI CS resources Mike Frysinger
2009-09-14 20:08 ` [PATCH 65/72] Blackfin: use KERN_ALERT in all kgdb_test output Mike Frysinger
2009-09-14 20:08 ` [PATCH 66/72] Blackfin: add ICPLB coverage for async banks Mike Frysinger
2009-09-14 20:08 ` [PATCH 67/72] Blackfin: increase default async timings for parallel flashes Mike Frysinger
2009-09-14 20:08 ` [PATCH 68/72] Blackfin: bf538-ezkit: add SPI IRQ resources Mike Frysinger
2009-09-14 20:08 ` [PATCH 69/72] Blackfin: cm-bf537u: split board from cm-bf537e Mike Frysinger
2009-09-14 20:08 ` [PATCH 70/72] Blackfin: update cm board resources Mike Frysinger
2009-09-14 20:08 ` [PATCH 71/72] Blackfin: update ftrace_push_return_trace() breakage Mike Frysinger
2009-09-14 20:08 ` [PATCH 72/72] Blackfin: swap clocksource ratings for gptimer/cycles Mike Frysinger
2009-09-14 20:50 ` [PATCH 00/72] Blackfin updates for 2.6.32 Daniel Walker
2009-09-14 20:57 ` Mike Frysinger
2009-09-14 21:04 ` Daniel Walker
2009-09-14 21:07 ` Mike Frysinger
2009-09-14 21:21 ` Daniel Walker
2009-09-14 22:17 ` Mike Frysinger
2009-09-14 22:36 ` Daniel Walker
2009-09-16 2:54 ` Mike Frysinger
2009-09-16 2:56 ` Mike Frysinger
2009-09-16 3:06 ` Daniel Walker
2009-09-16 3:21 ` Mike Frysinger
2009-09-16 3:59 ` Daniel Walker
2009-09-16 4:13 ` Mike Frysinger
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