[PATCH 1/6] Staging: iio: addac: adt7316.c : Prefer using BIT macro

[PATCH 1/6] Staging: iio: addac: adt7316.c : Prefer using BIT macro

[Shraddha Barke]

This patch replaces bit shifting on 1 with the BIT(x) macro
as it's extensively used by other function in this driver.

This was done with coccinelle:
@@ int g; @@

-(1 << g)
+BIT(g)

Signed-off-by: Shraddha Barke <shraddha.6596@gmail.com>
---
 drivers/staging/iio/addac/adt7316.c | 14 +++++++-------
 1 file changed, 7 insertions(+), 7 deletions(-)

diff --git a/drivers/staging/iio/addac/adt7316.c b/drivers/staging/iio/addac/adt7316.c
index 5b11b42..a1dd745 100644
--- a/drivers/staging/iio/addac/adt7316.c
+++ b/drivers/staging/iio/addac/adt7316.c
@@ -1756,43 +1756,43 @@ static irqreturn_t adt7316_event_handler(int irq, void *private)
 			stat1 &= 0x1F;
 
 		time = iio_get_time_ns();
-		if (stat1 & (1 << 0))
+		if (stat1 & BIT(0))
 			iio_push_event(indio_dev,
 				       IIO_UNMOD_EVENT_CODE(IIO_TEMP, 0,
 							    IIO_EV_TYPE_THRESH,
 							    IIO_EV_DIR_RISING),
 				       time);
-		if (stat1 & (1 << 1))
+		if (stat1 & BIT(1))
 			iio_push_event(indio_dev,
 				       IIO_UNMOD_EVENT_CODE(IIO_TEMP, 0,
 							    IIO_EV_TYPE_THRESH,
 							    IIO_EV_DIR_FALLING),
 				       time);
-		if (stat1 & (1 << 2))
+		if (stat1 & BIT(2))
 			iio_push_event(indio_dev,
 				       IIO_UNMOD_EVENT_CODE(IIO_TEMP, 1,
 							    IIO_EV_TYPE_THRESH,
 							    IIO_EV_DIR_RISING),
 				       time);
-		if (stat1 & (1 << 3))
+		if (stat1 & BIT(3))
 			iio_push_event(indio_dev,
 				       IIO_UNMOD_EVENT_CODE(IIO_TEMP, 1,
 							    IIO_EV_TYPE_THRESH,
 							    IIO_EV_DIR_FALLING),
 				       time);
-		if (stat1 & (1 << 5))
+		if (stat1 & BIT(5))
 			iio_push_event(indio_dev,
 				       IIO_UNMOD_EVENT_CODE(IIO_VOLTAGE, 1,
 							    IIO_EV_TYPE_THRESH,
 							    IIO_EV_DIR_EITHER),
 				       time);
-		if (stat1 & (1 << 6))
+		if (stat1 & BIT(6))
 			iio_push_event(indio_dev,
 				       IIO_UNMOD_EVENT_CODE(IIO_VOLTAGE, 2,
 							    IIO_EV_TYPE_THRESH,
 							    IIO_EV_DIR_EITHER),
 				       time);
-		if (stat1 & (1 << 7))
+		if (stat1 & BIT(7))
 			iio_push_event(indio_dev,
 				       IIO_UNMOD_EVENT_CODE(IIO_VOLTAGE, 3,
 							    IIO_EV_TYPE_THRESH,
-- 
2.1.4

[PATCH 2/6] Staging: iio: cdc: ad7152.c: Prefer using the BIT macro

[Shraddha Barke]

This patch replaces bit shifting on 1 with the BIT(x) macro
as it's extensively used by other function in this driver.

This was done with coccinelle:
@@ int g; @@

-(1 << g)
+BIT(g)

Signed-off-by: Shraddha Barke <shraddha.6596@gmail.com>
---
 drivers/staging/iio/cdc/ad7152.c | 20 ++++++++++----------
 1 file changed, 10 insertions(+), 10 deletions(-)

diff --git a/drivers/staging/iio/cdc/ad7152.c b/drivers/staging/iio/cdc/ad7152.c
index 87110d9..ba44c0e 100644
--- a/drivers/staging/iio/cdc/ad7152.c
+++ b/drivers/staging/iio/cdc/ad7152.c
@@ -41,30 +41,30 @@
 #define AD7152_REG_CFG2			26
 
 /* Status Register Bit Designations (AD7152_REG_STATUS) */
-#define AD7152_STATUS_RDY1		(1 << 0)
-#define AD7152_STATUS_RDY2		(1 << 1)
-#define AD7152_STATUS_C1C2		(1 << 2)
-#define AD7152_STATUS_PWDN		(1 << 7)
+#define AD7152_STATUS_RDY1		BIT(0)
+#define AD7152_STATUS_RDY2		BIT(1)
+#define AD7152_STATUS_C1C2		BIT(2)
+#define AD7152_STATUS_PWDN		BIT(7)
 
 /* Setup Register Bit Designations (AD7152_REG_CHx_SETUP) */
-#define AD7152_SETUP_CAPDIFF		(1 << 5)
+#define AD7152_SETUP_CAPDIFF		BIT(5)
 #define AD7152_SETUP_RANGE_2pF		(0 << 6)
-#define AD7152_SETUP_RANGE_0_5pF	(1 << 6)
+#define AD7152_SETUP_RANGE_0_5pF	BIT(6)
 #define AD7152_SETUP_RANGE_1pF		(2 << 6)
 #define AD7152_SETUP_RANGE_4pF		(3 << 6)
 #define AD7152_SETUP_RANGE(x)		((x) << 6)
 
 /* Config Register Bit Designations (AD7152_REG_CFG) */
-#define AD7152_CONF_CH2EN		(1 << 3)
-#define AD7152_CONF_CH1EN		(1 << 4)
+#define AD7152_CONF_CH2EN		BIT(3)
+#define AD7152_CONF_CH1EN		BIT(4)
 #define AD7152_CONF_MODE_IDLE		(0 << 0)
-#define AD7152_CONF_MODE_CONT_CONV	(1 << 0)
+#define AD7152_CONF_MODE_CONT_CONV	BIT(0)
 #define AD7152_CONF_MODE_SINGLE_CONV	(2 << 0)
 #define AD7152_CONF_MODE_OFFS_CAL	(5 << 0)
 #define AD7152_CONF_MODE_GAIN_CAL	(6 << 0)
 
 /* Capdac Register Bit Designations (AD7152_REG_CAPDAC_XXX) */
-#define AD7152_CAPDAC_DACEN		(1 << 7)
+#define AD7152_CAPDAC_DACEN		BIT(7)
 #define AD7152_CAPDAC_DACP(x)		((x) & 0x1F)
 
 /* CFG2 Register Bit Designations (AD7152_REG_CFG2) */
-- 
2.1.4

Re: [PATCH 2/6] Staging: iio: cdc: ad7152.c: Prefer using the BIT macro

[Julia Lawall]

On Thu, 10 Sep 2015, Shraddha Barke wrote:

> This patch replaces bit shifting on 1 with the BIT(x) macro
> as it's extensively used by other function in this driver.

Don't use BIT in the mixed cases.

julia

> 
> This was done with coccinelle:
> @@ int g; @@
> 
> -(1 << g)
> +BIT(g)
> 
> Signed-off-by: Shraddha Barke <shraddha.6596@gmail.com>
> ---
>  drivers/staging/iio/cdc/ad7152.c | 20 ++++++++++----------
>  1 file changed, 10 insertions(+), 10 deletions(-)
> 
> diff --git a/drivers/staging/iio/cdc/ad7152.c b/drivers/staging/iio/cdc/ad7152.c
> index 87110d9..ba44c0e 100644
> --- a/drivers/staging/iio/cdc/ad7152.c
> +++ b/drivers/staging/iio/cdc/ad7152.c
> @@ -41,30 +41,30 @@
>  #define AD7152_REG_CFG2			26
>  
>  /* Status Register Bit Designations (AD7152_REG_STATUS) */
> -#define AD7152_STATUS_RDY1		(1 << 0)
> -#define AD7152_STATUS_RDY2		(1 << 1)
> -#define AD7152_STATUS_C1C2		(1 << 2)
> -#define AD7152_STATUS_PWDN		(1 << 7)
> +#define AD7152_STATUS_RDY1		BIT(0)
> +#define AD7152_STATUS_RDY2		BIT(1)
> +#define AD7152_STATUS_C1C2		BIT(2)
> +#define AD7152_STATUS_PWDN		BIT(7)
>  
>  /* Setup Register Bit Designations (AD7152_REG_CHx_SETUP) */
> -#define AD7152_SETUP_CAPDIFF		(1 << 5)
> +#define AD7152_SETUP_CAPDIFF		BIT(5)
>  #define AD7152_SETUP_RANGE_2pF		(0 << 6)
> -#define AD7152_SETUP_RANGE_0_5pF	(1 << 6)
> +#define AD7152_SETUP_RANGE_0_5pF	BIT(6)
>  #define AD7152_SETUP_RANGE_1pF		(2 << 6)
>  #define AD7152_SETUP_RANGE_4pF		(3 << 6)
>  #define AD7152_SETUP_RANGE(x)		((x) << 6)
>  
>  /* Config Register Bit Designations (AD7152_REG_CFG) */
> -#define AD7152_CONF_CH2EN		(1 << 3)
> -#define AD7152_CONF_CH1EN		(1 << 4)
> +#define AD7152_CONF_CH2EN		BIT(3)
> +#define AD7152_CONF_CH1EN		BIT(4)
>  #define AD7152_CONF_MODE_IDLE		(0 << 0)
> -#define AD7152_CONF_MODE_CONT_CONV	(1 << 0)
> +#define AD7152_CONF_MODE_CONT_CONV	BIT(0)
>  #define AD7152_CONF_MODE_SINGLE_CONV	(2 << 0)
>  #define AD7152_CONF_MODE_OFFS_CAL	(5 << 0)
>  #define AD7152_CONF_MODE_GAIN_CAL	(6 << 0)
>  
>  /* Capdac Register Bit Designations (AD7152_REG_CAPDAC_XXX) */
> -#define AD7152_CAPDAC_DACEN		(1 << 7)
> +#define AD7152_CAPDAC_DACEN		BIT(7)
>  #define AD7152_CAPDAC_DACP(x)		((x) & 0x1F)
>  
>  /* CFG2 Register Bit Designations (AD7152_REG_CFG2) */
> -- 
> 2.1.4
> 
> 

[PATCH 3/6] Staging: iio: meter: Prefer using the BIT macro

[Shraddha Barke]

This patch replaces bit shifting on 1 with the BIT(x) macro
as it's extensively used by other function in this driver.

This was done with coccinelle:
@@ int g; @@

-(1 << g)
+BIT(g)

Signed-off-by: Shraddha Barke <shraddha.6596@gmail.com>
---
 drivers/staging/iio/meter/ade7753.c      | 8 ++++----
 drivers/staging/iio/meter/ade7754.c      | 6 +++---
 drivers/staging/iio/meter/ade7758_core.c | 6 +++---
 drivers/staging/iio/meter/ade7759.c      | 8 ++++----
 drivers/staging/iio/meter/ade7854.c      | 6 +++---
 5 files changed, 17 insertions(+), 17 deletions(-)

diff --git a/drivers/staging/iio/meter/ade7753.c b/drivers/staging/iio/meter/ade7753.c
index ffc7f0d..3d2e50c 100644
--- a/drivers/staging/iio/meter/ade7753.c
+++ b/drivers/staging/iio/meter/ade7753.c
@@ -219,7 +219,7 @@ static int ade7753_reset(struct device *dev)
 	u16 val;
 
 	ade7753_spi_read_reg_16(dev, ADE7753_MODE, &val);
-	val |= 1 << 6; /* Software Chip Reset */
+	val |= BIT(6); /* Software Chip Reset */
 
 	return ade7753_spi_write_reg_16(dev, ADE7753_MODE, val);
 }
@@ -328,10 +328,10 @@ static int ade7753_set_irq(struct device *dev, bool enable)
 		goto error_ret;
 
 	if (enable)
-		irqen |= 1 << 3; /* Enables an interrupt when a data is
+		irqen |= BIT(3); /* Enables an interrupt when a data is
 				    present in the waveform register */
 	else
-		irqen &= ~(1 << 3);
+		irqen &= ~BIT(3);
 
 	ret = ade7753_spi_write_reg_8(dev, ADE7753_IRQEN, irqen);
 
@@ -345,7 +345,7 @@ static int ade7753_stop_device(struct device *dev)
 	u16 val;
 
 	ade7753_spi_read_reg_16(dev, ADE7753_MODE, &val);
-	val |= 1 << 4;  /* AD converters can be turned off */
+	val |= BIT(4);  /* AD converters can be turned off */
 
 	return ade7753_spi_write_reg_16(dev, ADE7753_MODE, val);
 }
diff --git a/drivers/staging/iio/meter/ade7754.c b/drivers/staging/iio/meter/ade7754.c
index f12b2e5..8552c76 100644
--- a/drivers/staging/iio/meter/ade7754.c
+++ b/drivers/staging/iio/meter/ade7754.c
@@ -223,7 +223,7 @@ static int ade7754_reset(struct device *dev)
 	if (ret < 0)
 		return ret;
 
-	val |= 1 << 6; /* Software Chip Reset */
+	val |= BIT(6); /* Software Chip Reset */
 	return ade7754_spi_write_reg_8(dev, ADE7754_OPMODE, val);
 }
 
@@ -350,10 +350,10 @@ static int ade7754_set_irq(struct device *dev, bool enable)
 		goto error_ret;
 
 	if (enable)
-		irqen |= 1 << 14; /* Enables an interrupt when a data is
+		irqen |= BIT(14); /* Enables an interrupt when a data is
 				     present in the waveform register */
 	else
-		irqen &= ~(1 << 14);
+		irqen &= ~BIT(14);
 
 	ret = ade7754_spi_write_reg_16(dev, ADE7754_IRQEN, irqen);
 	if (ret)
diff --git a/drivers/staging/iio/meter/ade7758_core.c b/drivers/staging/iio/meter/ade7758_core.c
index 77141ae..3883808 100644
--- a/drivers/staging/iio/meter/ade7758_core.c
+++ b/drivers/staging/iio/meter/ade7758_core.c
@@ -308,7 +308,7 @@ static int ade7758_reset(struct device *dev)
 		dev_err(dev, "Failed to read opmode reg\n");
 		return ret;
 	}
-	val |= 1 << 6; /* Software Chip Reset */
+	val |= BIT(6); /* Software Chip Reset */
 	ret = ade7758_spi_write_reg_8(dev, ADE7758_OPMODE, val);
 	if (ret < 0)
 		dev_err(dev, "Failed to write opmode reg\n");
@@ -426,10 +426,10 @@ int ade7758_set_irq(struct device *dev, bool enable)
 		goto error_ret;
 
 	if (enable)
-		irqen |= 1 << 16; /* Enables an interrupt when a data is
+		irqen |= BIT(16); /* Enables an interrupt when a data is
 				     present in the waveform register */
 	else
-		irqen &= ~(1 << 16);
+		irqen &= ~BIT(16);
 
 	ret = ade7758_spi_write_reg_24(dev, ADE7758_MASK, irqen);
 	if (ret)
diff --git a/drivers/staging/iio/meter/ade7759.c b/drivers/staging/iio/meter/ade7759.c
index dbceda1..23e7392 100644
--- a/drivers/staging/iio/meter/ade7759.c
+++ b/drivers/staging/iio/meter/ade7759.c
@@ -224,7 +224,7 @@ static int ade7759_reset(struct device *dev)
 	if (ret < 0)
 		return ret;
 
-	val |= 1 << 6; /* Software Chip Reset */
+	val |= BIT(6); /* Software Chip Reset */
 	return ade7759_spi_write_reg_16(dev,
 			ADE7759_MODE,
 			val);
@@ -288,10 +288,10 @@ static int ade7759_set_irq(struct device *dev, bool enable)
 		goto error_ret;
 
 	if (enable)
-		irqen |= 1 << 3; /* Enables an interrupt when a data is
+		irqen |= BIT(3); /* Enables an interrupt when a data is
 				    present in the waveform register */
 	else
-		irqen &= ~(1 << 3);
+		irqen &= ~BIT(3);
 
 	ret = ade7759_spi_write_reg_8(dev, ADE7759_IRQEN, irqen);
 
@@ -314,7 +314,7 @@ static int ade7759_stop_device(struct device *dev)
 		return ret;
 	}
 
-	val |= 1 << 4;  /* AD converters can be turned off */
+	val |= BIT(4);  /* AD converters can be turned off */
 
 	return ade7759_spi_write_reg_16(dev, ADE7759_MODE, val);
 }
diff --git a/drivers/staging/iio/meter/ade7854.c b/drivers/staging/iio/meter/ade7854.c
index d620bbd..a838835 100644
--- a/drivers/staging/iio/meter/ade7854.c
+++ b/drivers/staging/iio/meter/ade7854.c
@@ -181,7 +181,7 @@ static int ade7854_reset(struct device *dev)
 	u16 val;
 
 	st->read_reg_16(dev, ADE7854_CONFIG, &val);
-	val |= 1 << 7; /* Software Chip Reset */
+	val |= BIT(7); /* Software Chip Reset */
 
 	return st->write_reg_16(dev, ADE7854_CONFIG, val);
 }
@@ -420,10 +420,10 @@ static int ade7854_set_irq(struct device *dev, bool enable)
 		goto error_ret;
 
 	if (enable)
-		irqen |= 1 << 17; /* 1: interrupt enabled when all periodical
+		irqen |= BIT(17); /* 1: interrupt enabled when all periodical
 				     (at 8 kHz rate) DSP computations finish. */
 	else
-		irqen &= ~(1 << 17);
+		irqen &= ~BIT(17);
 
 	ret = st->write_reg_32(dev, ADE7854_MASK0, irqen);
 	if (ret)
-- 
2.1.4

[PATCH 4/6] Staging: iio: cdc: ad7746.c: Prefer using the BIT macro

[Shraddha Barke]

This patch replaces bit shifting on 1 with the BIT(x) macro
as it's extensively used by other function in this driver.

This was done with coccinelle:
@@ int g; @@

-(1 << g)
+BIT(g)

Signed-off-by: Shraddha Barke <shraddha.6596@gmail.com>
---
 drivers/staging/iio/cdc/ad7746.c | 42 ++++++++++++++++++++--------------------
 1 file changed, 21 insertions(+), 21 deletions(-)

diff --git a/drivers/staging/iio/cdc/ad7746.c b/drivers/staging/iio/cdc/ad7746.c
index e6e9eaa..e17d4e1 100644
--- a/drivers/staging/iio/cdc/ad7746.c
+++ b/drivers/staging/iio/cdc/ad7746.c
@@ -46,48 +46,48 @@
 #define AD7746_REG_VOLT_GAINL		18
 
 /* Status Register Bit Designations (AD7746_REG_STATUS) */
-#define AD7746_STATUS_EXCERR		(1 << 3)
-#define AD7746_STATUS_RDY		(1 << 2)
-#define AD7746_STATUS_RDYVT		(1 << 1)
-#define AD7746_STATUS_RDYCAP		(1 << 0)
+#define AD7746_STATUS_EXCERR		BIT(3)
+#define AD7746_STATUS_RDY		BIT(2)
+#define AD7746_STATUS_RDYVT		BIT(1)
+#define AD7746_STATUS_RDYCAP		BIT(0)
 
 /* Capacitive Channel Setup Register Bit Designations (AD7746_REG_CAP_SETUP) */
-#define AD7746_CAPSETUP_CAPEN		(1 << 7)
-#define AD7746_CAPSETUP_CIN2		(1 << 6) /* AD7746 only */
-#define AD7746_CAPSETUP_CAPDIFF		(1 << 5)
-#define AD7746_CAPSETUP_CACHOP		(1 << 0)
+#define AD7746_CAPSETUP_CAPEN		BIT(7)
+#define AD7746_CAPSETUP_CIN2		BIT(6) /* AD7746 only */
+#define AD7746_CAPSETUP_CAPDIFF		BIT(5)
+#define AD7746_CAPSETUP_CACHOP		BIT(0)
 
 /* Voltage/Temperature Setup Register Bit Designations (AD7746_REG_VT_SETUP) */
-#define AD7746_VTSETUP_VTEN		(1 << 7)
+#define AD7746_VTSETUP_VTEN		BIT(7)
 #define AD7746_VTSETUP_VTMD_INT_TEMP	(0 << 5)
-#define AD7746_VTSETUP_VTMD_EXT_TEMP	(1 << 5)
+#define AD7746_VTSETUP_VTMD_EXT_TEMP	BIT(5)
 #define AD7746_VTSETUP_VTMD_VDD_MON	(2 << 5)
 #define AD7746_VTSETUP_VTMD_EXT_VIN	(3 << 5)
-#define AD7746_VTSETUP_EXTREF		(1 << 4)
-#define AD7746_VTSETUP_VTSHORT		(1 << 1)
-#define AD7746_VTSETUP_VTCHOP		(1 << 0)
+#define AD7746_VTSETUP_EXTREF		BIT(4)
+#define AD7746_VTSETUP_VTSHORT		BIT(1)
+#define AD7746_VTSETUP_VTCHOP		BIT(0)
 
 /* Excitation Setup Register Bit Designations (AD7746_REG_EXC_SETUP) */
-#define AD7746_EXCSETUP_CLKCTRL		(1 << 7)
-#define AD7746_EXCSETUP_EXCON		(1 << 6)
-#define AD7746_EXCSETUP_EXCB		(1 << 5)
-#define AD7746_EXCSETUP_NEXCB		(1 << 4)
-#define AD7746_EXCSETUP_EXCA		(1 << 3)
-#define AD7746_EXCSETUP_NEXCA		(1 << 2)
+#define AD7746_EXCSETUP_CLKCTRL		BIT(7)
+#define AD7746_EXCSETUP_EXCON		BIT(6)
+#define AD7746_EXCSETUP_EXCB		BIT(5)
+#define AD7746_EXCSETUP_NEXCB		BIT(4)
+#define AD7746_EXCSETUP_EXCA		BIT(3)
+#define AD7746_EXCSETUP_NEXCA		BIT(2)
 #define AD7746_EXCSETUP_EXCLVL(x)	(((x) & 0x3) << 0)
 
 /* Config Register Bit Designations (AD7746_REG_CFG) */
 #define AD7746_CONF_VTFS(x)		((x) << 6)
 #define AD7746_CONF_CAPFS(x)		((x) << 3)
 #define AD7746_CONF_MODE_IDLE		(0 << 0)
-#define AD7746_CONF_MODE_CONT_CONV	(1 << 0)
+#define AD7746_CONF_MODE_CONT_CONV	BIT(0)
 #define AD7746_CONF_MODE_SINGLE_CONV	(2 << 0)
 #define AD7746_CONF_MODE_PWRDN		(3 << 0)
 #define AD7746_CONF_MODE_OFFS_CAL	(5 << 0)
 #define AD7746_CONF_MODE_GAIN_CAL	(6 << 0)
 
 /* CAPDAC Register Bit Designations (AD7746_REG_CAPDACx) */
-#define AD7746_CAPDAC_DACEN		(1 << 7)
+#define AD7746_CAPDAC_DACEN		BIT(7)
 #define AD7746_CAPDAC_DACP(x)		((x) & 0x7F)
 
 /*
-- 
2.1.4

Re: [PATCH 4/6] Staging: iio: cdc: ad7746.c: Prefer using the BIT macro

[Julia Lawall]

On Thu, 10 Sep 2015, Shraddha Barke wrote:

> This patch replaces bit shifting on 1 with the BIT(x) macro
> as it's extensively used by other function in this driver.
> 
> This was done with coccinelle:
> @@ int g; @@
> 
> -(1 << g)
> +BIT(g)
> 
> Signed-off-by: Shraddha Barke <shraddha.6596@gmail.com>
> ---
>  drivers/staging/iio/cdc/ad7746.c | 42 ++++++++++++++++++++--------------------
>  1 file changed, 21 insertions(+), 21 deletions(-)
> 
> diff --git a/drivers/staging/iio/cdc/ad7746.c b/drivers/staging/iio/cdc/ad7746.c
> index e6e9eaa..e17d4e1 100644
> --- a/drivers/staging/iio/cdc/ad7746.c
> +++ b/drivers/staging/iio/cdc/ad7746.c
> @@ -46,48 +46,48 @@
>  #define AD7746_REG_VOLT_GAINL		18
>  
>  /* Status Register Bit Designations (AD7746_REG_STATUS) */
> -#define AD7746_STATUS_EXCERR		(1 << 3)
> -#define AD7746_STATUS_RDY		(1 << 2)
> -#define AD7746_STATUS_RDYVT		(1 << 1)
> -#define AD7746_STATUS_RDYCAP		(1 << 0)
> +#define AD7746_STATUS_EXCERR		BIT(3)
> +#define AD7746_STATUS_RDY		BIT(2)
> +#define AD7746_STATUS_RDYVT		BIT(1)
> +#define AD7746_STATUS_RDYCAP		BIT(0)
>  
>  /* Capacitive Channel Setup Register Bit Designations (AD7746_REG_CAP_SETUP) */
> -#define AD7746_CAPSETUP_CAPEN		(1 << 7)
> -#define AD7746_CAPSETUP_CIN2		(1 << 6) /* AD7746 only */
> -#define AD7746_CAPSETUP_CAPDIFF		(1 << 5)
> -#define AD7746_CAPSETUP_CACHOP		(1 << 0)
> +#define AD7746_CAPSETUP_CAPEN		BIT(7)
> +#define AD7746_CAPSETUP_CIN2		BIT(6) /* AD7746 only */
> +#define AD7746_CAPSETUP_CAPDIFF		BIT(5)
> +#define AD7746_CAPSETUP_CACHOP		BIT(0)

You could harmonize the indentation in this bunch.

>  /* Voltage/Temperature Setup Register Bit Designations (AD7746_REG_VT_SETUP) */
> -#define AD7746_VTSETUP_VTEN		(1 << 7)
> +#define AD7746_VTSETUP_VTEN		BIT(7)
>  #define AD7746_VTSETUP_VTMD_INT_TEMP	(0 << 5)
> -#define AD7746_VTSETUP_VTMD_EXT_TEMP	(1 << 5)
> +#define AD7746_VTSETUP_VTMD_EXT_TEMP	BIT(5)
>  #define AD7746_VTSETUP_VTMD_VDD_MON	(2 << 5)
>  #define AD7746_VTSETUP_VTMD_EXT_VIN	(3 << 5)
> -#define AD7746_VTSETUP_EXTREF		(1 << 4)
> -#define AD7746_VTSETUP_VTSHORT		(1 << 1)
> -#define AD7746_VTSETUP_VTCHOP		(1 << 0)
> +#define AD7746_VTSETUP_EXTREF		BIT(4)
> +#define AD7746_VTSETUP_VTSHORT		BIT(1)
> +#define AD7746_VTSETUP_VTCHOP		BIT(0)

It doesn't look like a good idea to use BIT here, because it is mixed with 
other things.

>  /* Excitation Setup Register Bit Designations (AD7746_REG_EXC_SETUP) */
> -#define AD7746_EXCSETUP_CLKCTRL		(1 << 7)
> -#define AD7746_EXCSETUP_EXCON		(1 << 6)
> -#define AD7746_EXCSETUP_EXCB		(1 << 5)
> -#define AD7746_EXCSETUP_NEXCB		(1 << 4)
> -#define AD7746_EXCSETUP_EXCA		(1 << 3)
> -#define AD7746_EXCSETUP_NEXCA		(1 << 2)
> +#define AD7746_EXCSETUP_CLKCTRL		BIT(7)
> +#define AD7746_EXCSETUP_EXCON		BIT(6)
> +#define AD7746_EXCSETUP_EXCB		BIT(5)
> +#define AD7746_EXCSETUP_NEXCB		BIT(4)
> +#define AD7746_EXCSETUP_EXCA		BIT(3)
> +#define AD7746_EXCSETUP_NEXCA		BIT(2)
>  #define AD7746_EXCSETUP_EXCLVL(x)	(((x) & 0x3) << 0)

Fix the alignment.

>  /* Config Register Bit Designations (AD7746_REG_CFG) */
>  #define AD7746_CONF_VTFS(x)		((x) << 6)
>  #define AD7746_CONF_CAPFS(x)		((x) << 3)
>  #define AD7746_CONF_MODE_IDLE		(0 << 0)
> -#define AD7746_CONF_MODE_CONT_CONV	(1 << 0)
> +#define AD7746_CONF_MODE_CONT_CONV	BIT(0)
>  #define AD7746_CONF_MODE_SINGLE_CONV	(2 << 0)
>  #define AD7746_CONF_MODE_PWRDN		(3 << 0)
>  #define AD7746_CONF_MODE_OFFS_CAL	(5 << 0)
>  #define AD7746_CONF_MODE_GAIN_CAL	(6 << 0)

Don't use BIT in this case.

julia

>  /* CAPDAC Register Bit Designations (AD7746_REG_CAPDACx) */
> -#define AD7746_CAPDAC_DACEN		(1 << 7)
> +#define AD7746_CAPDAC_DACEN		BIT(7)
>  #define AD7746_CAPDAC_DACP(x)		((x) & 0x7F)
>  
>  /*
> -- 
> 2.1.4
> 
> 

[PATCH 5/6] Staging: iio: impedance-analyzer: Prefer using the BIT macro

[Shraddha Barke]

This patch replaces bit shifting on 1 with the BIT(x) macro
as it's extensively used by other function in this driver.

This was done with coccinelle:
@@ int g; @@

-(1 << g)
+BIT(g)

Signed-off-by: Shraddha Barke <shraddha.6596@gmail.com>
---
 drivers/staging/iio/impedance-analyzer/ad5933.c | 22 +++++++++++-----------
 1 file changed, 11 insertions(+), 11 deletions(-)

diff --git a/drivers/staging/iio/impedance-analyzer/ad5933.c b/drivers/staging/iio/impedance-analyzer/ad5933.c
index c18109c..48acad0 100644
--- a/drivers/staging/iio/impedance-analyzer/ad5933.c
+++ b/drivers/staging/iio/impedance-analyzer/ad5933.c
@@ -39,7 +39,7 @@
 #define AD5933_REG_IMAG_DATA		0x96	/* R, 2 bytes*/
 
 /* AD5933_REG_CONTROL_HB Bits */
-#define AD5933_CTRL_INIT_START_FREQ	(0x1 << 4)
+#define AD5933_CTRL_INIT_START_FREQ	BIT(4)
 #define AD5933_CTRL_START_SWEEP		(0x2 << 4)
 #define AD5933_CTRL_INC_FREQ		(0x3 << 4)
 #define AD5933_CTRL_REPEAT_FREQ		(0x4 << 4)
@@ -48,23 +48,23 @@
 #define AD5933_CTRL_STANDBY		(0xB << 4)
 
 #define AD5933_CTRL_RANGE_2000mVpp	(0x0 << 1)
-#define AD5933_CTRL_RANGE_200mVpp	(0x1 << 1)
+#define AD5933_CTRL_RANGE_200mVpp	BIT(1)
 #define AD5933_CTRL_RANGE_400mVpp	(0x2 << 1)
 #define AD5933_CTRL_RANGE_1000mVpp	(0x3 << 1)
 #define AD5933_CTRL_RANGE(x)		((x) << 1)
 
-#define AD5933_CTRL_PGA_GAIN_1		(0x1 << 0)
+#define AD5933_CTRL_PGA_GAIN_1		BIT(0)
 #define AD5933_CTRL_PGA_GAIN_5		(0x0 << 0)
 
 /* AD5933_REG_CONTROL_LB Bits */
-#define AD5933_CTRL_RESET		(0x1 << 4)
+#define AD5933_CTRL_RESET		BIT(4)
 #define AD5933_CTRL_INT_SYSCLK		(0x0 << 3)
-#define AD5933_CTRL_EXT_SYSCLK		(0x1 << 3)
+#define AD5933_CTRL_EXT_SYSCLK		BIT(3)
 
 /* AD5933_REG_STATUS Bits */
-#define AD5933_STAT_TEMP_VALID		(0x1 << 0)
-#define AD5933_STAT_DATA_VALID		(0x1 << 1)
-#define AD5933_STAT_SWEEP_DONE		(0x1 << 2)
+#define AD5933_STAT_TEMP_VALID		BIT(0)
+#define AD5933_STAT_DATA_VALID		BIT(1)
+#define AD5933_STAT_SWEEP_DONE		BIT(2)
 
 /* I2C Block Commands */
 #define AD5933_I2C_BLOCK_WRITE		0xA0
@@ -222,7 +222,7 @@ static int ad5933_set_freq(struct ad5933_state *st,
 		u8 d8[4];
 	} dat;
 
-	freqreg = (u64) freq * (u64) (1 << 27);
+	freqreg = (u64) freq * (u64) BIT(27);
 	do_div(freqreg, st->mclk_hz / 4);
 
 	switch (reg) {
@@ -308,7 +308,7 @@ static ssize_t ad5933_show_frequency(struct device *dev,
 	freqreg = be32_to_cpu(dat.d32) & 0xFFFFFF;
 
 	freqreg = (u64) freqreg * (u64) (st->mclk_hz / 4);
-	do_div(freqreg, 1 << 27);
+	do_div(freqreg, BIT(27));
 
 	return sprintf(buf, "%d\n", (int) freqreg);
 }
@@ -437,7 +437,7 @@ static ssize_t ad5933_store(struct device *dev,
 
 		/* 2x, 4x handling, see datasheet */
 		if (val > 511)
-			val = (val >> 1) | (1 << 9);
+			val = (val >> 1) | BIT(9);
 		else if (val > 1022)
 			val = (val >> 2) | (3 << 9);
 
-- 
2.1.4

Re: [PATCH 5/6] Staging: iio: impedance-analyzer: Prefer using the BIT macro

[Julia Lawall]

On Thu, 10 Sep 2015, Shraddha Barke wrote:

> This patch replaces bit shifting on 1 with the BIT(x) macro
> as it's extensively used by other function in this driver.
> 
> This was done with coccinelle:
> @@ int g; @@
> 
> -(1 << g)
> +BIT(g)

This doesn't look like a good idea here, since there is a mixture of uses 
of BIT and other things for similar values.

julia

> Signed-off-by: Shraddha Barke <shraddha.6596@gmail.com>
> ---
>  drivers/staging/iio/impedance-analyzer/ad5933.c | 22 +++++++++++-----------
>  1 file changed, 11 insertions(+), 11 deletions(-)
> 
> diff --git a/drivers/staging/iio/impedance-analyzer/ad5933.c b/drivers/staging/iio/impedance-analyzer/ad5933.c
> index c18109c..48acad0 100644
> --- a/drivers/staging/iio/impedance-analyzer/ad5933.c
> +++ b/drivers/staging/iio/impedance-analyzer/ad5933.c
> @@ -39,7 +39,7 @@
>  #define AD5933_REG_IMAG_DATA		0x96	/* R, 2 bytes*/
>  
>  /* AD5933_REG_CONTROL_HB Bits */
> -#define AD5933_CTRL_INIT_START_FREQ	(0x1 << 4)
> +#define AD5933_CTRL_INIT_START_FREQ	BIT(4)
>  #define AD5933_CTRL_START_SWEEP		(0x2 << 4)
>  #define AD5933_CTRL_INC_FREQ		(0x3 << 4)
>  #define AD5933_CTRL_REPEAT_FREQ		(0x4 << 4)
> @@ -48,23 +48,23 @@
>  #define AD5933_CTRL_STANDBY		(0xB << 4)
>  
>  #define AD5933_CTRL_RANGE_2000mVpp	(0x0 << 1)
> -#define AD5933_CTRL_RANGE_200mVpp	(0x1 << 1)
> +#define AD5933_CTRL_RANGE_200mVpp	BIT(1)
>  #define AD5933_CTRL_RANGE_400mVpp	(0x2 << 1)
>  #define AD5933_CTRL_RANGE_1000mVpp	(0x3 << 1)
>  #define AD5933_CTRL_RANGE(x)		((x) << 1)
>  
> -#define AD5933_CTRL_PGA_GAIN_1		(0x1 << 0)
> +#define AD5933_CTRL_PGA_GAIN_1		BIT(0)
>  #define AD5933_CTRL_PGA_GAIN_5		(0x0 << 0)
>  
>  /* AD5933_REG_CONTROL_LB Bits */
> -#define AD5933_CTRL_RESET		(0x1 << 4)
> +#define AD5933_CTRL_RESET		BIT(4)
>  #define AD5933_CTRL_INT_SYSCLK		(0x0 << 3)
> -#define AD5933_CTRL_EXT_SYSCLK		(0x1 << 3)
> +#define AD5933_CTRL_EXT_SYSCLK		BIT(3)
>  
>  /* AD5933_REG_STATUS Bits */
> -#define AD5933_STAT_TEMP_VALID		(0x1 << 0)
> -#define AD5933_STAT_DATA_VALID		(0x1 << 1)
> -#define AD5933_STAT_SWEEP_DONE		(0x1 << 2)
> +#define AD5933_STAT_TEMP_VALID		BIT(0)
> +#define AD5933_STAT_DATA_VALID		BIT(1)
> +#define AD5933_STAT_SWEEP_DONE		BIT(2)
>  
>  /* I2C Block Commands */
>  #define AD5933_I2C_BLOCK_WRITE		0xA0
> @@ -222,7 +222,7 @@ static int ad5933_set_freq(struct ad5933_state *st,
>  		u8 d8[4];
>  	} dat;
>  
> -	freqreg = (u64) freq * (u64) (1 << 27);
> +	freqreg = (u64) freq * (u64) BIT(27);
>  	do_div(freqreg, st->mclk_hz / 4);
>  
>  	switch (reg) {
> @@ -308,7 +308,7 @@ static ssize_t ad5933_show_frequency(struct device *dev,
>  	freqreg = be32_to_cpu(dat.d32) & 0xFFFFFF;
>  
>  	freqreg = (u64) freqreg * (u64) (st->mclk_hz / 4);
> -	do_div(freqreg, 1 << 27);
> +	do_div(freqreg, BIT(27));
>  
>  	return sprintf(buf, "%d\n", (int) freqreg);
>  }
> @@ -437,7 +437,7 @@ static ssize_t ad5933_store(struct device *dev,
>  
>  		/* 2x, 4x handling, see datasheet */
>  		if (val > 511)
> -			val = (val >> 1) | (1 << 9);
> +			val = (val >> 1) | BIT(9);
>  		else if (val > 1022)
>  			val = (val >> 2) | (3 << 9);
>  
> -- 
> 2.1.4
> 
> 

Re: [PATCH 5/6] Staging: iio: impedance-analyzer: Prefer using the BIT macro

[Shraddha Barke]

On Thu, 10 Sep 2015, Julia Lawall wrote:

> On Thu, 10 Sep 2015, Shraddha Barke wrote:
>
>> This patch replaces bit shifting on 1 with the BIT(x) macro
>> as it's extensively used by other function in this driver.
>>
>> This was done with coccinelle:
>> @@ int g; @@
>>
>> -(1 << g)
>> +BIT(g)
>
> This doesn't look like a good idea here, since there is a mixture of uses
> of BIT and other things for similar values.
>
Yes I'll send a new patch series dropping the cases of mixed uses of BIT.
I hope Greg will ignore these patches.
I found some instances of this issue in lustre file system.Should I go
ahead with fixing those too?

Thanks,

Shraddha


> julia
>
>> Signed-off-by: Shraddha Barke <shraddha.6596@gmail.com>
>> ---
>>  drivers/staging/iio/impedance-analyzer/ad5933.c | 22 +++++++++++-----------
>>  1 file changed, 11 insertions(+), 11 deletions(-)
>>
>> diff --git a/drivers/staging/iio/impedance-analyzer/ad5933.c b/drivers/staging/iio/impedance-analyzer/ad5933.c
>> index c18109c..48acad0 100644
>> --- a/drivers/staging/iio/impedance-analyzer/ad5933.c
>> +++ b/drivers/staging/iio/impedance-analyzer/ad5933.c
>> @@ -39,7 +39,7 @@
>>  #define AD5933_REG_IMAG_DATA		0x96	/* R, 2 bytes*/
>>
>>  /* AD5933_REG_CONTROL_HB Bits */
>> -#define AD5933_CTRL_INIT_START_FREQ	(0x1 << 4)
>> +#define AD5933_CTRL_INIT_START_FREQ	BIT(4)
>>  #define AD5933_CTRL_START_SWEEP		(0x2 << 4)
>>  #define AD5933_CTRL_INC_FREQ		(0x3 << 4)
>>  #define AD5933_CTRL_REPEAT_FREQ		(0x4 << 4)
>> @@ -48,23 +48,23 @@
>>  #define AD5933_CTRL_STANDBY		(0xB << 4)
>>
>>  #define AD5933_CTRL_RANGE_2000mVpp	(0x0 << 1)
>> -#define AD5933_CTRL_RANGE_200mVpp	(0x1 << 1)
>> +#define AD5933_CTRL_RANGE_200mVpp	BIT(1)
>>  #define AD5933_CTRL_RANGE_400mVpp	(0x2 << 1)
>>  #define AD5933_CTRL_RANGE_1000mVpp	(0x3 << 1)
>>  #define AD5933_CTRL_RANGE(x)		((x) << 1)
>>
>> -#define AD5933_CTRL_PGA_GAIN_1		(0x1 << 0)
>> +#define AD5933_CTRL_PGA_GAIN_1		BIT(0)
>>  #define AD5933_CTRL_PGA_GAIN_5		(0x0 << 0)
>>
>>  /* AD5933_REG_CONTROL_LB Bits */
>> -#define AD5933_CTRL_RESET		(0x1 << 4)
>> +#define AD5933_CTRL_RESET		BIT(4)
>>  #define AD5933_CTRL_INT_SYSCLK		(0x0 << 3)
>> -#define AD5933_CTRL_EXT_SYSCLK		(0x1 << 3)
>> +#define AD5933_CTRL_EXT_SYSCLK		BIT(3)
>>
>>  /* AD5933_REG_STATUS Bits */
>> -#define AD5933_STAT_TEMP_VALID		(0x1 << 0)
>> -#define AD5933_STAT_DATA_VALID		(0x1 << 1)
>> -#define AD5933_STAT_SWEEP_DONE		(0x1 << 2)
>> +#define AD5933_STAT_TEMP_VALID		BIT(0)
>> +#define AD5933_STAT_DATA_VALID		BIT(1)
>> +#define AD5933_STAT_SWEEP_DONE		BIT(2)
>>
>>  /* I2C Block Commands */
>>  #define AD5933_I2C_BLOCK_WRITE		0xA0
>> @@ -222,7 +222,7 @@ static int ad5933_set_freq(struct ad5933_state *st,
>>  		u8 d8[4];
>>  	} dat;
>>
>> -	freqreg = (u64) freq * (u64) (1 << 27);
>> +	freqreg = (u64) freq * (u64) BIT(27);
>>  	do_div(freqreg, st->mclk_hz / 4);
>>
>>  	switch (reg) {
>> @@ -308,7 +308,7 @@ static ssize_t ad5933_show_frequency(struct device *dev,
>>  	freqreg = be32_to_cpu(dat.d32) & 0xFFFFFF;
>>
>>  	freqreg = (u64) freqreg * (u64) (st->mclk_hz / 4);
>> -	do_div(freqreg, 1 << 27);
>> +	do_div(freqreg, BIT(27));
>>
>>  	return sprintf(buf, "%d\n", (int) freqreg);
>>  }
>> @@ -437,7 +437,7 @@ static ssize_t ad5933_store(struct device *dev,
>>
>>  		/* 2x, 4x handling, see datasheet */
>>  		if (val > 511)
>> -			val = (val >> 1) | (1 << 9);
>> +			val = (val >> 1) | BIT(9);
>>  		else if (val > 1022)
>>  			val = (val >> 2) | (3 << 9);
>>
>> --
>> 2.1.4
>>
>>
>

Re: [PATCH 5/6] Staging: iio: impedance-analyzer: Prefer using the BIT macro

[Julia Lawall]

On Thu, 10 Sep 2015, Shraddha Barke wrote:

>
>
> On Thu, 10 Sep 2015, Julia Lawall wrote:
>
> > On Thu, 10 Sep 2015, Shraddha Barke wrote:
> >
> > > This patch replaces bit shifting on 1 with the BIT(x) macro
> > > as it's extensively used by other function in this driver.
> > >
> > > This was done with coccinelle:
> > > @@ int g; @@
> > >
> > > -(1 << g)
> > > +BIT(g)
> >
> > This doesn't look like a good idea here, since there is a mixture of uses
> > of BIT and other things for similar values.
> >
> Yes I'll send a new patch series dropping the cases of mixed uses of BIT.
> I hope Greg will ignore these patches.
> I found some instances of this issue in lustre file system.Should I go
> ahead with fixing those too?

That could be fine.

julia

>
> Thanks,
>
> Shraddha
>
>
> > julia
> >
> > > Signed-off-by: Shraddha Barke <shraddha.6596@gmail.com>
> > > ---
> > >  drivers/staging/iio/impedance-analyzer/ad5933.c | 22
> > > +++++++++++-----------
> > >  1 file changed, 11 insertions(+), 11 deletions(-)
> > >
> > > diff --git a/drivers/staging/iio/impedance-analyzer/ad5933.c
> > > b/drivers/staging/iio/impedance-analyzer/ad5933.c
> > > index c18109c..48acad0 100644
> > > --- a/drivers/staging/iio/impedance-analyzer/ad5933.c
> > > +++ b/drivers/staging/iio/impedance-analyzer/ad5933.c
> > > @@ -39,7 +39,7 @@
> > >  #define AD5933_REG_IMAG_DATA		0x96	/* R, 2 bytes*/
> > >
> > >  /* AD5933_REG_CONTROL_HB Bits */
> > > -#define AD5933_CTRL_INIT_START_FREQ	(0x1 << 4)
> > > +#define AD5933_CTRL_INIT_START_FREQ	BIT(4)
> > >  #define AD5933_CTRL_START_SWEEP		(0x2 << 4)
> > >  #define AD5933_CTRL_INC_FREQ		(0x3 << 4)
> > >  #define AD5933_CTRL_REPEAT_FREQ		(0x4 << 4)
> > > @@ -48,23 +48,23 @@
> > >  #define AD5933_CTRL_STANDBY		(0xB << 4)
> > >
> > >  #define AD5933_CTRL_RANGE_2000mVpp	(0x0 << 1)
> > > -#define AD5933_CTRL_RANGE_200mVpp	(0x1 << 1)
> > > +#define AD5933_CTRL_RANGE_200mVpp	BIT(1)
> > >  #define AD5933_CTRL_RANGE_400mVpp	(0x2 << 1)
> > >  #define AD5933_CTRL_RANGE_1000mVpp	(0x3 << 1)
> > >  #define AD5933_CTRL_RANGE(x)		((x) << 1)
> > >
> > > -#define AD5933_CTRL_PGA_GAIN_1		(0x1 << 0)
> > > +#define AD5933_CTRL_PGA_GAIN_1		BIT(0)
> > >  #define AD5933_CTRL_PGA_GAIN_5		(0x0 << 0)
> > >
> > >  /* AD5933_REG_CONTROL_LB Bits */
> > > -#define AD5933_CTRL_RESET		(0x1 << 4)
> > > +#define AD5933_CTRL_RESET		BIT(4)
> > >  #define AD5933_CTRL_INT_SYSCLK		(0x0 << 3)
> > > -#define AD5933_CTRL_EXT_SYSCLK		(0x1 << 3)
> > > +#define AD5933_CTRL_EXT_SYSCLK		BIT(3)
> > >
> > >  /* AD5933_REG_STATUS Bits */
> > > -#define AD5933_STAT_TEMP_VALID		(0x1 << 0)
> > > -#define AD5933_STAT_DATA_VALID		(0x1 << 1)
> > > -#define AD5933_STAT_SWEEP_DONE		(0x1 << 2)
> > > +#define AD5933_STAT_TEMP_VALID		BIT(0)
> > > +#define AD5933_STAT_DATA_VALID		BIT(1)
> > > +#define AD5933_STAT_SWEEP_DONE		BIT(2)
> > >
> > >  /* I2C Block Commands */
> > >  #define AD5933_I2C_BLOCK_WRITE		0xA0
> > > @@ -222,7 +222,7 @@ static int ad5933_set_freq(struct ad5933_state *st,
> > >  		u8 d8[4];
> > >  	} dat;
> > >
> > > -	freqreg = (u64) freq * (u64) (1 << 27);
> > > +	freqreg = (u64) freq * (u64) BIT(27);
> > >  	do_div(freqreg, st->mclk_hz / 4);
> > >
> > >  	switch (reg) {
> > > @@ -308,7 +308,7 @@ static ssize_t ad5933_show_frequency(struct device
> > > *dev,
> > >  	freqreg = be32_to_cpu(dat.d32) & 0xFFFFFF;
> > >
> > >  	freqreg = (u64) freqreg * (u64) (st->mclk_hz / 4);
> > > -	do_div(freqreg, 1 << 27);
> > > +	do_div(freqreg, BIT(27));
> > >
> > >  	return sprintf(buf, "%d\n", (int) freqreg);
> > >  }
> > > @@ -437,7 +437,7 @@ static ssize_t ad5933_store(struct device *dev,
> > >
> > >  		/* 2x, 4x handling, see datasheet */
> > >  		if (val > 511)
> > > -			val = (val >> 1) | (1 << 9);
> > > +			val = (val >> 1) | BIT(9);
> > >  		else if (val > 1022)
> > >  			val = (val >> 2) | (3 << 9);
> > >
> > > --
> > > 2.1.4
> > >
> > >
> >
>

[PATCH 6/6] Staging: iio: resolver: Prefer using the BIT macro

[Shraddha Barke]

This patch replaces bit shifting on 1 with the BIT(x) macro
as it's extensively used by other function in this driver.

This was done with coccinelle:
@@ int g; @@

-(1 << g)
+BIT(g)

Signed-off-by: Shraddha Barke <shraddha.6596@gmail.com>
---
 drivers/staging/iio/resolver/ad2s1210.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/staging/iio/resolver/ad2s1210.c b/drivers/staging/iio/resolver/ad2s1210.c
index 7bc3e4a..1cf7134 100644
--- a/drivers/staging/iio/resolver/ad2s1210.c
+++ b/drivers/staging/iio/resolver/ad2s1210.c
@@ -149,7 +149,7 @@ int ad2s1210_update_frequency_control_word(struct ad2s1210_state *st)
 	int ret;
 	unsigned char fcw;
 
-	fcw = (unsigned char)(st->fexcit * (1 << 15) / st->fclkin);
+	fcw = (unsigned char)(st->fexcit * BIT(15) / st->fclkin);
 	if (fcw < AD2S1210_MIN_FCW || fcw > AD2S1210_MAX_FCW) {
 		dev_err(&st->sdev->dev, "ad2s1210: FCW out of range\n");
 		return -ERANGE;
-- 
2.1.4

Re: [PATCH 6/6] Staging: iio: resolver: Prefer using the BIT macro

[Joe Perches]

On Thu, 2015-09-10 at 09:43 +0530, Shraddha Barke wrote:
> This patch replaces bit shifting on 1 with the BIT(x) macro
> as it's extensively used by other function in this driver.
[]
> diff --git a/drivers/staging/iio/resolver/ad2s1210.c b/drivers/staging/iio/resolver/ad2s1210.c
[]
> @@ -149,7 +149,7 @@ int ad2s1210_update_frequency_control_word(struct ad2s1210_state *st)
>  	int ret;
>  	unsigned char fcw;
>  
> -	fcw = (unsigned char)(st->fexcit * (1 << 15) / st->fclkin);
> +	fcw = (unsigned char)(st->fexcit * BIT(15) / st->fclkin);

Multiplying by a bit isn't very obvious.
Maybe just shift it.

	fcw = (unsigned char)((st->fexcit << 15) / st->fclkin);

Re: [PATCH 6/6] Staging: iio: resolver: Prefer using the BIT macro

[Julia Lawall]

On Wed, 9 Sep 2015, Joe Perches wrote:

> On Thu, 2015-09-10 at 09:43 +0530, Shraddha Barke wrote:
> > This patch replaces bit shifting on 1 with the BIT(x) macro
> > as it's extensively used by other function in this driver.
> []
> > diff --git a/drivers/staging/iio/resolver/ad2s1210.c b/drivers/staging/iio/resolver/ad2s1210.c
> []
> > @@ -149,7 +149,7 @@ int ad2s1210_update_frequency_control_word(struct ad2s1210_state *st)
> >  	int ret;
> >  	unsigned char fcw;
> >
> > -	fcw = (unsigned char)(st->fexcit * (1 << 15) / st->fclkin);
> > +	fcw = (unsigned char)(st->fexcit * BIT(15) / st->fclkin);
>
> Multiplying by a bit isn't very obvious.
> Maybe just shift it.
>
> 	fcw = (unsigned char)((st->fexcit << 15) / st->fclkin);

That looks nicer.  Shraddha maybe you can find this issue elsewhere.

julia