From: "Xin Li (Intel)" <xin@zytor.com>
To: linux-kernel@vger.kernel.org
Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com,
peterz@infradead.org, andrew.cooper3@citrix.com,
seanjc@google.com
Subject: [PATCH v1 2/3] x86/msr: Switch between WRMSRNS and WRMSR with the alternatives mechanism
Date: Tue, 6 Aug 2024 22:47:21 -0700 [thread overview]
Message-ID: <20240807054722.682375-3-xin@zytor.com> (raw)
In-Reply-To: <20240807054722.682375-1-xin@zytor.com>
From: Andrew Cooper <andrew.cooper3@citrix.com>
Per the discussion about FRED MSR writes with WRMSRNS instruction [1],
use the alternatives mechanism to choose WRMSRNS when it's available,
otherwise fallback to WRMSR.
[1] https://lore.kernel.org/lkml/15f56e6a-6edd-43d0-8e83-bb6430096514@citrix.com/
Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Signed-off-by: Xin Li (Intel) <xin@zytor.com>
---
arch/x86/include/asm/msr.h | 28 ++++++++++++++--------------
1 file changed, 14 insertions(+), 14 deletions(-)
diff --git a/arch/x86/include/asm/msr.h b/arch/x86/include/asm/msr.h
index d642037f9ed5..3e402d717815 100644
--- a/arch/x86/include/asm/msr.h
+++ b/arch/x86/include/asm/msr.h
@@ -99,19 +99,6 @@ static __always_inline void __wrmsr(unsigned int msr, u32 low, u32 high)
: : "c" (msr), "a"(low), "d" (high) : "memory");
}
-/*
- * WRMSRNS behaves exactly like WRMSR with the only difference being
- * that it is not a serializing instruction by default.
- */
-static __always_inline void __wrmsrns(u32 msr, u32 low, u32 high)
-{
- /* Instruction opcode for WRMSRNS; supported in binutils >= 2.40. */
- asm volatile("1: .byte 0x0f,0x01,0xc6\n"
- "2:\n"
- _ASM_EXTABLE_TYPE(1b, 2b, EX_TYPE_WRMSR)
- : : "c" (msr), "a"(low), "d" (high));
-}
-
#define native_rdmsr(msr, val1, val2) \
do { \
u64 __val = __rdmsr((msr)); \
@@ -312,9 +299,22 @@ do { \
#endif /* !CONFIG_PARAVIRT_XXL */
+/* Instruction opcode for WRMSRNS supported in binutils >= 2.40 */
+#define WRMSRNS _ASM_BYTES(0x0f,0x01,0xc6)
+
+/* Non-serializing WRMSR, when available. Falls back to a serializing WRMSR. */
static __always_inline void wrmsrns(u32 msr, u64 val)
{
- __wrmsrns(msr, val, val >> 32);
+ /*
+ * WRMSR is 2 bytes. WRMSRNS is 3 bytes. Pad WRMSR with a redundant
+ * DS prefix to avoid a trailing NOP.
+ */
+ asm volatile("1: "
+ ALTERNATIVE("ds wrmsr",
+ WRMSRNS, X86_FEATURE_WRMSRNS)
+ "2:\n"
+ _ASM_EXTABLE_TYPE(1b, 2b, EX_TYPE_WRMSR)
+ : : "c" (msr), "a" ((u32)val), "d" ((u32)(val >> 32)));
}
/*
--
2.45.2
next prev parent reply other threads:[~2024-08-07 5:50 UTC|newest]
Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-08-07 5:47 [PATCH v1 0/3] x86: Write FRED RSP0 on return to userspace Xin Li (Intel)
2024-08-07 5:47 ` [PATCH v1 1/3] x86/entry: Test ti_work for zero before processing individual bits Xin Li (Intel)
2024-08-07 16:21 ` Brian Gerst
2024-08-07 23:03 ` Xin Li
2024-08-07 18:08 ` Thomas Gleixner
2024-08-07 18:21 ` Thomas Gleixner
2024-08-07 23:01 ` Xin Li
2024-08-07 5:47 ` Xin Li (Intel) [this message]
2024-08-07 18:11 ` [PATCH v1 2/3] x86/msr: Switch between WRMSRNS and WRMSR with the alternatives mechanism Thomas Gleixner
2024-08-09 23:07 ` Andrew Cooper
2024-08-10 0:01 ` H. Peter Anvin
2024-08-10 0:25 ` Andrew Cooper
2024-08-16 17:52 ` Xin Li
2024-08-16 18:40 ` Andrew Cooper
2024-08-16 19:18 ` H. Peter Anvin
2024-08-16 21:45 ` Andrew Cooper
2024-08-16 21:26 ` H. Peter Anvin
2024-08-16 22:27 ` Andrew Cooper
2024-08-16 22:34 ` Andrew Cooper
2024-08-16 23:03 ` H. Peter Anvin
2024-08-16 22:59 ` H. Peter Anvin
2024-08-17 23:51 ` H. Peter Anvin
2024-08-17 14:23 ` Borislav Petkov
2024-08-17 14:43 ` Borislav Petkov
2024-08-17 15:44 ` Xin Li
2024-08-17 19:22 ` H. Peter Anvin
2024-08-18 5:59 ` Borislav Petkov
2024-08-17 19:22 ` H. Peter Anvin
2024-08-18 5:49 ` Borislav Petkov
2024-08-18 6:16 ` H. Peter Anvin
2024-08-07 5:47 ` [PATCH v1 3/3] x86/entry: Set FRED RSP0 on return to userspace instead of context switch Xin Li (Intel)
2024-08-07 18:39 ` Thomas Gleixner
2024-08-07 21:55 ` Sean Christopherson
2024-08-07 23:04 ` Thomas Gleixner
2024-08-09 10:45 ` Nikolay Borisov
2024-08-09 17:37 ` Xin Li
2024-08-09 22:43 ` H. Peter Anvin
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