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From: Andrew Cooper <andrew.cooper3@citrix.com>
To: Xin Li <xin@zytor.com>, linux-kernel@vger.kernel.org
Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
	dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com,
	peterz@infradead.org, seanjc@google.com
Subject: Re: [PATCH v1 2/3] x86/msr: Switch between WRMSRNS and WRMSR with the alternatives mechanism
Date: Fri, 16 Aug 2024 19:40:05 +0100	[thread overview]
Message-ID: <25200a9d-e222-4c40-9c97-b5e5e532db8c@citrix.com> (raw)
In-Reply-To: <7c09d124-08f1-40b4-813c-f0f74e19497a@zytor.com>

On 16/08/2024 6:52 pm, Xin Li wrote:
> On 8/9/2024 4:07 PM, Andrew Cooper wrote:
>> On 07/08/2024 6:47 am, Xin Li (Intel) wrote:
>>> From: Andrew Cooper <andrew.cooper3@citrix.com>
>>> +/* Instruction opcode for WRMSRNS supported in binutils >= 2.40 */
>>> +#define WRMSRNS _ASM_BYTES(0x0f,0x01,0xc6)
>>> +
>>> +/* Non-serializing WRMSR, when available.  Falls back to a
>>> serializing WRMSR. */
>>>   static __always_inline void wrmsrns(u32 msr, u64 val)
>>>   {
>>> -    __wrmsrns(msr, val, val >> 32);
>>> +    /*
>>> +     * WRMSR is 2 bytes.  WRMSRNS is 3 bytes.  Pad WRMSR with a
>>> redundant
>>> +     * DS prefix to avoid a trailing NOP.
>>> +     */
>>> +    asm volatile("1: "
>>> +             ALTERNATIVE("ds wrmsr",
>>
>> This isn't the version I presented, and there's no discussion of the
>> alteration.
>
> I'm trying to implement wrmsr() as
>
> static __always_inline void wrmsr(u32 msr, u64 val)
> {
>     asm volatile("1: " ALTERNATIVE_2("wrmsr", WRMSRNS,
> X86_FEATURE_WRMSRNS,
>                      "call asm_xen_write_msr", X86_FEATURE_XENPV)
>              "2: " _ASM_EXTABLE_TYPE(1b, 2b, EX_TYPE_WRMSR)
>              : : "c" (msr), "a" (val), "d" ((u32)(val >> 32)),
>              "D" (msr), "S" (val));
> }
>
>
> As the CALL instruction is 5-byte long, and we need to pad nop for both
> WRMSR and WRMSRNS, what about not using segment prefix at all?

The prefix was a minor optimisation to avoid having a trailing nop at
the end.

When combined with a call, you need 3 prefixes on WRMSR and 2 prefixes
on WRMSRNS to make all options be 5 bytes long.

That said, there's already a paravirt hook for this, and if you're
looking to work around the code gen mess for that, then doing it like
this by doubling up into rdi and rsi isn't great either.

My suggestion, not that I've had time to experiment, was to change
paravirt to use a non-C ABI and have asm_xen_write_msr() recombine
edx:eax into rsi.  That way the top level wrmsr() retains sensible
codegen for native even when paravirt is active.

~Andrew

  reply	other threads:[~2024-08-16 18:40 UTC|newest]

Thread overview: 37+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-08-07  5:47 [PATCH v1 0/3] x86: Write FRED RSP0 on return to userspace Xin Li (Intel)
2024-08-07  5:47 ` [PATCH v1 1/3] x86/entry: Test ti_work for zero before processing individual bits Xin Li (Intel)
2024-08-07 16:21   ` Brian Gerst
2024-08-07 23:03     ` Xin Li
2024-08-07 18:08   ` Thomas Gleixner
2024-08-07 18:21     ` Thomas Gleixner
2024-08-07 23:01     ` Xin Li
2024-08-07  5:47 ` [PATCH v1 2/3] x86/msr: Switch between WRMSRNS and WRMSR with the alternatives mechanism Xin Li (Intel)
2024-08-07 18:11   ` Thomas Gleixner
2024-08-09 23:07   ` Andrew Cooper
2024-08-10  0:01     ` H. Peter Anvin
2024-08-10  0:25       ` Andrew Cooper
2024-08-16 17:52     ` Xin Li
2024-08-16 18:40       ` Andrew Cooper [this message]
2024-08-16 19:18         ` H. Peter Anvin
2024-08-16 21:45           ` Andrew Cooper
2024-08-16 21:26         ` H. Peter Anvin
2024-08-16 22:27           ` Andrew Cooper
2024-08-16 22:34             ` Andrew Cooper
2024-08-16 23:03               ` H. Peter Anvin
2024-08-16 22:59           ` H. Peter Anvin
2024-08-17 23:51             ` H. Peter Anvin
2024-08-17 14:23       ` Borislav Petkov
2024-08-17 14:43         ` Borislav Petkov
2024-08-17 15:44           ` Xin Li
2024-08-17 19:22           ` H. Peter Anvin
2024-08-18  5:59             ` Borislav Petkov
2024-08-17 19:22         ` H. Peter Anvin
2024-08-18  5:49           ` Borislav Petkov
2024-08-18  6:16             ` H. Peter Anvin
2024-08-07  5:47 ` [PATCH v1 3/3] x86/entry: Set FRED RSP0 on return to userspace instead of context switch Xin Li (Intel)
2024-08-07 18:39   ` Thomas Gleixner
2024-08-07 21:55     ` Sean Christopherson
2024-08-07 23:04       ` Thomas Gleixner
2024-08-09 10:45   ` Nikolay Borisov
2024-08-09 17:37     ` Xin Li
2024-08-09 22:43       ` H. Peter Anvin

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