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From: Borislav Petkov <bp@alien8.de>
To: Robert Richter <rrichter@amd.com>
Cc: "Naveen N Rao (AMD)" <naveen@kernel.org>,
	Dave Hansen <dave.hansen@linux.intel.com>,
	linux-kernel@vger.kernel.org, x86@kernel.org,
	Thomas Gleixner <tglx@linutronix.de>,
	Ingo Molnar <mingo@redhat.com>, Bharata B Rao <bharata@amd.com>,
	Manali Shukla <manali.shukla@amd.com>,
	Nikunj A Dadhania <nikunj@amd.com>,
	"H. Peter Anvin" <hpa@zytor.com>
Subject: Re: [PATCH RESEND v4 1/3] perf/amd/ibs: Limit the max EILVT register count for AMD family 0x10
Date: Mon, 21 Sep 2026 22:26:44 -0700	[thread overview]
Message-ID: <20260922052644.GAarIRlC8y3-LTM9LB@fat_crate.local> (raw)
In-Reply-To: <arD2XOBh5SQnKjof@rric.localdomain>

On Mon, Sep 21, 2026 at 11:18:20AM +0200, Robert Richter wrote:
> > What is this "fixing"?
> 
> Nothing to do as long APIC_EILVT_NR_MAX does not change.
> 
> It shouldn't be sent as a standalone patch. Instead, embed it in a
> broader change to keep it in that context.

Aha, it looks like patch 3 is the candidate for that.

:)

-- 
Regards/Gruss,
    Boris.

https://people.kernel.org/tglx/notes-about-netiquette

  reply	other threads:[~2026-09-22  5:27 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-03  9:28 [PATCH RESEND v4 0/3] x86/apic: Add support for additional AMD EILVT registers Naveen N Rao (AMD)
2026-09-03  9:28 ` [PATCH RESEND v4 1/3] perf/amd/ibs: Limit the max EILVT register count for AMD family 0x10 Naveen N Rao (AMD)
2026-09-19  3:40   ` Borislav Petkov
2026-09-21  9:18     ` Robert Richter
2026-09-22  5:26       ` Borislav Petkov [this message]
2026-09-03  9:28 ` [PATCH RESEND v4 2/3] x86/apic: Introduce a variable to track the number of EILVT registers Naveen N Rao (AMD)
2026-09-22  5:36   ` Borislav Petkov
2026-09-24 11:58     ` Naveen N Rao
2026-09-25  4:26       ` Borislav Petkov
2026-09-25 16:09         ` Naveen N Rao
2026-09-03  9:28 ` [PATCH RESEND v4 3/3] x86/apic: Drop APIC_EILVT_NR_MAX Naveen N Rao (AMD)
2026-09-07  5:16 ` [PATCH RESEND v4 0/3] x86/apic: Add support for additional AMD EILVT registers Bharata B Rao
2026-09-15  0:29 ` Borislav Petkov
2026-09-18  7:03   ` Ravi Bangoria
2026-09-19  1:46     ` Borislav Petkov

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