mirror of https://lore.kernel.org/lkml/
 help / color / mirror / Atom feed
From: Borislav Petkov <bp@alien8.de>
To: Naveen N Rao <naveen@kernel.org>
Cc: Dave Hansen <dave.hansen@linux.intel.com>,
	linux-kernel@vger.kernel.org, x86@kernel.org,
	Thomas Gleixner <tglx@linutronix.de>,
	Ingo Molnar <mingo@redhat.com>, Bharata B Rao <bharata@amd.com>,
	Manali Shukla <manali.shukla@amd.com>,
	Nikunj A Dadhania <nikunj@amd.com>,
	"H. Peter Anvin" <hpa@zytor.com>
Subject: Re: [PATCH RESEND v4 2/3] x86/apic: Introduce a variable to track the number of EILVT registers
Date: Thu, 24 Sep 2026 21:26:12 -0700	[thread overview]
Message-ID: <20260925042612.GCarX35LHhl65JavXf@fat_crate.local> (raw)
In-Reply-To: <arUKzQZx77r49plq@blrnaveerao1>

On Thu, Sep 24, 2026 at 05:28:48PM +0530, Naveen N Rao wrote:
> Cause I didn't want to risk changing the current default EILVT register 
> count for some ~2 decade old processor that may be advertising 
> X86_FEATURE_EXTAPIC but encoding a count of zero in APIC_EFEAT.

Do you know of such a processor?

Because Christian gave you all regs count from K8 onwards and that's what we
support anyway. I don't care about K7 rust and older.

> Right, the split reflects how I viewed the changes, and to hopefully 
> simplify the review. Looks like I got the split wrong as it looks to 
> have been counter-productive here.

Right, just keep it simple and do a single patch.

Thx.

-- 
Regards/Gruss,
    Boris.

https://people.kernel.org/tglx/notes-about-netiquette

  reply	other threads:[~2026-09-25  4:26 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-03  9:28 [PATCH RESEND v4 0/3] x86/apic: Add support for additional AMD " Naveen N Rao (AMD)
2026-09-03  9:28 ` [PATCH RESEND v4 1/3] perf/amd/ibs: Limit the max EILVT register count for AMD family 0x10 Naveen N Rao (AMD)
2026-09-19  3:40   ` Borislav Petkov
2026-09-21  9:18     ` Robert Richter
2026-09-22  5:26       ` Borislav Petkov
2026-09-03  9:28 ` [PATCH RESEND v4 2/3] x86/apic: Introduce a variable to track the number of EILVT registers Naveen N Rao (AMD)
2026-09-22  5:36   ` Borislav Petkov
2026-09-24 11:58     ` Naveen N Rao
2026-09-25  4:26       ` Borislav Petkov [this message]
2026-09-25 16:09         ` Naveen N Rao
2026-09-03  9:28 ` [PATCH RESEND v4 3/3] x86/apic: Drop APIC_EILVT_NR_MAX Naveen N Rao (AMD)
2026-09-07  5:16 ` [PATCH RESEND v4 0/3] x86/apic: Add support for additional AMD EILVT registers Bharata B Rao
2026-09-15  0:29 ` Borislav Petkov
2026-09-18  7:03   ` Ravi Bangoria
2026-09-19  1:46     ` Borislav Petkov

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20260925042612.GCarX35LHhl65JavXf@fat_crate.local \
    --to=bp@alien8.de \
    --cc=bharata@amd.com \
    --cc=dave.hansen@linux.intel.com \
    --cc=hpa@zytor.com \
    --cc=linux-kernel@vger.kernel.org \
    --cc=manali.shukla@amd.com \
    --cc=mingo@redhat.com \
    --cc=naveen@kernel.org \
    --cc=nikunj@amd.com \
    --cc=tglx@linutronix.de \
    --cc=x86@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox

all inboxes | Powered by JetHome®