From: Bharata B Rao <bharata@amd.com>
To: "Naveen N Rao (AMD)" <naveen@kernel.org>,
Borislav Petkov <bp@alien8.de>,
Dave Hansen <dave.hansen@linux.intel.com>
Cc: <linux-kernel@vger.kernel.org>, <x86@kernel.org>,
Thomas Gleixner <tglx@linutronix.de>,
Ingo Molnar <mingo@redhat.com>,
Manali Shukla <manali.shukla@amd.com>,
Nikunj A Dadhania <nikunj@amd.com>,
"H. Peter Anvin" <hpa@zytor.com>
Subject: Re: [PATCH RESEND v4 0/3] x86/apic: Add support for additional AMD EILVT registers
Date: Mon, 7 Sep 2026 10:46:27 +0530 [thread overview]
Message-ID: <765afc29-db88-4f70-9189-ab2532ad6439@amd.com> (raw)
In-Reply-To: <cover.1788425679.git.naveen@kernel.org>
On 03-Sep-26 2:58 PM, Naveen N Rao (AMD) wrote:
> Add support for additional APIC EILVT registers being introduced in
> future AMD processors:
> https://docs.amd.com/v/u/en-US/69205_1.00_AMD64_IBS_PUB)
>
> This is a resend of v4, rebased on tip/master. Previous posting:
> http://lore.kernel.org/r/cover.1784785046.git.naveen@kernel.org
This change is required by IBS memory profiler as well which is being posted as
one of the hotness sources in pghot patchset
(https://lore.kernel.org/linux-mm/20260728054356.291998-1-bharata@amd.com/)
Tested this series with pghot+ibs memory profiler.
For the series, Tested-by: Bharata B Rao <bharata@amd.com>
Regards,
Bharata.
next prev parent reply other threads:[~2026-09-07 5:16 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-03 9:28 Naveen N Rao (AMD)
2026-09-03 9:28 ` [PATCH RESEND v4 1/3] perf/amd/ibs: Limit the max EILVT register count for AMD family 0x10 Naveen N Rao (AMD)
2026-09-19 3:40 ` Borislav Petkov
2026-09-21 9:18 ` Robert Richter
2026-09-22 5:26 ` Borislav Petkov
2026-09-03 9:28 ` [PATCH RESEND v4 2/3] x86/apic: Introduce a variable to track the number of EILVT registers Naveen N Rao (AMD)
2026-09-22 5:36 ` Borislav Petkov
2026-09-24 11:58 ` Naveen N Rao
2026-09-25 4:26 ` Borislav Petkov
2026-09-25 16:09 ` Naveen N Rao
2026-09-03 9:28 ` [PATCH RESEND v4 3/3] x86/apic: Drop APIC_EILVT_NR_MAX Naveen N Rao (AMD)
2026-09-07 5:16 ` Bharata B Rao [this message]
2026-09-15 0:29 ` [PATCH RESEND v4 0/3] x86/apic: Add support for additional AMD EILVT registers Borislav Petkov
2026-09-18 7:03 ` Ravi Bangoria
2026-09-19 1:46 ` Borislav Petkov
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