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From: Srirangan Madhavan <smadhavan@nvidia.com>
To: Alison Schofield <alison.schofield@intel.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>,
	Dave Jiang <dave.jiang@intel.com>,
	Davidlohr Bueso <dave@stgolabs.net>,
	Ira Weiny <ira.weiny@intel.com>,
	Jonathan Cameron <jic23@kernel.org>,
	Vishal Verma <vishal.l.verma@intel.com>,
	linux-cxl@vger.kernel.org, linux-pci@vger.kernel.org,
	linux-kernel@vger.kernel.org,
	Alex Williamson <alex.williamson@redhat.com>,
	vsethi@nvidia.com, alwilliamson@nvidia.com,
	Sai Yashwanth Reddy Kancherla <skancherla@nvidia.com>,
	Vishal Aslot <vaslot@nvidia.com>,
	Manish Honap <mhonap@nvidia.com>, Jiandi An <jan@nvidia.com>,
	Richard Cheng <icheng@nvidia.com>,
	linux-tegra@vger.kernel.org
Subject: Re: [PATCH v15 13/16] PCI/CXL: Restore CXL state after PCI reset
Date: Thu, 29 Oct 2026 17:46:02 -0700	[thread overview]
Message-ID: <4d3155b4-126e-4adb-a88a-a543783812ff@nvidia.com> (raw)
In-Reply-To: <auAg6MFDGyVQvQxM@aschofie-mobl2.lan>

On 10/26/26 8:56 PM, Alison Schofield wrote:
> Hi Srirangan,
> 
> This looks like a copy of cxld_await_commit() w the final test flipped.
> Could cxld_await_commit() take the Committed state to wait for, instead
> of copying it here?
> 
>> +
>>   static u32 cxl_hdm_write_range(void __iomem *hdm,
>>                               const struct cxl_decoder_config *config)
>>   {
>> @@ -273,3 +293,163 @@ int cxl_hdm_read_state(struct device *dev, void __iomem *hdm,
>>
>>        return 0;
>>   }
>> +
>> +static int cxl_hdm_decoder_uncommit(struct device *dev, void __iomem *hdm,
>> +                                 int id, bool *retained)
> Same ask as on v14.
> Can the restore helpers return the error and let cxl_restore_state()
> report it? v15 swaps struct pci_dev for struct device, but it still
> runs through cxl_hdm_restore_state(), cxl_hdm_restore_decoder(),
> this function and cxl_hdm_read_decoder_settings(), only for dev_err().
> 
> snip
> 
>> +cxl_hdm_restore_decoder(struct device *dev, void __iomem *hdm,
>> +                     const struct cxl_endpoint_decoder_settings *settings)
>> +{
>> +     const struct cxl_decoder_config *config = &settings->config;
>> +     bool retained;
>> +     u32 ctrl;
>> +     int rc;
>> +
>> +     rc = cxl_hdm_decoder_uncommit(dev, hdm, config->id, &retained);
>> +     if (rc)
>> +             return rc;
>> +
>> +     if (retained) {
>> +             struct cxl_endpoint_decoder_settings active;
>> +
>> +             rc = cxl_hdm_read_decoder_settings(dev, &active, hdm, config->id);
>> +             if (rc) {
>> +                     dev_err(dev,
>> +                             "CXL HDM decoder %d has invalid configuration: %d\n",
>> +                             config->id, rc);
> 
> cxl_hdm_read_decoder_settings() already logs this same message, so it
> gets logged twice. That goes away with the reporting change above.
> 
> snip
>> +                     config->id, rc);
>> +             return rc;
>> +     }
>> +
>> +     if (!(config->flags & CXL_DECODER_F_LOCK))
>> +             return 0;
>> +
>> +     ctrl = readl(hdm + CXL_HDM_DECODER0_CTRL_OFFSET(config->id));
>> +     if (ctrl == U32_MAX)
>> +             return -EIO;
>> +     ctrl |= CXL_HDM_DECODER0_CTRL_LOCK;
>> +     writel(ctrl, hdm + CXL_HDM_DECODER0_CTRL_OFFSET(config->id));
> This reads like we commit the decoder first and set Lock On Commit next.
> The spec seems to say the lock only takes effect at the moment the
> decoder commits, making this too late. Looking at spec 8.2.4.20.17.
> 
> -- Alison

Hi Alison,

In v16, I changed cxld_await_commit() to handle both commit and 
uncommit, and moved restore error reporting to cxl_restore_state().

I also changed the restore sequence to set Lock On Commit before 
recommitting a cleared locked decoder. Retained locked decoder state is 
still checked and left unchanged.

-- 
Regards,
Srirangan

  reply	other threads:[~2026-10-30  0:46 UTC|newest]

Thread overview: 41+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-10-11  2:14 [PATCH v15 00/16] PCI/CXL: Add CXL reset support for Type 2 devices Srirangan Madhavan
2026-10-11  2:14 ` [PATCH v15 01/16] cxl: Drop stale decoder interleave limit comment Srirangan Madhavan
2026-10-27  4:13   ` Alison Schofield
2026-10-11  2:14 ` [PATCH v15 02/16] cxl: Share CXL port upstream PCI device lookup Srirangan Madhavan
2026-10-11  2:14 ` [PATCH v15 03/16] cxl: Move decoder declarations to shared header Srirangan Madhavan
2026-10-11  2:14 ` [PATCH v15 04/16] cxl: Embed decoder configuration in a standalone structure Srirangan Madhavan
2026-10-11  2:14 ` [PATCH v15 05/16] cxl: Introduce endpoint HDM decoder settings Srirangan Madhavan
2026-10-26 22:20   ` Dave Jiang
2026-10-27  6:23   ` Li Ming
2026-10-11  2:14 ` [PATCH v15 06/16] cxl: Move HDM decoder helpers to built-in code Srirangan Madhavan
2026-10-26 22:32   ` Dave Jiang
2026-10-27  6:24   ` Li Ming
2026-10-11  2:14 ` [PATCH v15 07/16] cxl: Share HDM decoder register unpacking Srirangan Madhavan
2026-10-26 22:41   ` Dave Jiang
2026-10-27  6:31   ` Li Ming
2026-10-11  2:14 ` [PATCH v15 08/16] cxl: Refresh cached PCI HDM decoder settings Srirangan Madhavan
2026-10-26 22:56   ` Dave Jiang
2026-10-27  6:50   ` Li Ming
2026-10-11  2:14 ` [PATCH v15 09/16] PCI/CXL: Cache endpoint HDM state during PCI enumeration Srirangan Madhavan
2026-10-27  8:07   ` Li Ming
2026-10-29  3:19   ` Alison Schofield
2026-10-30  1:11     ` Srirangan Madhavan
2026-10-29  7:02   ` Li Ming
2026-10-11  2:14 ` [PATCH v15 10/16] PCI/CXL: Add CXL Device Reset sequencing Srirangan Madhavan
2026-10-28  3:01   ` Li Ming
2026-10-30  1:23     ` Srirangan Madhavan
2026-10-30  1:33     ` Srirangan Madhavan
2026-10-11  2:14 ` [PATCH v15 11/16] cxl: Validate and synchronize HDM ranges around reset Srirangan Madhavan
2026-10-27  3:25   ` Alison Schofield
2026-10-29 23:47     ` Srirangan Madhavan
2026-10-27  4:32   ` Alison Schofield
2026-10-30  1:43     ` Srirangan Madhavan
2026-10-11  2:14 ` [PATCH v15 12/16] PCI/CXL: Reject reset with unsafe function scope Srirangan Madhavan
2026-10-11  2:14 ` [PATCH v15 13/16] PCI/CXL: Restore CXL state after PCI reset Srirangan Madhavan
2026-10-27  3:56   ` Alison Schofield
2026-10-30  0:46     ` Srirangan Madhavan [this message]
2026-10-11  2:14 ` [PATCH v15 14/16] PCI/CXL: Expose CXL Reset as a PCI reset method Srirangan Madhavan
2026-10-11  2:14 ` [PATCH v15 15/16] PCI/CXL: Restore CXL state after CXL bus reset Srirangan Madhavan
2026-10-11  2:14 ` [PATCH v15 16/16] tools/testing/cxl: Add HDM decoder range checks Srirangan Madhavan
2026-10-27  2:41   ` Alison Schofield
2026-10-30  0:48     ` Srirangan Madhavan

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