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From: Dave Hansen <dave.hansen@intel.com>
To: Borislav Petkov <bp@alien8.de>,
	"Chang S. Bae" <chang.seok.bae@intel.com>
Cc: linux-kernel@vger.kernel.org, x86@kernel.org, tglx@linutronix.de,
	mingo@redhat.com, dave.hansen@linux.intel.com
Subject: Re: [PATCH RFC 4/7] x86/microcode/intel: Prepare for microcode staging
Date: Mon, 4 Nov 2024 08:08:47 -0800	[thread overview]
Message-ID: <7d2e421e-7fc1-4ce1-9081-7765bf71f7a3@intel.com> (raw)
In-Reply-To: <20241104111630.GSZyitDuXnBYmEFxvo@fat_crate.local>

On 11/4/24 03:16, Borislav Petkov wrote:
> On Tue, Oct 01, 2024 at 09:10:39AM -0700, Chang S. Bae wrote:
>> +static inline u64 staging_addr(u32 cpu)
>> +{
>> +	u32 lo, hi;
>> +
>> +	rdmsr_on_cpu(cpu, MSR_IA32_MCU_STAGING_MBOX_ADDR, &lo, &hi);
>> +	return lo | ((u64)hi << 32);
>> +}
> A single usage site. Move its code there and get rid of the function.

Yeah, and it'll look a lot nicer if you use:

	rdmsrl_on_cpu(cpu, MSR_IA32_MCU_STAGING_MBOX_ADDR, &addr);

and don't have to do the high/lo munging.

  reply	other threads:[~2024-11-04 16:08 UTC|newest]

Thread overview: 44+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-10-01 16:10 [PATCH RFC 0/7] x86/microcode: Support for Intel Staging Feature Chang S. Bae
2024-10-01 16:10 ` [PATCH RFC 1/7] x86/microcode/intel: Remove unnecessary cache writeback and invalidation Chang S. Bae
2024-10-25 16:24   ` [tip: x86/microcode] " tip-bot2 for Chang S. Bae
2024-10-01 16:10 ` [PATCH RFC 2/7] x86/microcode: Introduce staging option to reduce late-loading latency Chang S. Bae
2024-11-04 10:45   ` Borislav Petkov
2024-10-01 16:10 ` [PATCH RFC 3/7] x86/msr-index: Define MSR index and bit for the microcode staging feature Chang S. Bae
2024-10-01 16:10 ` [PATCH RFC 4/7] x86/microcode/intel: Prepare for microcode staging Chang S. Bae
2024-11-04 11:16   ` Borislav Petkov
2024-11-04 16:08     ` Dave Hansen [this message]
2024-11-04 18:34       ` Chang S. Bae
2024-11-04 20:10         ` Chang S. Bae
2024-11-06 18:23           ` [PATCH] cpufreq: Simplify MSR read on the boot CPU Chang S. Bae
2024-11-12 20:44             ` Rafael J. Wysocki
2024-11-06 18:28     ` [PATCH RFC 4/7] x86/microcode/intel: Prepare for microcode staging Chang S. Bae
2024-11-07  1:12       ` Thomas Gleixner
2024-11-08 22:42         ` Chang S. Bae
2024-11-08 22:51         ` Dave Hansen
2024-10-01 16:10 ` [PATCH RFC 5/7] x86/microcode/intel_staging: Implement staging logic Chang S. Bae
2024-10-01 16:10 ` [PATCH RFC 6/7] x86/microcode/intel_staging: Support mailbox data transfer Chang S. Bae
2024-10-01 16:10 ` [PATCH RFC 7/7] x86/microcode/intel: Enable staging when available Chang S. Bae
2024-12-11  1:42 ` [PATCH 0/6] x86/microcode: Support for Intel Staging Feature Chang S. Bae
2024-12-11  1:42   ` [PATCH 1/6] x86/microcode: Introduce staging option to reduce late-loading latency Chang S. Bae
2025-02-17 13:33     ` Borislav Petkov
2025-02-18  7:51       ` Chang S. Bae
2025-02-18 11:36         ` Borislav Petkov
2025-02-18 15:16     ` Dave Hansen
2024-12-11  1:42   ` [PATCH 2/6] x86/msr-index: Define MSR index and bit for the microcode staging feature Chang S. Bae
2025-02-26 17:19     ` Borislav Petkov
2024-12-11  1:42   ` [PATCH 3/6] x86/microcode/intel: Prepare for microcode staging Chang S. Bae
2025-02-26 17:52     ` Borislav Petkov
2024-12-11  1:42   ` [PATCH 4/6] x86/microcode/intel_staging: Implement staging logic Chang S. Bae
2025-02-18 20:16     ` Dave Hansen
2025-02-26 17:56     ` Borislav Petkov
2024-12-11  1:42   ` [PATCH 5/6] x86/microcode/intel_staging: Support mailbox data transfer Chang S. Bae
2025-02-18 20:54     ` Dave Hansen
2025-03-20 23:42       ` Chang S. Bae
2024-12-11  1:42   ` [PATCH 6/6] x86/microcode/intel: Enable staging when available Chang S. Bae
2025-02-07 18:37   ` [PATCH 0/6] x86/microcode: Support for Intel Staging Feature Chang S. Bae
2025-02-28 22:27     ` Colin Mitchell
2025-02-28 22:52       ` Borislav Petkov
2025-02-28 23:23         ` Dave Hansen
2025-03-26 21:29           ` Colin Mitchell
2025-04-02 17:14             ` Dave Hansen
2025-02-28 23:05       ` Dave Hansen

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