* [PATCH 1/4] dt-bindings: media: qcom,nord-iris: Add nord video codec
2026-09-19 4:44 [PATCH 0/4] media: iris: Add support for nord platform Vishnu Reddy
@ 2026-09-19 4:44 ` Vishnu Reddy
2026-09-20 13:08 ` Shawn Guo
2026-09-19 4:44 ` [PATCH 2/4] arm64: dts: qcom: nord: Add iris video node Vishnu Reddy
` (3 subsequent siblings)
4 siblings, 1 reply; 8+ messages in thread
From: Vishnu Reddy @ 2026-09-19 4:44 UTC (permalink / raw)
To: Vikash Garodia, Dikshita Agarwal, Abhinav Kumar,
Bryan O'Donoghue, Mauro Carvalho Chehab, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Bjorn Andersson,
Konrad Dybcio, Abel Vesa
Cc: linux-media, linux-arm-msm, devicetree, linux-kernel, Vishnu Reddy
The nord platform uses the same dual-core iris video codec hardware as
glymur, with matching clocks and power domains. Add a qcom,nord-iris
compatible string that falls back to qcom,glymur-iris, allowing nord to
reuse the existing glymur iris devicetree schema.
Signed-off-by: Vishnu Reddy <busanna.reddy@oss.qualcomm.com>
---
Documentation/devicetree/bindings/media/qcom,glymur-iris.yaml | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/media/qcom,glymur-iris.yaml b/Documentation/devicetree/bindings/media/qcom,glymur-iris.yaml
index de4792f3b658..558b85ef9ea0 100644
--- a/Documentation/devicetree/bindings/media/qcom,glymur-iris.yaml
+++ b/Documentation/devicetree/bindings/media/qcom,glymur-iris.yaml
@@ -15,7 +15,11 @@ description:
properties:
compatible:
- const: qcom,glymur-iris
+ oneOf:
+ - items:
+ - const: qcom,nord-iris
+ - const: qcom,glymur-iris
+ - const: qcom,glymur-iris
clocks:
maxItems: 9
--
2.34.1
^ permalink raw reply [flat|nested] 8+ messages in thread* Re: [PATCH 1/4] dt-bindings: media: qcom,nord-iris: Add nord video codec
2026-09-19 4:44 ` [PATCH 1/4] dt-bindings: media: qcom,nord-iris: Add nord video codec Vishnu Reddy
@ 2026-09-20 13:08 ` Shawn Guo
0 siblings, 0 replies; 8+ messages in thread
From: Shawn Guo @ 2026-09-20 13:08 UTC (permalink / raw)
To: Vishnu Reddy
Cc: Vikash Garodia, Dikshita Agarwal, Abhinav Kumar,
Bryan O'Donoghue, Mauro Carvalho Chehab, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Bjorn Andersson,
Konrad Dybcio, Abel Vesa, linux-media, linux-arm-msm, devicetree,
linux-kernel
On Sat, Sep 19, 2026 at 10:14:55AM +0530, Vishnu Reddy wrote:
> The nord platform uses the same dual-core iris video codec hardware as
> glymur, with matching clocks and power domains. Add a qcom,nord-iris
> compatible string that falls back to qcom,glymur-iris, allowing nord to
> reuse the existing glymur iris devicetree schema.
>
> Signed-off-by: Vishnu Reddy <busanna.reddy@oss.qualcomm.com>
> ---
> Documentation/devicetree/bindings/media/qcom,glymur-iris.yaml | 6 +++++-
> 1 file changed, 5 insertions(+), 1 deletion(-)
>
> diff --git a/Documentation/devicetree/bindings/media/qcom,glymur-iris.yaml b/Documentation/devicetree/bindings/media/qcom,glymur-iris.yaml
> index de4792f3b658..558b85ef9ea0 100644
> --- a/Documentation/devicetree/bindings/media/qcom,glymur-iris.yaml
> +++ b/Documentation/devicetree/bindings/media/qcom,glymur-iris.yaml
> @@ -15,7 +15,11 @@ description:
>
> properties:
> compatible:
> - const: qcom,glymur-iris
> + oneOf:
> + - items:
> + - const: qcom,nord-iris
> + - const: qcom,glymur-iris
> + - const: qcom,glymur-iris
It might be a problem of prerequisite change instead of this patch
itself. But I'm seeing a CHECK_DTBS issue here.
Documentation/devicetree/bindings/media/qcom,venus-common.yaml: iommu-ranges: missing type definition
DTC [C] arch/arm64/boot/dts/qcom/nord-ride-embedded.dtb
out/arch/arm64/boot/dts/qcom/nord-ride-embedded.dtb: video-codec@aa00000 (qcom,nord-iris): non-pixel:iommu-ranges: [629145600, 3663724544] is too long
from schema $id: http://devicetree.org/schemas/media/qcom,glymur-iris.yaml
out/arch/arm64/boot/dts/qcom/nord-ride-embedded.dtb: video-codec@aa00000 (qcom,nord-iris): Unevaluated properties are not allowed ('#address-cells', '#size-cells', 'dma-ranges', 'firmware-name', 'interrupts', 'memory-region', 'pixel', 'reg' were unexpected)
from schema $id: http://devicetree.org/schemas/media/qcom,glymur-iris.yaml
Shawn
>
> clocks:
> maxItems: 9
>
> --
> 2.34.1
>
>
^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH 2/4] arm64: dts: qcom: nord: Add iris video node
2026-09-19 4:44 [PATCH 0/4] media: iris: Add support for nord platform Vishnu Reddy
2026-09-19 4:44 ` [PATCH 1/4] dt-bindings: media: qcom,nord-iris: Add nord video codec Vishnu Reddy
@ 2026-09-19 4:44 ` Vishnu Reddy
2026-09-20 13:16 ` Shawn Guo
2026-09-19 4:44 ` [PATCH 3/4] arm64: dts: qcom: nord-ride-embedded: Enable iris video codec node Vishnu Reddy
` (2 subsequent siblings)
4 siblings, 1 reply; 8+ messages in thread
From: Vishnu Reddy @ 2026-09-19 4:44 UTC (permalink / raw)
To: Vikash Garodia, Dikshita Agarwal, Abhinav Kumar,
Bryan O'Donoghue, Mauro Carvalho Chehab, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Bjorn Andersson,
Konrad Dybcio, Abel Vesa
Cc: linux-media, linux-arm-msm, devicetree, linux-kernel, Vishnu Reddy
Add iris video codec to nord SoC, which comes with significantly different
powering up sequence than previous platforms, thus different clocks and
resets.
Signed-off-by: Vishnu Reddy <busanna.reddy@oss.qualcomm.com>
---
arch/arm64/boot/dts/qcom/nord-embedded.dtsi | 114 ++++++++++++++++++++++++++++
1 file changed, 114 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/nord-embedded.dtsi b/arch/arm64/boot/dts/qcom/nord-embedded.dtsi
index 74f4e6be8652..03f827f3e5fc 100644
--- a/arch/arm64/boot/dts/qcom/nord-embedded.dtsi
+++ b/arch/arm64/boot/dts/qcom/nord-embedded.dtsi
@@ -1428,6 +1428,120 @@ camcc: clock-controller@9ce0000 {
#power-domain-cells = <1>;
};
+ iris: video-codec@aa00000 {
+ compatible = "qcom,nord-iris", "qcom,glymur-iris";
+ reg = <0x0 0x0aa00000 0x0 0xf0000>;
+
+ clocks = <&nwgcc NW_GCC_VIDEO_AXI0_CLK>,
+ <&videocc VIDEO_CC_MVS0C_CLK>,
+ <&videocc VIDEO_CC_MVS0_CLK>,
+ <&nwgcc NW_GCC_VIDEO_AXI0C_CLK>,
+ <&videocc VIDEO_CC_MVS0C_FREERUN_CLK>,
+ <&videocc VIDEO_CC_MVS0_FREERUN_CLK>,
+ <&nwgcc NW_GCC_VIDEO_AXI1_CLK>,
+ <&videocc VIDEO_CC_MVS1_CLK>,
+ <&videocc VIDEO_CC_MVS1_FREERUN_CLK>;
+ clock-names = "core_iface",
+ "core",
+ "vcodec0_core",
+ "vcodec0_iface",
+ "core_freerun",
+ "vcodec0_core_freerun",
+ "vcodec1_iface",
+ "vcodec1_core",
+ "vcodec1_core_freerun";
+
+ dma-coherent;
+
+ interconnects = <&hscnoc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
+ &config_noc SLAVE_VENUS_CFG QCOM_ICC_TAG_ACTIVE_ONLY>,
+ <&mmss_noc MASTER_VIDEO_MVP0 QCOM_ICC_TAG_ALWAYS
+ &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>;
+ interconnect-names = "cpu-cfg",
+ "video-mem";
+
+ interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
+
+ memory-region = <&video_mem>;
+
+ operating-points-v2 = <&iris_opp_table>;
+
+ power-domains = <&videocc VIDEO_CC_MVS0C_GDSC>,
+ <&videocc VIDEO_CC_MVS0_GDSC>,
+ <&rpmhpd RPMHPD_MXC>,
+ <&rpmhpd RPMHPD_MMCX>,
+ <&videocc VIDEO_CC_MVS1_GDSC>;
+ power-domain-names = "venus",
+ "vcodec0",
+ "mxc",
+ "mmcx",
+ "vcodec1";
+
+ resets = <&nwgcc NW_GCC_VIDEO_AXI0_CLK_ARES>,
+ <&nwgcc NW_GCC_VIDEO_AXI0C_CLK_ARES>,
+ <&videocc VIDEO_CC_MVS0C_FREERUN_CLK_ARES>,
+ <&videocc VIDEO_CC_MVS0_FREERUN_CLK_ARES>,
+ <&nwgcc NW_GCC_VIDEO_AXI1_CLK_ARES>,
+ <&videocc VIDEO_CC_MVS1_FREERUN_CLK_ARES>;
+ reset-names = "core_bus",
+ "vcodec0_bus",
+ "core",
+ "vcodec0_core",
+ "vcodec1_bus",
+ "vcodec1_core";
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+ dma-ranges = <0x0 0x0 0x0 0xffe00000>;
+
+ status = "disabled";
+
+ non-pixel {
+ iommus = <&apps_smmu_1 0x0940 0x20>,
+ <&apps_smmu_1 0x0944 0x0>,
+ <&apps_smmu_1 0x0960 0x20>;
+ iommu-ranges = <0x25800000 0xda600000>;
+ };
+
+ pixel {
+ iommus = <&apps_smmu_1 0x0943 0x0>;
+ };
+
+ iris_opp_table: opp-table {
+ compatible = "operating-points-v2";
+
+ opp-240000000 {
+ opp-hz = /bits/ 64 <240000000 240000000 360000000>;
+ required-opps = <&rpmhpd_opp_svs>,
+ <&rpmhpd_opp_svs>;
+ };
+
+ opp-435000000 {
+ opp-hz = /bits/ 64 <435000000 435000000 652500000>;
+ required-opps = <&rpmhpd_opp_svs_l1>,
+ <&rpmhpd_opp_svs_l1>;
+ };
+
+ opp-480000000 {
+ opp-hz = /bits/ 64 <480000000 480000000 720000000>;
+ required-opps = <&rpmhpd_opp_svs_l1>,
+ <&rpmhpd_opp_nom>;
+ };
+
+ opp-533333333 {
+ opp-hz = /bits/ 64 <533333333 533333333 800000000>;
+ required-opps = <&rpmhpd_opp_svs_l1>,
+ <&rpmhpd_opp_turbo>;
+ };
+
+ opp-560000000 {
+ opp-hz = /bits/ 64 <560000000 560000000 840000000>;
+ required-opps = <&rpmhpd_opp_nom>,
+ <&rpmhpd_opp_turbo_l1>;
+ };
+ };
+ };
+
videocc: clock-controller@aaf0000 {
compatible = "qcom,nord-videocc";
reg = <0x0 0x0aaf0000 0x0 0x10000>;
--
2.34.1
^ permalink raw reply [flat|nested] 8+ messages in thread* Re: [PATCH 2/4] arm64: dts: qcom: nord: Add iris video node
2026-09-19 4:44 ` [PATCH 2/4] arm64: dts: qcom: nord: Add iris video node Vishnu Reddy
@ 2026-09-20 13:16 ` Shawn Guo
0 siblings, 0 replies; 8+ messages in thread
From: Shawn Guo @ 2026-09-20 13:16 UTC (permalink / raw)
To: Vishnu Reddy
Cc: Vikash Garodia, Dikshita Agarwal, Abhinav Kumar,
Bryan O'Donoghue, Mauro Carvalho Chehab, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Bjorn Andersson,
Konrad Dybcio, Abel Vesa, linux-media, linux-arm-msm, devicetree,
linux-kernel
On Sat, Sep 19, 2026 at 10:14:56AM +0530, Vishnu Reddy wrote:
> Add iris video codec to nord SoC, which comes with significantly different
> powering up sequence than previous platforms, thus different clocks and
> resets.
>
> Signed-off-by: Vishnu Reddy <busanna.reddy@oss.qualcomm.com>
> ---
> arch/arm64/boot/dts/qcom/nord-embedded.dtsi | 114 ++++++++++++++++++++++++++++
> 1 file changed, 114 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/nord-embedded.dtsi b/arch/arm64/boot/dts/qcom/nord-embedded.dtsi
> index 74f4e6be8652..03f827f3e5fc 100644
> --- a/arch/arm64/boot/dts/qcom/nord-embedded.dtsi
> +++ b/arch/arm64/boot/dts/qcom/nord-embedded.dtsi
> @@ -1428,6 +1428,120 @@ camcc: clock-controller@9ce0000 {
> #power-domain-cells = <1>;
> };
>
> + iris: video-codec@aa00000 {
> + compatible = "qcom,nord-iris", "qcom,glymur-iris";
> + reg = <0x0 0x0aa00000 0x0 0xf0000>;
nord-embedded.dtsi is a place to accommodate Nord Embedded variant
specific resource descriptions, like clock, regulator, pinctrl,
interconnect, power domain, PHY, etc. The rest of descriptions should
go to nord.dtsi, like reg, interrupts, iommu, dma, etc.
Shawn
> +
> + clocks = <&nwgcc NW_GCC_VIDEO_AXI0_CLK>,
> + <&videocc VIDEO_CC_MVS0C_CLK>,
> + <&videocc VIDEO_CC_MVS0_CLK>,
> + <&nwgcc NW_GCC_VIDEO_AXI0C_CLK>,
> + <&videocc VIDEO_CC_MVS0C_FREERUN_CLK>,
> + <&videocc VIDEO_CC_MVS0_FREERUN_CLK>,
> + <&nwgcc NW_GCC_VIDEO_AXI1_CLK>,
> + <&videocc VIDEO_CC_MVS1_CLK>,
> + <&videocc VIDEO_CC_MVS1_FREERUN_CLK>;
> + clock-names = "core_iface",
> + "core",
> + "vcodec0_core",
> + "vcodec0_iface",
> + "core_freerun",
> + "vcodec0_core_freerun",
> + "vcodec1_iface",
> + "vcodec1_core",
> + "vcodec1_core_freerun";
> +
> + dma-coherent;
> +
> + interconnects = <&hscnoc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
> + &config_noc SLAVE_VENUS_CFG QCOM_ICC_TAG_ACTIVE_ONLY>,
> + <&mmss_noc MASTER_VIDEO_MVP0 QCOM_ICC_TAG_ALWAYS
> + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>;
> + interconnect-names = "cpu-cfg",
> + "video-mem";
> +
> + interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
> +
> + memory-region = <&video_mem>;
> +
> + operating-points-v2 = <&iris_opp_table>;
> +
> + power-domains = <&videocc VIDEO_CC_MVS0C_GDSC>,
> + <&videocc VIDEO_CC_MVS0_GDSC>,
> + <&rpmhpd RPMHPD_MXC>,
> + <&rpmhpd RPMHPD_MMCX>,
> + <&videocc VIDEO_CC_MVS1_GDSC>;
> + power-domain-names = "venus",
> + "vcodec0",
> + "mxc",
> + "mmcx",
> + "vcodec1";
> +
> + resets = <&nwgcc NW_GCC_VIDEO_AXI0_CLK_ARES>,
> + <&nwgcc NW_GCC_VIDEO_AXI0C_CLK_ARES>,
> + <&videocc VIDEO_CC_MVS0C_FREERUN_CLK_ARES>,
> + <&videocc VIDEO_CC_MVS0_FREERUN_CLK_ARES>,
> + <&nwgcc NW_GCC_VIDEO_AXI1_CLK_ARES>,
> + <&videocc VIDEO_CC_MVS1_FREERUN_CLK_ARES>;
> + reset-names = "core_bus",
> + "vcodec0_bus",
> + "core",
> + "vcodec0_core",
> + "vcodec1_bus",
> + "vcodec1_core";
> +
> + #address-cells = <1>;
> + #size-cells = <1>;
> + dma-ranges = <0x0 0x0 0x0 0xffe00000>;
> +
> + status = "disabled";
> +
> + non-pixel {
> + iommus = <&apps_smmu_1 0x0940 0x20>,
> + <&apps_smmu_1 0x0944 0x0>,
> + <&apps_smmu_1 0x0960 0x20>;
> + iommu-ranges = <0x25800000 0xda600000>;
> + };
> +
> + pixel {
> + iommus = <&apps_smmu_1 0x0943 0x0>;
> + };
> +
> + iris_opp_table: opp-table {
> + compatible = "operating-points-v2";
> +
> + opp-240000000 {
> + opp-hz = /bits/ 64 <240000000 240000000 360000000>;
> + required-opps = <&rpmhpd_opp_svs>,
> + <&rpmhpd_opp_svs>;
> + };
> +
> + opp-435000000 {
> + opp-hz = /bits/ 64 <435000000 435000000 652500000>;
> + required-opps = <&rpmhpd_opp_svs_l1>,
> + <&rpmhpd_opp_svs_l1>;
> + };
> +
> + opp-480000000 {
> + opp-hz = /bits/ 64 <480000000 480000000 720000000>;
> + required-opps = <&rpmhpd_opp_svs_l1>,
> + <&rpmhpd_opp_nom>;
> + };
> +
> + opp-533333333 {
> + opp-hz = /bits/ 64 <533333333 533333333 800000000>;
> + required-opps = <&rpmhpd_opp_svs_l1>,
> + <&rpmhpd_opp_turbo>;
> + };
> +
> + opp-560000000 {
> + opp-hz = /bits/ 64 <560000000 560000000 840000000>;
> + required-opps = <&rpmhpd_opp_nom>,
> + <&rpmhpd_opp_turbo_l1>;
> + };
> + };
> + };
> +
> videocc: clock-controller@aaf0000 {
> compatible = "qcom,nord-videocc";
> reg = <0x0 0x0aaf0000 0x0 0x10000>;
>
> --
> 2.34.1
>
>
^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH 3/4] arm64: dts: qcom: nord-ride-embedded: Enable iris video codec node
2026-09-19 4:44 [PATCH 0/4] media: iris: Add support for nord platform Vishnu Reddy
2026-09-19 4:44 ` [PATCH 1/4] dt-bindings: media: qcom,nord-iris: Add nord video codec Vishnu Reddy
2026-09-19 4:44 ` [PATCH 2/4] arm64: dts: qcom: nord: Add iris video node Vishnu Reddy
@ 2026-09-19 4:44 ` Vishnu Reddy
2026-09-19 4:44 ` [PATCH 4/4] arm64: dts: qcom: nord-rrd: " Vishnu Reddy
2026-09-20 13:27 ` [PATCH 0/4] media: iris: Add support for nord platform Shawn Guo
4 siblings, 0 replies; 8+ messages in thread
From: Vishnu Reddy @ 2026-09-19 4:44 UTC (permalink / raw)
To: Vikash Garodia, Dikshita Agarwal, Abhinav Kumar,
Bryan O'Donoghue, Mauro Carvalho Chehab, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Bjorn Andersson,
Konrad Dybcio, Abel Vesa
Cc: linux-media, linux-arm-msm, devicetree, linux-kernel, Vishnu Reddy
The iris hardware block is described in the nord SoC DTSI, and enabling
it here allows the media iris driver to probe and use the video codec
functionality.
Signed-off-by: Vishnu Reddy <busanna.reddy@oss.qualcomm.com>
---
arch/arm64/boot/dts/qcom/nord-ride-embedded.dts | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/nord-ride-embedded.dts b/arch/arm64/boot/dts/qcom/nord-ride-embedded.dts
index 2ad26902ffe6..98dcf57652fe 100644
--- a/arch/arm64/boot/dts/qcom/nord-ride-embedded.dts
+++ b/arch/arm64/boot/dts/qcom/nord-ride-embedded.dts
@@ -442,6 +442,12 @@ &dp3_phy {
status = "okay";
};
+&iris {
+ firmware-name = "qcom/vpu/vpu36_p4_s7.mbn";
+
+ status = "okay";
+};
+
&mdss {
status = "okay";
};
--
2.34.1
^ permalink raw reply [flat|nested] 8+ messages in thread* [PATCH 4/4] arm64: dts: qcom: nord-rrd: Enable iris video codec node
2026-09-19 4:44 [PATCH 0/4] media: iris: Add support for nord platform Vishnu Reddy
` (2 preceding siblings ...)
2026-09-19 4:44 ` [PATCH 3/4] arm64: dts: qcom: nord-ride-embedded: Enable iris video codec node Vishnu Reddy
@ 2026-09-19 4:44 ` Vishnu Reddy
2026-09-20 13:27 ` [PATCH 0/4] media: iris: Add support for nord platform Shawn Guo
4 siblings, 0 replies; 8+ messages in thread
From: Vishnu Reddy @ 2026-09-19 4:44 UTC (permalink / raw)
To: Vikash Garodia, Dikshita Agarwal, Abhinav Kumar,
Bryan O'Donoghue, Mauro Carvalho Chehab, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Bjorn Andersson,
Konrad Dybcio, Abel Vesa
Cc: linux-media, linux-arm-msm, devicetree, linux-kernel, Vishnu Reddy
The iris hardware block is described in the nord SoC DTSI, and enabling
it here allows the media iris driver to probe and use the video codec
functionality.
Signed-off-by: Vishnu Reddy <busanna.reddy@oss.qualcomm.com>
---
arch/arm64/boot/dts/qcom/nord-rrd.dts | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/nord-rrd.dts b/arch/arm64/boot/dts/qcom/nord-rrd.dts
index 802987da3cfd..6e0b7a54523f 100644
--- a/arch/arm64/boot/dts/qcom/nord-rrd.dts
+++ b/arch/arm64/boot/dts/qcom/nord-rrd.dts
@@ -415,6 +415,12 @@ rtc@32 {
};
};
+&iris {
+ firmware-name = "qcom/vpu/vpu36_p4_s7.mbn";
+
+ status = "okay";
+};
+
&mdss {
status = "okay";
};
--
2.34.1
^ permalink raw reply [flat|nested] 8+ messages in thread* Re: [PATCH 0/4] media: iris: Add support for nord platform
2026-09-19 4:44 [PATCH 0/4] media: iris: Add support for nord platform Vishnu Reddy
` (3 preceding siblings ...)
2026-09-19 4:44 ` [PATCH 4/4] arm64: dts: qcom: nord-rrd: " Vishnu Reddy
@ 2026-09-20 13:27 ` Shawn Guo
4 siblings, 0 replies; 8+ messages in thread
From: Shawn Guo @ 2026-09-20 13:27 UTC (permalink / raw)
To: Vishnu Reddy
Cc: Vikash Garodia, Dikshita Agarwal, Abhinav Kumar,
Bryan O'Donoghue, Mauro Carvalho Chehab, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Bjorn Andersson,
Konrad Dybcio, Abel Vesa, linux-media, linux-arm-msm, devicetree,
linux-kernel
On Sat, Sep 19, 2026 at 10:14:54AM +0530, Vishnu Reddy wrote:
> The nord platform integrates the Qualcomm iris video codec hardware,
> which is compatible with the glymur based iris implementation.
>
> This series reuses the glymur DT schema to accommodate nord iris
> support and adds the required iris device tree node to the relevant
> nord device tree.
[...]
> Signed-off-by: Vishnu Reddy <busanna.reddy@oss.qualcomm.com>
> ---
> Vishnu Reddy (4):
> dt-bindings: media: qcom,nord-iris: Add nord video codec
> arm64: dts: qcom: nord: Add iris video node
> arm64: dts: qcom: nord-ride-embedded: Enable iris video codec node
> arm64: dts: qcom: nord-rrd: Enable iris video codec node
>
> .../bindings/media/qcom,glymur-iris.yaml | 6 +-
> arch/arm64/boot/dts/qcom/nord-embedded.dtsi | 114 +++++++++++++++++++++
> arch/arm64/boot/dts/qcom/nord-ride-embedded.dts | 6 ++
> arch/arm64/boot/dts/qcom/nord-rrd.dts | 6 ++
> 4 files changed, 131 insertions(+), 1 deletion(-)
> ---
> base-commit: 3f2425f5b5bbbdd991ca9cdfd5502e68d8895998
> change-id: 20260918-nord-iris-70b17cd16a77
> prerequisite-message-id: <20260903140617.441111-1-shengchao.guo@oss.qualcomm.com>
It's been agreed with Bjorn that the dependencies of a DTS series needs
to be explicitly called out in cover letter, something like what Nord
display DTS series does.
https://lore.kernel.org/all/20260920091930.2215803-1-shengchao.guo@oss.qualcomm.com/
> prerequisite-patch-id: 15b7e40d16abb923052d14832a468b832822e02c
> prerequisite-patch-id: a127e821eb3382d30c05fbcf8f3fb520263cbbc5
> prerequisite-patch-id: 2d52b8db1dca030ceb064f13dc912eb5478b7d63
> prerequisite-patch-id: d21f937c2939a84117e7f4e1473875412914f9a6
> prerequisite-patch-id: 97b755b1bb9cf6e3bd0b402bcec890161cad6868
> prerequisite-patch-id: 97f41c3ba82d7a7b866b35e7aced283e8d0f699e
> prerequisite-message-id: <20260911-nord-drv-dt-v1-0-e25c073cf1b6@oss.qualcomm.com>
We do not have to depend on display driver series, do we?
> prerequisite-patch-id: f8fbc6150e3c9173a58c51b21aa361b4bf427ff6
> prerequisite-patch-id: 914292456c91f83f83d078d3ed589e87ec1961ff
> prerequisite-patch-id: 8b04289460ffc81d540c383255e644eef8e7cf6b
> prerequisite-patch-id: bd8d5373421d6979f63ca6782dce3cfc8f7b8878
> prerequisite-patch-id: 5dcb5f0b6e62d524634f4876b33c0ef3482150ad
> prerequisite-patch-id: 4ec69028284b5b4f1d727d600ac81f9c91eed63e
> prerequisite-patch-id: 91d92d9d408bc5722e5eaa7f615269e64e459bd9
> prerequisite-patch-id: c7b1e7672798e47c66d645c14bec824b2eebed9a
> prerequisite-patch-id: 008c9c85a07687ae136b5cc62ad8aa2ea22fc2af
> prerequisite-patch-id: c90b7b7096decd328219c71689e95ffa4127e841
> prerequisite-patch-id: 112cc818078b668c3a08b8011a22cdaa3c965cf7
> prerequisite-patch-id: ae16d3341438d6d49a5d575f0e8d67465cee5d41
> prerequisite-patch-id: 521ccda14a5f47e8c231912e82ed32a4653e8805
> prerequisite-patch-id: a22fdd503289f80720b26f8244185226e0417115
> prerequisite-patch-id: a3dba98903fd87c5893422fbae7c376a77d44c30
> prerequisite-patch-id: 86e23f75f4b0f169e537ab6430cc33a2a4ad43a8
> prerequisite-patch-id: f93d80383550a3b1475356ddb725f3d6c2d25634
> prerequisite-message-id: <20260904081619.593602-1-shengchao.guo@oss.qualcomm.com>
> prerequisite-patch-id: d3621342d373b4e41ca0d0b9eb4648bf0187cf7b
> prerequisite-patch-id: e8b7e40ce305132672ca5d10063c1b20bfcc8361
> prerequisite-patch-id: 2d02f5f60554a49da2d030e507bb9a27ad99f092
> prerequisite-patch-id: 7c326dff78934f41e92cf662989b1d11fa670387
> prerequisite-patch-id: 7ad3809e9f6fe6fd47b95a7fd1dfc27fc290f457
> prerequisite-patch-id: cbaf2c4a49ef854d3f908de5d8871e9d49ce4a99
> prerequisite-message-id: <20260918013740.1355096-1-shengchao.guo@oss.qualcomm.com>
I have separated clock controller DTS change from display DTS series.
So the dependencies would be like:
- Clock DTS: https://lore.kernel.org/all/20260920081049.2183845-1-shengchao.guo@oss.qualcomm.com/
- Ride Embedded DTS: https://lore.kernel.org/all/20260920084920.2201418-1-shengchao.guo@oss.qualcomm.com/
Shawn
> prerequisite-patch-id: 654ba807f2ca53a3b580f4990c28fa35fa7fc4fa
> prerequisite-patch-id: c9f7632f7f31b1fe6e40c2df354d6047553ed967
> prerequisite-patch-id: 95df9bbc25e2f96c3bc8090543bceed0a31527a2
> prerequisite-patch-id: cb3907b10983b3a473cb01fbfde657114e468523
> prerequisite-message-id: <20260914-vpu_iommu_iova_handling-v4-0-9b9074a73c41@oss.qualcomm.com>
> prerequisite-patch-id: e1330b5a848460d14cd6574877fcf607d269d9a1
> prerequisite-patch-id: 20d099e89443a097b9ec5b297f0129d9874ca54b
> prerequisite-patch-id: 2a36ab03d78d8e9c19c900e203b05739a9fd1123
> prerequisite-patch-id: 9e326a273e052af2b63300dd20f2fd6cc78dd5ac
> prerequisite-patch-id: bb9ca73889bfca249029efb854fb1634a4360b5c
> prerequisite-patch-id: 9e71460e2d5f1e4e2993819f4d9fa27c076946f1
> prerequisite-patch-id: a2b127d41c7133ea30721a72eca01333334844f7
> prerequisite-patch-id: e34741f76b6919db19236ead27c966b789736e66
> prerequisite-patch-id: 359d24229ad496633892e70b1cf88c2d88dfad24
> prerequisite-patch-id: 6e2e9069cb620143aa305b7b29b8b1982dd0648b
> prerequisite-patch-id: 3e5fe6ef2271be5263a4bf7ffbd77b0996037b27
> prerequisite-patch-id: e051524017c9f39f8593fb9d2e982e6a4c39fb35
> prerequisite-patch-id: 1b4863f7a7f3a8390c825d76805e8e99de97a2a7
> prerequisite-message-id: <20260917-glymur-v11-0-e0c8bc914742@oss.qualcomm.com>
> prerequisite-patch-id: c790c17f7113da72001a1b83fa0dc0fb82e22760
> prerequisite-patch-id: 5a2f89fdc7312d46f01aeb1507c3d179203c1357
> prerequisite-patch-id: 1e1b6daab984b81b7ad83108fb532ea25345638d
> prerequisite-patch-id: dc22e163717edf23b847a79af253c6b85bec58dc
> prerequisite-patch-id: 2cc01cddaccf18ead1c1e2506f0182193afc1dcf
> prerequisite-patch-id: a1e82173cdbb9c315bb6cce35108a7a4057cb235
> prerequisite-patch-id: 4ed1c23d97cb438c917ab31f4193c58e3deeecda
> prerequisite-patch-id: facfccd32a2f70f2bae3357106a3fe493b4c8c32
> prerequisite-patch-id: 59bcb5096aef6258f4732dc8f8789c3e846e16c0
>
> Best regards,
> --
> Vishnu Reddy <busanna.reddy@oss.qualcomm.com>
>
>
^ permalink raw reply [flat|nested] 8+ messages in thread