[PATCH 00/11] x86/cpu: Centralize and standardize CPUID leaf naming

[PATCH 00/11] x86/cpu: Centralize and standardize CPUID leaf naming

[Dave Hansen]

I noticed that the MWAIT code was rather haphazard in how it deals
with CPUID leaf levels.  As a result, there were a ton of unnecessary
checks for ->cpuid_level.  It is truly the worst offender because
there's arch/x86, intel_idle and ACPI that want to poke at it.

Move several of the leaf definitions to one place (cpuid.h).  Use
the definitions to get rid of magic numbers.  Simplify the code
when the CPUID feature level dependencies can be used.  Lastly,
change all the leaf names to be consistent.

This does not get *ALL* the leaves.  The topology and cache ones
are left along for now, but they can also be converted over.

It's obviously right in the middle of the merge window, so no
rush on looking at this.  I just wanted to get it into everyone's
review queues.  Barring any big issues I'm planning to apply this
to one of the tip branches after -rc1 drops.

 arch/x86/events/intel/pt.c            |    5 +++--
 arch/x86/events/intel/pt.h            |    3 ---
 arch/x86/include/asm/cpuid.h          |    7 +++++++
 arch/x86/include/asm/fpu/xstate.h     |    4 ----
 arch/x86/include/asm/mwait.h          |    1 -
 arch/x86/kernel/acpi/cstate.c         |    5 +++--
 arch/x86/kernel/cpu/common.c          |    7 ++++---
 arch/x86/kernel/fpu/xstate.c          |   26 +++++++++++---------------
 arch/x86/kernel/hpet.c                |    6 ++----
 arch/x86/kernel/process.c             |    3 ++-
 arch/x86/kernel/smpboot.c             |    5 ++---
 arch/x86/kernel/tsc.c                 |   23 +++++++++++------------
 arch/x86/xen/enlighten_pv.c           |    5 +++--
 drivers/acpi/acpi_pad.c               |    5 ++---
 drivers/dma/ioat/dca.c                |    8 +++++---
 drivers/idle/intel_idle.c             |    6 ++----
 drivers/platform/x86/intel/pmc/core.c |    7 ++++---
 17 files changed, 61 insertions(+), 65 deletions(-)

[PATCH 01/11] x86/cpu: Move MWAIT leaf definition to common header

[Dave Hansen]

From: Dave Hansen <dave.hansen@linux.intel.com>

Begin constructing a common place to keep all CPUID leaf definitions.
Move CPUID_MWAIT_LEAF to the CPUID header and include it where
needed.

Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
---

 b/arch/x86/include/asm/cpuid.h  |    2 ++
 b/arch/x86/include/asm/mwait.h  |    1 -
 b/arch/x86/kernel/acpi/cstate.c |    1 +
 b/arch/x86/kernel/hpet.c        |    1 +
 b/arch/x86/kernel/process.c     |    1 +
 b/arch/x86/kernel/smpboot.c     |    1 +
 b/arch/x86/xen/enlighten_pv.c   |    1 +
 b/drivers/acpi/acpi_pad.c       |    1 +
 b/drivers/idle/intel_idle.c     |    1 +
 9 files changed, 9 insertions(+), 1 deletion(-)

diff -puN arch/x86/include/asm/cpuid.h~mwait-leaf-checks-0 arch/x86/include/asm/cpuid.h
--- a/arch/x86/include/asm/cpuid.h~mwait-leaf-checks-0	2024-11-20 11:44:15.481584146 -0800
+++ b/arch/x86/include/asm/cpuid.h	2024-11-20 11:44:15.497584759 -0800
@@ -19,6 +19,8 @@ enum cpuid_regs_idx {
 	CPUID_EDX,
 };
 
+#define CPUID_MWAIT_LEAF		5
+
 #ifdef CONFIG_X86_32
 extern int have_cpuid_p(void);
 #else
diff -puN arch/x86/include/asm/mwait.h~mwait-leaf-checks-0 arch/x86/include/asm/mwait.h
--- a/arch/x86/include/asm/mwait.h~mwait-leaf-checks-0	2024-11-20 11:44:15.481584146 -0800
+++ b/arch/x86/include/asm/mwait.h	2024-11-20 11:44:15.497584759 -0800
@@ -15,7 +15,6 @@
 #define MWAIT_HINT2SUBSTATE(hint)	((hint) & MWAIT_CSTATE_MASK)
 #define MWAIT_C1_SUBSTATE_MASK  0xf0
 
-#define CPUID_MWAIT_LEAF		5
 #define CPUID5_ECX_EXTENSIONS_SUPPORTED 0x1
 #define CPUID5_ECX_INTERRUPT_BREAK	0x2
 
diff -puN arch/x86/kernel/acpi/cstate.c~mwait-leaf-checks-0 arch/x86/kernel/acpi/cstate.c
--- a/arch/x86/kernel/acpi/cstate.c~mwait-leaf-checks-0	2024-11-20 11:44:15.485584299 -0800
+++ b/arch/x86/kernel/acpi/cstate.c	2024-11-20 11:44:15.497584759 -0800
@@ -13,6 +13,7 @@
 #include <linux/sched.h>
 
 #include <acpi/processor.h>
+#include <asm/cpuid.h>
 #include <asm/mwait.h>
 #include <asm/special_insns.h>
 
diff -puN arch/x86/kernel/hpet.c~mwait-leaf-checks-0 arch/x86/kernel/hpet.c
--- a/arch/x86/kernel/hpet.c~mwait-leaf-checks-0	2024-11-20 11:44:15.485584299 -0800
+++ b/arch/x86/kernel/hpet.c	2024-11-20 11:44:15.497584759 -0800
@@ -7,6 +7,7 @@
 #include <linux/cpu.h>
 #include <linux/irq.h>
 
+#include <asm/cpuid.h>
 #include <asm/irq_remapping.h>
 #include <asm/hpet.h>
 #include <asm/time.h>
diff -puN arch/x86/kernel/process.c~mwait-leaf-checks-0 arch/x86/kernel/process.c
--- a/arch/x86/kernel/process.c~mwait-leaf-checks-0	2024-11-20 11:44:15.489584453 -0800
+++ b/arch/x86/kernel/process.c	2024-11-20 11:44:15.497584759 -0800
@@ -30,6 +30,7 @@
 #include <linux/hw_breakpoint.h>
 #include <linux/entry-common.h>
 #include <asm/cpu.h>
+#include <asm/cpuid.h>
 #include <asm/apic.h>
 #include <linux/uaccess.h>
 #include <asm/mwait.h>
diff -puN arch/x86/kernel/smpboot.c~mwait-leaf-checks-0 arch/x86/kernel/smpboot.c
--- a/arch/x86/kernel/smpboot.c~mwait-leaf-checks-0	2024-11-20 11:44:15.489584453 -0800
+++ b/arch/x86/kernel/smpboot.c	2024-11-20 11:44:15.497584759 -0800
@@ -64,6 +64,7 @@
 
 #include <asm/acpi.h>
 #include <asm/cacheinfo.h>
+#include <asm/cpuid.h>
 #include <asm/desc.h>
 #include <asm/nmi.h>
 #include <asm/irq.h>
diff -puN arch/x86/xen/enlighten_pv.c~mwait-leaf-checks-0 arch/x86/xen/enlighten_pv.c
--- a/arch/x86/xen/enlighten_pv.c~mwait-leaf-checks-0	2024-11-20 11:44:15.489584453 -0800
+++ b/arch/x86/xen/enlighten_pv.c	2024-11-20 11:44:15.497584759 -0800
@@ -49,6 +49,7 @@
 #include <xen/hvc-console.h>
 #include <xen/acpi.h>
 
+#include <asm/cpuid.h>
 #include <asm/paravirt.h>
 #include <asm/apic.h>
 #include <asm/page.h>
diff -puN drivers/acpi/acpi_pad.c~mwait-leaf-checks-0 drivers/acpi/acpi_pad.c
--- a/drivers/acpi/acpi_pad.c~mwait-leaf-checks-0	2024-11-20 11:44:15.493584606 -0800
+++ b/drivers/acpi/acpi_pad.c	2024-11-20 11:44:15.497584759 -0800
@@ -19,6 +19,7 @@
 #include <linux/acpi.h>
 #include <linux/perf_event.h>
 #include <linux/platform_device.h>
+#include <asm/cpuid.h>
 #include <asm/mwait.h>
 #include <xen/xen.h>
 
diff -puN drivers/idle/intel_idle.c~mwait-leaf-checks-0 drivers/idle/intel_idle.c
--- a/drivers/idle/intel_idle.c~mwait-leaf-checks-0	2024-11-20 11:44:15.493584606 -0800
+++ b/drivers/idle/intel_idle.c	2024-11-20 11:44:15.497584759 -0800
@@ -51,6 +51,7 @@
 #include <linux/notifier.h>
 #include <linux/cpu.h>
 #include <linux/moduleparam.h>
+#include <asm/cpuid.h>
 #include <asm/cpu_device_id.h>
 #include <asm/intel-family.h>
 #include <asm/mwait.h>
_

[PATCH 02/11] x86/cpu: Use MWAIT leaf definition

[Dave Hansen]

From: Dave Hansen <dave.hansen@linux.intel.com>

The leaf-to-feature dependency array uses hard-coded leaf numbers.
Use the new common header definition for the MWAIT leaf.

Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
---

 b/arch/x86/kernel/cpu/common.c |    3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff -puN arch/x86/kernel/cpu/common.c~mwait-leaf-checks-1 arch/x86/kernel/cpu/common.c
--- a/arch/x86/kernel/cpu/common.c~mwait-leaf-checks-1	2024-11-20 11:44:16.169610481 -0800
+++ b/arch/x86/kernel/cpu/common.c	2024-11-20 11:44:16.169610481 -0800
@@ -29,6 +29,7 @@
 
 #include <asm/alternative.h>
 #include <asm/cmdline.h>
+#include <asm/cpuid.h>
 #include <asm/perf_event.h>
 #include <asm/mmu_context.h>
 #include <asm/doublefault.h>
@@ -637,7 +638,7 @@ struct cpuid_dependent_feature {
 
 static const struct cpuid_dependent_feature
 cpuid_dependent_features[] = {
-	{ X86_FEATURE_MWAIT,		0x00000005 },
+	{ X86_FEATURE_MWAIT,		CPUID_MWAIT_LEAF },
 	{ X86_FEATURE_DCA,		0x00000009 },
 	{ X86_FEATURE_XSAVE,		0x0000000d },
 	{ 0, 0 }
_

[PATCH 03/11] x86/cpu: Remove unnecessary MwAIT leaf checks

[Dave Hansen]

From: Dave Hansen <dave.hansen@linux.intel.com>

The CPUID leaf dependency checker will remove X86_FEATURE_MWAIT if
the CPUID level is below the required level (CPUID_MWAIT_LEAF).
Thus, if you check X86_FEATURE_MWAIT you do not need to also
check the CPUID level.

Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
---

 b/arch/x86/kernel/hpet.c    |    3 ---
 b/arch/x86/kernel/smpboot.c |    2 --
 b/drivers/acpi/acpi_pad.c   |    2 --
 b/drivers/idle/intel_idle.c |    3 ---
 4 files changed, 10 deletions(-)

diff -puN arch/x86/kernel/hpet.c~mwait-leaf-checks-2 arch/x86/kernel/hpet.c
--- a/arch/x86/kernel/hpet.c~mwait-leaf-checks-2	2024-11-20 11:44:16.665629466 -0800
+++ b/arch/x86/kernel/hpet.c	2024-11-20 11:44:16.673629773 -0800
@@ -928,9 +928,6 @@ static bool __init mwait_pc10_supported(
 	if (!cpu_feature_enabled(X86_FEATURE_MWAIT))
 		return false;
 
-	if (boot_cpu_data.cpuid_level < CPUID_MWAIT_LEAF)
-		return false;
-
 	cpuid(CPUID_MWAIT_LEAF, &eax, &ebx, &ecx, &mwait_substates);
 
 	return (ecx & CPUID5_ECX_EXTENSIONS_SUPPORTED) &&
diff -puN arch/x86/kernel/smpboot.c~mwait-leaf-checks-2 arch/x86/kernel/smpboot.c
--- a/arch/x86/kernel/smpboot.c~mwait-leaf-checks-2	2024-11-20 11:44:16.669629620 -0800
+++ b/arch/x86/kernel/smpboot.c	2024-11-20 11:44:16.673629773 -0800
@@ -1291,8 +1291,6 @@ static inline void mwait_play_dead(void)
 		return;
 	if (!this_cpu_has(X86_FEATURE_CLFLUSH))
 		return;
-	if (__this_cpu_read(cpu_info.cpuid_level) < CPUID_MWAIT_LEAF)
-		return;
 
 	eax = CPUID_MWAIT_LEAF;
 	ecx = 0;
diff -puN drivers/acpi/acpi_pad.c~mwait-leaf-checks-2 drivers/acpi/acpi_pad.c
--- a/drivers/acpi/acpi_pad.c~mwait-leaf-checks-2	2024-11-20 11:44:16.669629620 -0800
+++ b/drivers/acpi/acpi_pad.c	2024-11-20 11:44:16.673629773 -0800
@@ -47,8 +47,6 @@ static void power_saving_mwait_init(void
 
 	if (!boot_cpu_has(X86_FEATURE_MWAIT))
 		return;
-	if (boot_cpu_data.cpuid_level < CPUID_MWAIT_LEAF)
-		return;
 
 	cpuid(CPUID_MWAIT_LEAF, &eax, &ebx, &ecx, &edx);
 
diff -puN drivers/idle/intel_idle.c~mwait-leaf-checks-2 drivers/idle/intel_idle.c
--- a/drivers/idle/intel_idle.c~mwait-leaf-checks-2	2024-11-20 11:44:16.669629620 -0800
+++ b/drivers/idle/intel_idle.c	2024-11-20 11:44:16.673629773 -0800
@@ -2269,9 +2269,6 @@ static int __init intel_idle_init(void)
 			return -ENODEV;
 	}
 
-	if (boot_cpu_data.cpuid_level < CPUID_MWAIT_LEAF)
-		return -ENODEV;
-
 	cpuid(CPUID_MWAIT_LEAF, &eax, &ebx, &ecx, &mwait_substates);
 
 	if (!(ecx & CPUID5_ECX_EXTENSIONS_SUPPORTED) ||
_

[PATCH 04/11] x86/acpi: Check MWAIT feature instead of CPUID level

[Dave Hansen]

From: Dave Hansen <dave.hansen@linux.intel.com>

I think this code is possibly buggy.  The CPU could have a high
c->cpuid_level and not support MWAIT at all.  It is much more clear to
just check for MWAIT support directly.  Also, because of the CPU level
dependency code, any CPU that has X86_FEATURE_MWAIT also has a
high-enough CPUID level.

Check X86_FEATURE_MWAIT instead of the CPUID level.

Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
---

 b/arch/x86/kernel/acpi/cstate.c |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff -puN arch/x86/kernel/acpi/cstate.c~mwait-leaf-checks-3 arch/x86/kernel/acpi/cstate.c
--- a/arch/x86/kernel/acpi/cstate.c~mwait-leaf-checks-3	2024-11-20 11:44:17.225650902 -0800
+++ b/arch/x86/kernel/acpi/cstate.c	2024-11-20 11:44:17.225650902 -0800
@@ -173,7 +173,7 @@ int acpi_processor_ffh_cstate_probe(unsi
 	struct cpuinfo_x86 *c = &cpu_data(cpu);
 	long retval;
 
-	if (!cpu_cstate_entry || c->cpuid_level < CPUID_MWAIT_LEAF)
+	if (!cpu_cstate_entry || cpu_has(c, X86_FEATURE_MWAIT))
 		return -1;
 
 	if (reg->bit_offset != NATIVE_CSTATE_BEYOND_HALT)
_

[PATCH 05/11] x86/cpu: Refresh DCA leaf reading code

[Dave Hansen]

From: Dave Hansen <dave.hansen@linux.intel.com>

The DCA leaf number is also hard-coded in the CPUID level dependency
table. Move its definition to common code and use it.

While at it, fix up the naming and types in the probe code.  All
CPUID data is provided in 32-bit registers, not 'unsigned long'.
Also stop referring to "level_9".  Move away from test_bit()
because the type is no longer an 'unsigned long'.

Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
---

 b/arch/x86/include/asm/cpuid.h |    3 ++-
 b/arch/x86/kernel/cpu/common.c |    2 +-
 b/drivers/dma/ioat/dca.c       |    8 +++++---
 3 files changed, 8 insertions(+), 5 deletions(-)

diff -puN arch/x86/include/asm/cpuid.h~dca-leaf-checks-1 arch/x86/include/asm/cpuid.h
--- a/arch/x86/include/asm/cpuid.h~dca-leaf-checks-1	2024-11-20 11:44:17.721669887 -0800
+++ b/arch/x86/include/asm/cpuid.h	2024-11-20 11:44:17.725670041 -0800
@@ -19,7 +19,8 @@ enum cpuid_regs_idx {
 	CPUID_EDX,
 };
 
-#define CPUID_MWAIT_LEAF		5
+#define CPUID_MWAIT_LEAF	0x5
+#define CPUID_DCA_LEAF		0x9
 
 #ifdef CONFIG_X86_32
 extern int have_cpuid_p(void);
diff -puN arch/x86/kernel/cpu/common.c~dca-leaf-checks-1 arch/x86/kernel/cpu/common.c
--- a/arch/x86/kernel/cpu/common.c~dca-leaf-checks-1	2024-11-20 11:44:17.721669887 -0800
+++ b/arch/x86/kernel/cpu/common.c	2024-11-20 11:44:17.725670041 -0800
@@ -639,7 +639,7 @@ struct cpuid_dependent_feature {
 static const struct cpuid_dependent_feature
 cpuid_dependent_features[] = {
 	{ X86_FEATURE_MWAIT,		CPUID_MWAIT_LEAF },
-	{ X86_FEATURE_DCA,		0x00000009 },
+	{ X86_FEATURE_DCA,		CPUID_DCA_LEAF },
 	{ X86_FEATURE_XSAVE,		0x0000000d },
 	{ 0, 0 }
 };
diff -puN drivers/dma/ioat/dca.c~dca-leaf-checks-1 drivers/dma/ioat/dca.c
--- a/drivers/dma/ioat/dca.c~dca-leaf-checks-1	2024-11-20 11:44:17.721669887 -0800
+++ b/drivers/dma/ioat/dca.c	2024-11-20 11:44:17.725670041 -0800
@@ -10,6 +10,8 @@
 #include <linux/interrupt.h>
 #include <linux/dca.h>
 
+#include <asm/cpuid.h>
+
 /* either a kernel change is needed, or we need something like this in kernel */
 #ifndef CONFIG_SMP
 #include <asm/smp.h>
@@ -58,11 +60,11 @@ static int dca_enabled_in_bios(struct pc
 {
 	/* CPUID level 9 returns DCA configuration */
 	/* Bit 0 indicates DCA enabled by the BIOS */
-	unsigned long cpuid_level_9;
+	u32 eax;
 	int res;
 
-	cpuid_level_9 = cpuid_eax(9);
-	res = test_bit(0, &cpuid_level_9);
+	eax = cpuid_eax(CPUID_DCA_LEAF);
+	res = eax & BIT(0);
 	if (!res)
 		dev_dbg(&pdev->dev, "DCA is disabled in BIOS\n");
 
_

[PATCH 06/11] x86/cpu: Move TSC CPUID leaf definition

[Dave Hansen]

From: Dave Hansen <dave.hansen@linux.intel.com>

Prepare to use the TSC CPUID leaf definition more widely by moving
it to the common header.

Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
---

 b/arch/x86/events/intel/pt.c   |    1 +
 b/arch/x86/events/intel/pt.h   |    3 ---
 b/arch/x86/include/asm/cpuid.h |    1 +
 3 files changed, 2 insertions(+), 3 deletions(-)

diff -puN arch/x86/events/intel/pt.c~tsc-leaf-checks-1 arch/x86/events/intel/pt.c
--- a/arch/x86/events/intel/pt.c~tsc-leaf-checks-1	2024-11-20 11:44:18.257690404 -0800
+++ b/arch/x86/events/intel/pt.c	2024-11-20 11:44:18.265690710 -0800
@@ -18,6 +18,7 @@
 #include <linux/slab.h>
 #include <linux/device.h>
 
+#include <asm/cpuid.h>
 #include <asm/perf_event.h>
 #include <asm/insn.h>
 #include <asm/io.h>
diff -puN arch/x86/events/intel/pt.h~tsc-leaf-checks-1 arch/x86/events/intel/pt.h
--- a/arch/x86/events/intel/pt.h~tsc-leaf-checks-1	2024-11-20 11:44:18.257690404 -0800
+++ b/arch/x86/events/intel/pt.h	2024-11-20 11:44:18.265690710 -0800
@@ -37,9 +37,6 @@ struct topa_entry {
 	u64	rsvd4	: 12;
 };
 
-/* TSC to Core Crystal Clock Ratio */
-#define CPUID_TSC_LEAF		0x15
-
 struct pt_pmu {
 	struct pmu		pmu;
 	u32			caps[PT_CPUID_REGS_NUM * PT_CPUID_LEAVES];
diff -puN arch/x86/include/asm/cpuid.h~tsc-leaf-checks-1 arch/x86/include/asm/cpuid.h
--- a/arch/x86/include/asm/cpuid.h~tsc-leaf-checks-1	2024-11-20 11:44:18.261690557 -0800
+++ b/arch/x86/include/asm/cpuid.h	2024-11-20 11:44:18.265690710 -0800
@@ -21,6 +21,7 @@ enum cpuid_regs_idx {
 
 #define CPUID_MWAIT_LEAF	0x5
 #define CPUID_DCA_LEAF		0x9
+#define CPUID_TSC_LEAF		0x15
 
 #ifdef CONFIG_X86_32
 extern int have_cpuid_p(void);
_

[PATCH 07/11] x86/tsc: Move away from TSC leaf magic numbers

[Dave Hansen]

From: Dave Hansen <dave.hansen@linux.intel.com>

The TSC code has a bunch of hard-coded references to leaf 0x15.  Change
them over to the symbolic name.  Also zap the 'ART_CPUID_LEAF' definition.
It was a duplicate of 'CPUID_TSC_LEAF'.

Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
---

 b/arch/x86/kernel/tsc.c                 |   11 +++++------
 b/drivers/platform/x86/intel/pmc/core.c |    7 ++++---
 2 files changed, 9 insertions(+), 9 deletions(-)

diff -puN arch/x86/kernel/tsc.c~tsc-leaf-checks-2 arch/x86/kernel/tsc.c
--- a/arch/x86/kernel/tsc.c~tsc-leaf-checks-2	2024-11-20 11:44:18.789710767 -0800
+++ b/arch/x86/kernel/tsc.c	2024-11-20 11:44:18.793710919 -0800
@@ -16,6 +16,7 @@
 #include <linux/static_key.h>
 #include <linux/static_call.h>
 
+#include <asm/cpuid.h>
 #include <asm/hpet.h>
 #include <asm/timer.h>
 #include <asm/vgtod.h>
@@ -664,13 +665,13 @@ unsigned long native_calibrate_tsc(void)
 	if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL)
 		return 0;
 
-	if (boot_cpu_data.cpuid_level < 0x15)
+	if (boot_cpu_data.cpuid_level < CPUID_TSC_LEAF)
 		return 0;
 
 	eax_denominator = ebx_numerator = ecx_hz = edx = 0;
 
 	/* CPUID 15H TSC/Crystal ratio, plus optionally Crystal Hz */
-	cpuid(0x15, &eax_denominator, &ebx_numerator, &ecx_hz, &edx);
+	cpuid(CPUID_TSC_LEAF, &eax_denominator, &ebx_numerator, &ecx_hz, &edx);
 
 	if (ebx_numerator == 0 || eax_denominator == 0)
 		return 0;
@@ -1066,10 +1067,8 @@ core_initcall(cpufreq_register_tsc_scali
 
 #endif /* CONFIG_CPU_FREQ */
 
-#define ART_CPUID_LEAF (0x15)
 #define ART_MIN_DENOMINATOR (1)
 
-
 /*
  * If ART is present detect the numerator:denominator to convert to TSC
  */
@@ -1077,7 +1076,7 @@ static void __init detect_art(void)
 {
 	unsigned int unused;
 
-	if (boot_cpu_data.cpuid_level < ART_CPUID_LEAF)
+	if (boot_cpu_data.cpuid_level < CPUID_TSC_LEAF)
 		return;
 
 	/*
@@ -1090,7 +1089,7 @@ static void __init detect_art(void)
 	    tsc_async_resets)
 		return;
 
-	cpuid(ART_CPUID_LEAF, &art_base_clk.denominator,
+	cpuid(CPUID_TSC_LEAF, &art_base_clk.denominator,
 	      &art_base_clk.numerator, &art_base_clk.freq_khz, &unused);
 
 	art_base_clk.freq_khz /= KHZ;
diff -puN drivers/platform/x86/intel/pmc/core.c~tsc-leaf-checks-2 drivers/platform/x86/intel/pmc/core.c
--- a/drivers/platform/x86/intel/pmc/core.c~tsc-leaf-checks-2	2024-11-20 11:44:18.793710919 -0800
+++ b/drivers/platform/x86/intel/pmc/core.c	2024-11-20 11:44:18.793710919 -0800
@@ -22,6 +22,7 @@
 #include <linux/suspend.h>
 #include <linux/units.h>
 
+#include <asm/cpuid.h>
 #include <asm/cpu_device_id.h>
 #include <asm/intel-family.h>
 #include <asm/msr.h>
@@ -935,13 +936,13 @@ static unsigned int pmc_core_get_crystal
 {
 	unsigned int eax_denominator, ebx_numerator, ecx_hz, edx;
 
-	if (boot_cpu_data.cpuid_level < 0x15)
+	if (boot_cpu_data.cpuid_level < CPUID_TSC_LEAF)
 		return 0;
 
 	eax_denominator = ebx_numerator = ecx_hz = edx = 0;
 
-	/* CPUID 15H TSC/Crystal ratio, plus optionally Crystal Hz */
-	cpuid(0x15, &eax_denominator, &ebx_numerator, &ecx_hz, &edx);
+	/* TSC/Crystal ratio, plus optionally Crystal Hz */
+	cpuid(CPUID_TSC_LEAF, &eax_denominator, &ebx_numerator, &ecx_hz, &edx);
 
 	if (ebx_numerator == 0 || eax_denominator == 0)
 		return 0;
_

[PATCH 08/11] x86/tsc: Remove CPUID "frequency" leaf magic numbers.

[Dave Hansen]

From: Dave Hansen <dave.hansen@linux.intel.com>

All the code that reads the CPUID frequency information leaf hard-codes
a magic number.  Give it a symbolic name and use it.

Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
---

 b/arch/x86/include/asm/cpuid.h |    1 +
 b/arch/x86/kernel/tsc.c        |   12 ++++++------
 2 files changed, 7 insertions(+), 6 deletions(-)

diff -puN arch/x86/include/asm/cpuid.h~tsc-leaf-checks-3 arch/x86/include/asm/cpuid.h
--- a/arch/x86/include/asm/cpuid.h~tsc-leaf-checks-3	2024-11-20 11:44:19.301730364 -0800
+++ b/arch/x86/include/asm/cpuid.h	2024-11-20 11:44:19.305730518 -0800
@@ -22,6 +22,7 @@ enum cpuid_regs_idx {
 #define CPUID_MWAIT_LEAF	0x5
 #define CPUID_DCA_LEAF		0x9
 #define CPUID_TSC_LEAF		0x15
+#define CPUID_FREQ_LEAF		0x16
 
 #ifdef CONFIG_X86_32
 extern int have_cpuid_p(void);
diff -puN arch/x86/kernel/tsc.c~tsc-leaf-checks-3 arch/x86/kernel/tsc.c
--- a/arch/x86/kernel/tsc.c~tsc-leaf-checks-3	2024-11-20 11:44:19.305730518 -0800
+++ b/arch/x86/kernel/tsc.c	2024-11-20 11:44:19.305730518 -0800
@@ -680,8 +680,8 @@ unsigned long native_calibrate_tsc(void)
 
 	/*
 	 * Denverton SoCs don't report crystal clock, and also don't support
-	 * CPUID.0x16 for the calculation below, so hardcode the 25MHz crystal
-	 * clock.
+	 * CPUID_FREQ_LEAF for the calculation below, so hardcode the 25MHz
+	 * crystal clock.
 	 */
 	if (crystal_khz == 0 &&
 			boot_cpu_data.x86_vfm == INTEL_ATOM_GOLDMONT_D)
@@ -700,10 +700,10 @@ unsigned long native_calibrate_tsc(void)
 	 * clock, but we can easily calculate it to a high degree of accuracy
 	 * by considering the crystal ratio and the CPU speed.
 	 */
-	if (crystal_khz == 0 && boot_cpu_data.cpuid_level >= 0x16) {
+	if (crystal_khz == 0 && boot_cpu_data.cpuid_level >= CPUID_FREQ_LEAF) {
 		unsigned int eax_base_mhz, ebx, ecx, edx;
 
-		cpuid(0x16, &eax_base_mhz, &ebx, &ecx, &edx);
+		cpuid(CPUID_FREQ_LEAF, &eax_base_mhz, &ebx, &ecx, &edx);
 		crystal_khz = eax_base_mhz * 1000 *
 			eax_denominator / ebx_numerator;
 	}
@@ -738,12 +738,12 @@ static unsigned long cpu_khz_from_cpuid(
 	if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL)
 		return 0;
 
-	if (boot_cpu_data.cpuid_level < 0x16)
+	if (boot_cpu_data.cpuid_level < CPUID_FREQ_LEAF)
 		return 0;
 
 	eax_base_mhz = ebx_max_mhz = ecx_bus_mhz = edx = 0;
 
-	cpuid(0x16, &eax_base_mhz, &ebx_max_mhz, &ecx_bus_mhz, &edx);
+	cpuid(CPUID_FREQ_LEAF, &eax_base_mhz, &ebx_max_mhz, &ecx_bus_mhz, &edx);
 
 	return eax_base_mhz * 1000;
 }
_

[PATCH 09/11] x86/fpu: Move CPUID leaf definitions to common code

[Dave Hansen]

From: Dave Hansen <dave.hansen@linux.intel.com>

Move the XSAVE-related CPUID leaf definitions to common code.  Then,
use the new definition to remove the last magic number from the CPUID
level dependency table.

Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
---

 b/arch/x86/include/asm/cpuid.h      |    2 ++
 b/arch/x86/include/asm/fpu/xstate.h |    4 ----
 b/arch/x86/kernel/cpu/common.c      |    2 +-
 b/arch/x86/kernel/fpu/xstate.c      |    1 +
 4 files changed, 4 insertions(+), 5 deletions(-)

diff -puN arch/x86/include/asm/cpuid.h~xsave-leaf-checks-1 arch/x86/include/asm/cpuid.h
--- a/arch/x86/include/asm/cpuid.h~xsave-leaf-checks-1	2024-11-20 11:44:19.817750116 -0800
+++ b/arch/x86/include/asm/cpuid.h	2024-11-20 11:44:19.825750422 -0800
@@ -21,8 +21,10 @@ enum cpuid_regs_idx {
 
 #define CPUID_MWAIT_LEAF	0x5
 #define CPUID_DCA_LEAF		0x9
+#define XSTATE_CPUID		0x0d
 #define CPUID_TSC_LEAF		0x15
 #define CPUID_FREQ_LEAF		0x16
+#define TILE_CPUID		0x1d
 
 #ifdef CONFIG_X86_32
 extern int have_cpuid_p(void);
diff -puN arch/x86/include/asm/fpu/xstate.h~xsave-leaf-checks-1 arch/x86/include/asm/fpu/xstate.h
--- a/arch/x86/include/asm/fpu/xstate.h~xsave-leaf-checks-1	2024-11-20 11:44:19.817750116 -0800
+++ b/arch/x86/include/asm/fpu/xstate.h	2024-11-20 11:44:19.825750422 -0800
@@ -12,10 +12,6 @@
 /* Bit 63 of XCR0 is reserved for future expansion */
 #define XFEATURE_MASK_EXTEND	(~(XFEATURE_MASK_FPSSE | (1ULL << 63)))
 
-#define XSTATE_CPUID		0x0000000d
-
-#define TILE_CPUID		0x0000001d
-
 #define FXSAVE_SIZE	512
 
 #define XSAVE_HDR_SIZE	    64
diff -puN arch/x86/kernel/cpu/common.c~xsave-leaf-checks-1 arch/x86/kernel/cpu/common.c
--- a/arch/x86/kernel/cpu/common.c~xsave-leaf-checks-1	2024-11-20 11:44:19.821750269 -0800
+++ b/arch/x86/kernel/cpu/common.c	2024-11-20 11:44:19.825750422 -0800
@@ -640,7 +640,7 @@ static const struct cpuid_dependent_feat
 cpuid_dependent_features[] = {
 	{ X86_FEATURE_MWAIT,		CPUID_MWAIT_LEAF },
 	{ X86_FEATURE_DCA,		CPUID_DCA_LEAF },
-	{ X86_FEATURE_XSAVE,		0x0000000d },
+	{ X86_FEATURE_XSAVE,		XSTATE_CPUID },
 	{ 0, 0 }
 };
 
diff -puN arch/x86/kernel/fpu/xstate.c~xsave-leaf-checks-1 arch/x86/kernel/fpu/xstate.c
--- a/arch/x86/kernel/fpu/xstate.c~xsave-leaf-checks-1	2024-11-20 11:44:19.821750269 -0800
+++ b/arch/x86/kernel/fpu/xstate.c	2024-11-20 11:44:19.825750422 -0800
@@ -20,6 +20,7 @@
 #include <asm/fpu/signal.h>
 #include <asm/fpu/xcr.h>
 
+#include <asm/cpuid.h>
 #include <asm/tlbflush.h>
 #include <asm/prctl.h>
 #include <asm/elf.h>
_

[PATCH 10/11] x86/fpu: Remove unnecessary CPUID level check

[Dave Hansen]

From: Dave Hansen <dave.hansen@linux.intel.com>

The CPUID level dependency table will entirely zap X86_FEATURE_XSAVE
if the CPUID level is too low.  This code is unreachable.  Kill it.

Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
---

 b/arch/x86/kernel/fpu/xstate.c |    5 -----
 1 file changed, 5 deletions(-)

diff -puN arch/x86/kernel/fpu/xstate.c~xsave-leaf-checks-2 arch/x86/kernel/fpu/xstate.c
--- a/arch/x86/kernel/fpu/xstate.c~xsave-leaf-checks-2	2024-11-20 11:44:20.369771244 -0800
+++ b/arch/x86/kernel/fpu/xstate.c	2024-11-20 11:44:20.373771397 -0800
@@ -764,11 +764,6 @@ void __init fpu__init_system_xstate(unsi
 		return;
 	}
 
-	if (boot_cpu_data.cpuid_level < XSTATE_CPUID) {
-		WARN_ON_FPU(1);
-		return;
-	}
-
 	/*
 	 * Find user xstates supported by the processor.
 	 */
_

[PATCH 11/11] x86/cpu: Make all all CPUID leaf names consistent

[Dave Hansen]

From: Dave Hansen <dave.hansen@linux.intel.com>

The leaf names are not consistent.  Give them all a CPUID_LEAF_ prefix
for consistency and vertical alignment.

Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
---

 b/arch/x86/events/intel/pt.c            |    4 ++--
 b/arch/x86/include/asm/cpuid.h          |   12 ++++++------
 b/arch/x86/kernel/acpi/cstate.c         |    2 +-
 b/arch/x86/kernel/cpu/common.c          |    6 +++---
 b/arch/x86/kernel/fpu/xstate.c          |   20 ++++++++++----------
 b/arch/x86/kernel/hpet.c                |    2 +-
 b/arch/x86/kernel/process.c             |    2 +-
 b/arch/x86/kernel/smpboot.c             |    2 +-
 b/arch/x86/kernel/tsc.c                 |   18 +++++++++---------
 b/arch/x86/xen/enlighten_pv.c           |    4 ++--
 b/drivers/acpi/acpi_pad.c               |    2 +-
 b/drivers/dma/ioat/dca.c                |    2 +-
 b/drivers/idle/intel_idle.c             |    2 +-
 b/drivers/platform/x86/intel/pmc/core.c |    4 ++--
 14 files changed, 41 insertions(+), 41 deletions(-)

diff -puN arch/x86/events/intel/pt.c~xsave-leaf-checks-3 arch/x86/events/intel/pt.c
--- a/arch/x86/events/intel/pt.c~xsave-leaf-checks-3	2024-11-20 11:44:20.873790535 -0800
+++ b/arch/x86/events/intel/pt.c	2024-11-20 11:44:20.897791454 -0800
@@ -202,10 +202,10 @@ static int __init pt_pmu_hw_init(void)
 	 * otherwise, zero for numerator stands for "not enumerated"
 	 * as per SDM
 	 */
-	if (boot_cpu_data.cpuid_level >= CPUID_TSC_LEAF) {
+	if (boot_cpu_data.cpuid_level >= CPUID_LEAF_TSC) {
 		u32 eax, ebx, ecx, edx;
 
-		cpuid(CPUID_TSC_LEAF, &eax, &ebx, &ecx, &edx);
+		cpuid(CPUID_LEAF_TSC, &eax, &ebx, &ecx, &edx);
 
 		pt_pmu.tsc_art_num = ebx;
 		pt_pmu.tsc_art_den = eax;
diff -puN arch/x86/include/asm/cpuid.h~xsave-leaf-checks-3 arch/x86/include/asm/cpuid.h
--- a/arch/x86/include/asm/cpuid.h~xsave-leaf-checks-3	2024-11-20 11:44:20.873790535 -0800
+++ b/arch/x86/include/asm/cpuid.h	2024-11-20 11:44:20.897791454 -0800
@@ -19,12 +19,12 @@ enum cpuid_regs_idx {
 	CPUID_EDX,
 };
 
-#define CPUID_MWAIT_LEAF	0x5
-#define CPUID_DCA_LEAF		0x9
-#define XSTATE_CPUID		0x0d
-#define CPUID_TSC_LEAF		0x15
-#define CPUID_FREQ_LEAF		0x16
-#define TILE_CPUID		0x1d
+#define CPUID_LEAF_MWAIT	0x5
+#define CPUID_LEAF_DCA		0x9
+#define CPUID_LEAF_XSTATE	0x0d
+#define CPUID_LEAF_TSC		0x15
+#define CPUID_LEAF_FREQ		0x16
+#define CPUID_LEAF_TILE		0x1d
 
 #ifdef CONFIG_X86_32
 extern int have_cpuid_p(void);
diff -puN arch/x86/kernel/acpi/cstate.c~xsave-leaf-checks-3 arch/x86/kernel/acpi/cstate.c
--- a/arch/x86/kernel/acpi/cstate.c~xsave-leaf-checks-3	2024-11-20 11:44:20.877790688 -0800
+++ b/arch/x86/kernel/acpi/cstate.c	2024-11-20 11:44:20.897791454 -0800
@@ -129,7 +129,7 @@ static long acpi_processor_ffh_cstate_pr
 	unsigned int cstate_type; /* C-state type and not ACPI C-state type */
 	unsigned int num_cstate_subtype;
 
-	cpuid(CPUID_MWAIT_LEAF, &eax, &ebx, &ecx, &edx);
+	cpuid(CPUID_LEAF_MWAIT, &eax, &ebx, &ecx, &edx);
 
 	/* Check whether this particular cx_type (in CST) is supported or not */
 	cstate_type = (((cx->address >> MWAIT_SUBSTATE_SIZE) &
diff -puN arch/x86/kernel/cpu/common.c~xsave-leaf-checks-3 arch/x86/kernel/cpu/common.c
--- a/arch/x86/kernel/cpu/common.c~xsave-leaf-checks-3	2024-11-20 11:44:20.877790688 -0800
+++ b/arch/x86/kernel/cpu/common.c	2024-11-20 11:44:20.897791454 -0800
@@ -638,9 +638,9 @@ struct cpuid_dependent_feature {
 
 static const struct cpuid_dependent_feature
 cpuid_dependent_features[] = {
-	{ X86_FEATURE_MWAIT,		CPUID_MWAIT_LEAF },
-	{ X86_FEATURE_DCA,		CPUID_DCA_LEAF },
-	{ X86_FEATURE_XSAVE,		XSTATE_CPUID },
+	{ X86_FEATURE_MWAIT,		CPUID_LEAF_MWAIT },
+	{ X86_FEATURE_DCA,		CPUID_LEAF_DCA },
+	{ X86_FEATURE_XSAVE,		CPUID_LEAF_XSTATE },
 	{ 0, 0 }
 };
 
diff -puN arch/x86/kernel/fpu/xstate.c~xsave-leaf-checks-3 arch/x86/kernel/fpu/xstate.c
--- a/arch/x86/kernel/fpu/xstate.c~xsave-leaf-checks-3	2024-11-20 11:44:20.881790840 -0800
+++ b/arch/x86/kernel/fpu/xstate.c	2024-11-20 11:44:20.897791454 -0800
@@ -233,7 +233,7 @@ static void __init setup_xstate_cache(vo
 						       xmm_space);
 
 	for_each_extended_xfeature(i, fpu_kernel_cfg.max_features) {
-		cpuid_count(XSTATE_CPUID, i, &eax, &ebx, &ecx, &edx);
+		cpuid_count(CPUID_LEAF_XSTATE, i, &eax, &ebx, &ecx, &edx);
 
 		xstate_sizes[i] = eax;
 		xstate_flags[i] = ecx;
@@ -399,7 +399,7 @@ int xfeature_size(int xfeature_nr)
 	u32 eax, ebx, ecx, edx;
 
 	CHECK_XFEATURE(xfeature_nr);
-	cpuid_count(XSTATE_CPUID, xfeature_nr, &eax, &ebx, &ecx, &edx);
+	cpuid_count(CPUID_LEAF_XSTATE, xfeature_nr, &eax, &ebx, &ecx, &edx);
 	return eax;
 }
 
@@ -442,9 +442,9 @@ static void __init __xstate_dump_leaves(
 	 * just in case there are some goodies up there
 	 */
 	for (i = 0; i < XFEATURE_MAX + 10; i++) {
-		cpuid_count(XSTATE_CPUID, i, &eax, &ebx, &ecx, &edx);
+		cpuid_count(CPUID_LEAF_XSTATE, i, &eax, &ebx, &ecx, &edx);
 		pr_warn("CPUID[%02x, %02x]: eax=%08x ebx=%08x ecx=%08x edx=%08x\n",
-			XSTATE_CPUID, i, eax, ebx, ecx, edx);
+			CPUID_LEAF_XSTATE, i, eax, ebx, ecx, edx);
 	}
 }
 
@@ -485,7 +485,7 @@ static int __init check_xtile_data_again
 	 * Check the maximum palette id:
 	 *   eax: the highest numbered palette subleaf.
 	 */
-	cpuid_count(TILE_CPUID, 0, &max_palid, &ebx, &ecx, &edx);
+	cpuid_count(CPUID_LEAF_TILE, 0, &max_palid, &ebx, &ecx, &edx);
 
 	/*
 	 * Cross-check each tile size and find the maximum number of
@@ -499,7 +499,7 @@ static int __init check_xtile_data_again
 		 *   eax[31:16]:  bytes per title
 		 *   ebx[31:16]:  the max names (or max number of tiles)
 		 */
-		cpuid_count(TILE_CPUID, palid, &eax, &ebx, &edx, &edx);
+		cpuid_count(CPUID_LEAF_TILE, palid, &eax, &ebx, &edx, &edx);
 		tile_size = eax >> 16;
 		max = ebx >> 16;
 
@@ -634,7 +634,7 @@ static unsigned int __init get_compacted
 	 * are no supervisor states, but XSAVEC still uses compacted
 	 * format.
 	 */
-	cpuid_count(XSTATE_CPUID, 1, &eax, &ebx, &ecx, &edx);
+	cpuid_count(CPUID_LEAF_XSTATE, 1, &eax, &ebx, &ecx, &edx);
 	return ebx;
 }
 
@@ -675,7 +675,7 @@ static unsigned int __init get_xsave_siz
 	 *    containing all the *user* state components
 	 *    corresponding to bits currently set in XCR0.
 	 */
-	cpuid_count(XSTATE_CPUID, 0, &eax, &ebx, &ecx, &edx);
+	cpuid_count(CPUID_LEAF_XSTATE, 0, &eax, &ebx, &ecx, &edx);
 	return ebx;
 }
 
@@ -767,13 +767,13 @@ void __init fpu__init_system_xstate(unsi
 	/*
 	 * Find user xstates supported by the processor.
 	 */
-	cpuid_count(XSTATE_CPUID, 0, &eax, &ebx, &ecx, &edx);
+	cpuid_count(CPUID_LEAF_XSTATE, 0, &eax, &ebx, &ecx, &edx);
 	fpu_kernel_cfg.max_features = eax + ((u64)edx << 32);
 
 	/*
 	 * Find supervisor xstates supported by the processor.
 	 */
-	cpuid_count(XSTATE_CPUID, 1, &eax, &ebx, &ecx, &edx);
+	cpuid_count(CPUID_LEAF_XSTATE, 1, &eax, &ebx, &ecx, &edx);
 	fpu_kernel_cfg.max_features |= ecx + ((u64)edx << 32);
 
 	if ((fpu_kernel_cfg.max_features & XFEATURE_MASK_FPSSE) != XFEATURE_MASK_FPSSE) {
diff -puN arch/x86/kernel/hpet.c~xsave-leaf-checks-3 arch/x86/kernel/hpet.c
--- a/arch/x86/kernel/hpet.c~xsave-leaf-checks-3	2024-11-20 11:44:20.881790840 -0800
+++ b/arch/x86/kernel/hpet.c	2024-11-20 11:44:20.897791454 -0800
@@ -928,7 +928,7 @@ static bool __init mwait_pc10_supported(
 	if (!cpu_feature_enabled(X86_FEATURE_MWAIT))
 		return false;
 
-	cpuid(CPUID_MWAIT_LEAF, &eax, &ebx, &ecx, &mwait_substates);
+	cpuid(CPUID_LEAF_MWAIT, &eax, &ebx, &ecx, &mwait_substates);
 
 	return (ecx & CPUID5_ECX_EXTENSIONS_SUPPORTED) &&
 	       (ecx & CPUID5_ECX_INTERRUPT_BREAK) &&
diff -puN arch/x86/kernel/process.c~xsave-leaf-checks-3 arch/x86/kernel/process.c
--- a/arch/x86/kernel/process.c~xsave-leaf-checks-3	2024-11-20 11:44:20.881790840 -0800
+++ b/arch/x86/kernel/process.c	2024-11-20 11:44:20.897791454 -0800
@@ -878,7 +878,7 @@ static __init bool prefer_mwait_c1_over_
 	if (boot_cpu_has_bug(X86_BUG_MONITOR) || boot_cpu_has_bug(X86_BUG_AMD_APIC_C1E))
 		return false;
 
-	cpuid(CPUID_MWAIT_LEAF, &eax, &ebx, &ecx, &edx);
+	cpuid(CPUID_LEAF_MWAIT, &eax, &ebx, &ecx, &edx);
 
 	/*
 	 * If MWAIT extensions are not available, it is safe to use MWAIT
diff -puN arch/x86/kernel/smpboot.c~xsave-leaf-checks-3 arch/x86/kernel/smpboot.c
--- a/arch/x86/kernel/smpboot.c~xsave-leaf-checks-3	2024-11-20 11:44:20.885790995 -0800
+++ b/arch/x86/kernel/smpboot.c	2024-11-20 11:44:20.897791454 -0800
@@ -1292,7 +1292,7 @@ static inline void mwait_play_dead(void)
 	if (!this_cpu_has(X86_FEATURE_CLFLUSH))
 		return;
 
-	eax = CPUID_MWAIT_LEAF;
+	eax = CPUID_LEAF_MWAIT;
 	ecx = 0;
 	native_cpuid(&eax, &ebx, &ecx, &edx);
 
diff -puN arch/x86/kernel/tsc.c~xsave-leaf-checks-3 arch/x86/kernel/tsc.c
--- a/arch/x86/kernel/tsc.c~xsave-leaf-checks-3	2024-11-20 11:44:20.885790995 -0800
+++ b/arch/x86/kernel/tsc.c	2024-11-20 11:44:20.901791607 -0800
@@ -665,13 +665,13 @@ unsigned long native_calibrate_tsc(void)
 	if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL)
 		return 0;
 
-	if (boot_cpu_data.cpuid_level < CPUID_TSC_LEAF)
+	if (boot_cpu_data.cpuid_level < CPUID_LEAF_TSC)
 		return 0;
 
 	eax_denominator = ebx_numerator = ecx_hz = edx = 0;
 
 	/* CPUID 15H TSC/Crystal ratio, plus optionally Crystal Hz */
-	cpuid(CPUID_TSC_LEAF, &eax_denominator, &ebx_numerator, &ecx_hz, &edx);
+	cpuid(CPUID_LEAF_TSC, &eax_denominator, &ebx_numerator, &ecx_hz, &edx);
 
 	if (ebx_numerator == 0 || eax_denominator == 0)
 		return 0;
@@ -680,7 +680,7 @@ unsigned long native_calibrate_tsc(void)
 
 	/*
 	 * Denverton SoCs don't report crystal clock, and also don't support
-	 * CPUID_FREQ_LEAF for the calculation below, so hardcode the 25MHz
+	 * CPUID_LEAF_FREQ for the calculation below, so hardcode the 25MHz
 	 * crystal clock.
 	 */
 	if (crystal_khz == 0 &&
@@ -700,10 +700,10 @@ unsigned long native_calibrate_tsc(void)
 	 * clock, but we can easily calculate it to a high degree of accuracy
 	 * by considering the crystal ratio and the CPU speed.
 	 */
-	if (crystal_khz == 0 && boot_cpu_data.cpuid_level >= CPUID_FREQ_LEAF) {
+	if (crystal_khz == 0 && boot_cpu_data.cpuid_level >= CPUID_LEAF_FREQ) {
 		unsigned int eax_base_mhz, ebx, ecx, edx;
 
-		cpuid(CPUID_FREQ_LEAF, &eax_base_mhz, &ebx, &ecx, &edx);
+		cpuid(CPUID_LEAF_FREQ, &eax_base_mhz, &ebx, &ecx, &edx);
 		crystal_khz = eax_base_mhz * 1000 *
 			eax_denominator / ebx_numerator;
 	}
@@ -738,12 +738,12 @@ static unsigned long cpu_khz_from_cpuid(
 	if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL)
 		return 0;
 
-	if (boot_cpu_data.cpuid_level < CPUID_FREQ_LEAF)
+	if (boot_cpu_data.cpuid_level < CPUID_LEAF_FREQ)
 		return 0;
 
 	eax_base_mhz = ebx_max_mhz = ecx_bus_mhz = edx = 0;
 
-	cpuid(CPUID_FREQ_LEAF, &eax_base_mhz, &ebx_max_mhz, &ecx_bus_mhz, &edx);
+	cpuid(CPUID_LEAF_FREQ, &eax_base_mhz, &ebx_max_mhz, &ecx_bus_mhz, &edx);
 
 	return eax_base_mhz * 1000;
 }
@@ -1076,7 +1076,7 @@ static void __init detect_art(void)
 {
 	unsigned int unused;
 
-	if (boot_cpu_data.cpuid_level < CPUID_TSC_LEAF)
+	if (boot_cpu_data.cpuid_level < CPUID_LEAF_TSC)
 		return;
 
 	/*
@@ -1089,7 +1089,7 @@ static void __init detect_art(void)
 	    tsc_async_resets)
 		return;
 
-	cpuid(CPUID_TSC_LEAF, &art_base_clk.denominator,
+	cpuid(CPUID_LEAF_TSC, &art_base_clk.denominator,
 	      &art_base_clk.numerator, &art_base_clk.freq_khz, &unused);
 
 	art_base_clk.freq_khz /= KHZ;
diff -puN arch/x86/xen/enlighten_pv.c~xsave-leaf-checks-3 arch/x86/xen/enlighten_pv.c
--- a/arch/x86/xen/enlighten_pv.c~xsave-leaf-checks-3	2024-11-20 11:44:20.889791148 -0800
+++ b/arch/x86/xen/enlighten_pv.c	2024-11-20 11:44:20.901791607 -0800
@@ -231,7 +231,7 @@ static void xen_cpuid(unsigned int *ax,
 		or_ebx = smp_processor_id() << 24;
 		break;
 
-	case CPUID_MWAIT_LEAF:
+	case CPUID_LEAF_MWAIT:
 		/* Synthesize the values.. */
 		*ax = 0;
 		*bx = 0;
@@ -301,7 +301,7 @@ static bool __init xen_check_mwait(void)
 	 * ecx and edx. The hypercall provides only partial information.
 	 */
 
-	ax = CPUID_MWAIT_LEAF;
+	ax = CPUID_LEAF_MWAIT;
 	bx = 0;
 	cx = 0;
 	dx = 0;
diff -puN drivers/acpi/acpi_pad.c~xsave-leaf-checks-3 drivers/acpi/acpi_pad.c
--- a/drivers/acpi/acpi_pad.c~xsave-leaf-checks-3	2024-11-20 11:44:20.889791148 -0800
+++ b/drivers/acpi/acpi_pad.c	2024-11-20 11:44:20.901791607 -0800
@@ -48,7 +48,7 @@ static void power_saving_mwait_init(void
 	if (!boot_cpu_has(X86_FEATURE_MWAIT))
 		return;
 
-	cpuid(CPUID_MWAIT_LEAF, &eax, &ebx, &ecx, &edx);
+	cpuid(CPUID_LEAF_MWAIT, &eax, &ebx, &ecx, &edx);
 
 	if (!(ecx & CPUID5_ECX_EXTENSIONS_SUPPORTED) ||
 	    !(ecx & CPUID5_ECX_INTERRUPT_BREAK))
diff -puN drivers/dma/ioat/dca.c~xsave-leaf-checks-3 drivers/dma/ioat/dca.c
--- a/drivers/dma/ioat/dca.c~xsave-leaf-checks-3	2024-11-20 11:44:20.889791148 -0800
+++ b/drivers/dma/ioat/dca.c	2024-11-20 11:44:20.901791607 -0800
@@ -63,7 +63,7 @@ static int dca_enabled_in_bios(struct pc
 	u32 eax;
 	int res;
 
-	eax = cpuid_eax(CPUID_DCA_LEAF);
+	eax = cpuid_eax(CPUID_LEAF_DCA);
 	res = eax & BIT(0);
 	if (!res)
 		dev_dbg(&pdev->dev, "DCA is disabled in BIOS\n");
diff -puN drivers/idle/intel_idle.c~xsave-leaf-checks-3 drivers/idle/intel_idle.c
--- a/drivers/idle/intel_idle.c~xsave-leaf-checks-3	2024-11-20 11:44:20.893791301 -0800
+++ b/drivers/idle/intel_idle.c	2024-11-20 11:44:20.901791607 -0800
@@ -2269,7 +2269,7 @@ static int __init intel_idle_init(void)
 			return -ENODEV;
 	}
 
-	cpuid(CPUID_MWAIT_LEAF, &eax, &ebx, &ecx, &mwait_substates);
+	cpuid(CPUID_LEAF_MWAIT, &eax, &ebx, &ecx, &mwait_substates);
 
 	if (!(ecx & CPUID5_ECX_EXTENSIONS_SUPPORTED) ||
 	    !(ecx & CPUID5_ECX_INTERRUPT_BREAK) ||
diff -puN drivers/platform/x86/intel/pmc/core.c~xsave-leaf-checks-3 drivers/platform/x86/intel/pmc/core.c
--- a/drivers/platform/x86/intel/pmc/core.c~xsave-leaf-checks-3	2024-11-20 11:44:20.893791301 -0800
+++ b/drivers/platform/x86/intel/pmc/core.c	2024-11-20 11:44:20.901791607 -0800
@@ -936,13 +936,13 @@ static unsigned int pmc_core_get_crystal
 {
 	unsigned int eax_denominator, ebx_numerator, ecx_hz, edx;
 
-	if (boot_cpu_data.cpuid_level < CPUID_TSC_LEAF)
+	if (boot_cpu_data.cpuid_level < CPUID_LEAF_TSC)
 		return 0;
 
 	eax_denominator = ebx_numerator = ecx_hz = edx = 0;
 
 	/* TSC/Crystal ratio, plus optionally Crystal Hz */
-	cpuid(CPUID_TSC_LEAF, &eax_denominator, &ebx_numerator, &ecx_hz, &edx);
+	cpuid(CPUID_LEAF_TSC, &eax_denominator, &ebx_numerator, &ecx_hz, &edx);
 
 	if (ebx_numerator == 0 || eax_denominator == 0)
 		return 0;
_

Re: [PATCH 11/11] x86/cpu: Make all all CPUID leaf names consistent

[Dave Jiang]

On 11/20/24 12:53 PM, Dave Hansen wrote:
> 
> From: Dave Hansen <dave.hansen@linux.intel.com>
> 
> The leaf names are not consistent.  Give them all a CPUID_LEAF_ prefix
> for consistency and vertical alignment.
> 
> Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>

Acked-by: Dave Jiang <dave.jiang@intel.com> # for ioatdma bits

> ---
> 
>  b/arch/x86/events/intel/pt.c            |    4 ++--
>  b/arch/x86/include/asm/cpuid.h          |   12 ++++++------
>  b/arch/x86/kernel/acpi/cstate.c         |    2 +-
>  b/arch/x86/kernel/cpu/common.c          |    6 +++---
>  b/arch/x86/kernel/fpu/xstate.c          |   20 ++++++++++----------
>  b/arch/x86/kernel/hpet.c                |    2 +-
>  b/arch/x86/kernel/process.c             |    2 +-
>  b/arch/x86/kernel/smpboot.c             |    2 +-
>  b/arch/x86/kernel/tsc.c                 |   18 +++++++++---------
>  b/arch/x86/xen/enlighten_pv.c           |    4 ++--
>  b/drivers/acpi/acpi_pad.c               |    2 +-
>  b/drivers/dma/ioat/dca.c                |    2 +-
>  b/drivers/idle/intel_idle.c             |    2 +-
>  b/drivers/platform/x86/intel/pmc/core.c |    4 ++--
>  14 files changed, 41 insertions(+), 41 deletions(-)
> 
> diff -puN arch/x86/events/intel/pt.c~xsave-leaf-checks-3 arch/x86/events/intel/pt.c
> --- a/arch/x86/events/intel/pt.c~xsave-leaf-checks-3	2024-11-20 11:44:20.873790535 -0800
> +++ b/arch/x86/events/intel/pt.c	2024-11-20 11:44:20.897791454 -0800
> @@ -202,10 +202,10 @@ static int __init pt_pmu_hw_init(void)
>  	 * otherwise, zero for numerator stands for "not enumerated"
>  	 * as per SDM
>  	 */
> -	if (boot_cpu_data.cpuid_level >= CPUID_TSC_LEAF) {
> +	if (boot_cpu_data.cpuid_level >= CPUID_LEAF_TSC) {
>  		u32 eax, ebx, ecx, edx;
>  
> -		cpuid(CPUID_TSC_LEAF, &eax, &ebx, &ecx, &edx);
> +		cpuid(CPUID_LEAF_TSC, &eax, &ebx, &ecx, &edx);
>  
>  		pt_pmu.tsc_art_num = ebx;
>  		pt_pmu.tsc_art_den = eax;
> diff -puN arch/x86/include/asm/cpuid.h~xsave-leaf-checks-3 arch/x86/include/asm/cpuid.h
> --- a/arch/x86/include/asm/cpuid.h~xsave-leaf-checks-3	2024-11-20 11:44:20.873790535 -0800
> +++ b/arch/x86/include/asm/cpuid.h	2024-11-20 11:44:20.897791454 -0800
> @@ -19,12 +19,12 @@ enum cpuid_regs_idx {
>  	CPUID_EDX,
>  };
>  
> -#define CPUID_MWAIT_LEAF	0x5
> -#define CPUID_DCA_LEAF		0x9
> -#define XSTATE_CPUID		0x0d
> -#define CPUID_TSC_LEAF		0x15
> -#define CPUID_FREQ_LEAF		0x16
> -#define TILE_CPUID		0x1d
> +#define CPUID_LEAF_MWAIT	0x5
> +#define CPUID_LEAF_DCA		0x9
> +#define CPUID_LEAF_XSTATE	0x0d
> +#define CPUID_LEAF_TSC		0x15
> +#define CPUID_LEAF_FREQ		0x16
> +#define CPUID_LEAF_TILE		0x1d
>  
>  #ifdef CONFIG_X86_32
>  extern int have_cpuid_p(void);
> diff -puN arch/x86/kernel/acpi/cstate.c~xsave-leaf-checks-3 arch/x86/kernel/acpi/cstate.c
> --- a/arch/x86/kernel/acpi/cstate.c~xsave-leaf-checks-3	2024-11-20 11:44:20.877790688 -0800
> +++ b/arch/x86/kernel/acpi/cstate.c	2024-11-20 11:44:20.897791454 -0800
> @@ -129,7 +129,7 @@ static long acpi_processor_ffh_cstate_pr
>  	unsigned int cstate_type; /* C-state type and not ACPI C-state type */
>  	unsigned int num_cstate_subtype;
>  
> -	cpuid(CPUID_MWAIT_LEAF, &eax, &ebx, &ecx, &edx);
> +	cpuid(CPUID_LEAF_MWAIT, &eax, &ebx, &ecx, &edx);
>  
>  	/* Check whether this particular cx_type (in CST) is supported or not */
>  	cstate_type = (((cx->address >> MWAIT_SUBSTATE_SIZE) &
> diff -puN arch/x86/kernel/cpu/common.c~xsave-leaf-checks-3 arch/x86/kernel/cpu/common.c
> --- a/arch/x86/kernel/cpu/common.c~xsave-leaf-checks-3	2024-11-20 11:44:20.877790688 -0800
> +++ b/arch/x86/kernel/cpu/common.c	2024-11-20 11:44:20.897791454 -0800
> @@ -638,9 +638,9 @@ struct cpuid_dependent_feature {
>  
>  static const struct cpuid_dependent_feature
>  cpuid_dependent_features[] = {
> -	{ X86_FEATURE_MWAIT,		CPUID_MWAIT_LEAF },
> -	{ X86_FEATURE_DCA,		CPUID_DCA_LEAF },
> -	{ X86_FEATURE_XSAVE,		XSTATE_CPUID },
> +	{ X86_FEATURE_MWAIT,		CPUID_LEAF_MWAIT },
> +	{ X86_FEATURE_DCA,		CPUID_LEAF_DCA },
> +	{ X86_FEATURE_XSAVE,		CPUID_LEAF_XSTATE },
>  	{ 0, 0 }
>  };
>  
> diff -puN arch/x86/kernel/fpu/xstate.c~xsave-leaf-checks-3 arch/x86/kernel/fpu/xstate.c
> --- a/arch/x86/kernel/fpu/xstate.c~xsave-leaf-checks-3	2024-11-20 11:44:20.881790840 -0800
> +++ b/arch/x86/kernel/fpu/xstate.c	2024-11-20 11:44:20.897791454 -0800
> @@ -233,7 +233,7 @@ static void __init setup_xstate_cache(vo
>  						       xmm_space);
>  
>  	for_each_extended_xfeature(i, fpu_kernel_cfg.max_features) {
> -		cpuid_count(XSTATE_CPUID, i, &eax, &ebx, &ecx, &edx);
> +		cpuid_count(CPUID_LEAF_XSTATE, i, &eax, &ebx, &ecx, &edx);
>  
>  		xstate_sizes[i] = eax;
>  		xstate_flags[i] = ecx;
> @@ -399,7 +399,7 @@ int xfeature_size(int xfeature_nr)
>  	u32 eax, ebx, ecx, edx;
>  
>  	CHECK_XFEATURE(xfeature_nr);
> -	cpuid_count(XSTATE_CPUID, xfeature_nr, &eax, &ebx, &ecx, &edx);
> +	cpuid_count(CPUID_LEAF_XSTATE, xfeature_nr, &eax, &ebx, &ecx, &edx);
>  	return eax;
>  }
>  
> @@ -442,9 +442,9 @@ static void __init __xstate_dump_leaves(
>  	 * just in case there are some goodies up there
>  	 */
>  	for (i = 0; i < XFEATURE_MAX + 10; i++) {
> -		cpuid_count(XSTATE_CPUID, i, &eax, &ebx, &ecx, &edx);
> +		cpuid_count(CPUID_LEAF_XSTATE, i, &eax, &ebx, &ecx, &edx);
>  		pr_warn("CPUID[%02x, %02x]: eax=%08x ebx=%08x ecx=%08x edx=%08x\n",
> -			XSTATE_CPUID, i, eax, ebx, ecx, edx);
> +			CPUID_LEAF_XSTATE, i, eax, ebx, ecx, edx);
>  	}
>  }
>  
> @@ -485,7 +485,7 @@ static int __init check_xtile_data_again
>  	 * Check the maximum palette id:
>  	 *   eax: the highest numbered palette subleaf.
>  	 */
> -	cpuid_count(TILE_CPUID, 0, &max_palid, &ebx, &ecx, &edx);
> +	cpuid_count(CPUID_LEAF_TILE, 0, &max_palid, &ebx, &ecx, &edx);
>  
>  	/*
>  	 * Cross-check each tile size and find the maximum number of
> @@ -499,7 +499,7 @@ static int __init check_xtile_data_again
>  		 *   eax[31:16]:  bytes per title
>  		 *   ebx[31:16]:  the max names (or max number of tiles)
>  		 */
> -		cpuid_count(TILE_CPUID, palid, &eax, &ebx, &edx, &edx);
> +		cpuid_count(CPUID_LEAF_TILE, palid, &eax, &ebx, &edx, &edx);
>  		tile_size = eax >> 16;
>  		max = ebx >> 16;
>  
> @@ -634,7 +634,7 @@ static unsigned int __init get_compacted
>  	 * are no supervisor states, but XSAVEC still uses compacted
>  	 * format.
>  	 */
> -	cpuid_count(XSTATE_CPUID, 1, &eax, &ebx, &ecx, &edx);
> +	cpuid_count(CPUID_LEAF_XSTATE, 1, &eax, &ebx, &ecx, &edx);
>  	return ebx;
>  }
>  
> @@ -675,7 +675,7 @@ static unsigned int __init get_xsave_siz
>  	 *    containing all the *user* state components
>  	 *    corresponding to bits currently set in XCR0.
>  	 */
> -	cpuid_count(XSTATE_CPUID, 0, &eax, &ebx, &ecx, &edx);
> +	cpuid_count(CPUID_LEAF_XSTATE, 0, &eax, &ebx, &ecx, &edx);
>  	return ebx;
>  }
>  
> @@ -767,13 +767,13 @@ void __init fpu__init_system_xstate(unsi
>  	/*
>  	 * Find user xstates supported by the processor.
>  	 */
> -	cpuid_count(XSTATE_CPUID, 0, &eax, &ebx, &ecx, &edx);
> +	cpuid_count(CPUID_LEAF_XSTATE, 0, &eax, &ebx, &ecx, &edx);
>  	fpu_kernel_cfg.max_features = eax + ((u64)edx << 32);
>  
>  	/*
>  	 * Find supervisor xstates supported by the processor.
>  	 */
> -	cpuid_count(XSTATE_CPUID, 1, &eax, &ebx, &ecx, &edx);
> +	cpuid_count(CPUID_LEAF_XSTATE, 1, &eax, &ebx, &ecx, &edx);
>  	fpu_kernel_cfg.max_features |= ecx + ((u64)edx << 32);
>  
>  	if ((fpu_kernel_cfg.max_features & XFEATURE_MASK_FPSSE) != XFEATURE_MASK_FPSSE) {
> diff -puN arch/x86/kernel/hpet.c~xsave-leaf-checks-3 arch/x86/kernel/hpet.c
> --- a/arch/x86/kernel/hpet.c~xsave-leaf-checks-3	2024-11-20 11:44:20.881790840 -0800
> +++ b/arch/x86/kernel/hpet.c	2024-11-20 11:44:20.897791454 -0800
> @@ -928,7 +928,7 @@ static bool __init mwait_pc10_supported(
>  	if (!cpu_feature_enabled(X86_FEATURE_MWAIT))
>  		return false;
>  
> -	cpuid(CPUID_MWAIT_LEAF, &eax, &ebx, &ecx, &mwait_substates);
> +	cpuid(CPUID_LEAF_MWAIT, &eax, &ebx, &ecx, &mwait_substates);
>  
>  	return (ecx & CPUID5_ECX_EXTENSIONS_SUPPORTED) &&
>  	       (ecx & CPUID5_ECX_INTERRUPT_BREAK) &&
> diff -puN arch/x86/kernel/process.c~xsave-leaf-checks-3 arch/x86/kernel/process.c
> --- a/arch/x86/kernel/process.c~xsave-leaf-checks-3	2024-11-20 11:44:20.881790840 -0800
> +++ b/arch/x86/kernel/process.c	2024-11-20 11:44:20.897791454 -0800
> @@ -878,7 +878,7 @@ static __init bool prefer_mwait_c1_over_
>  	if (boot_cpu_has_bug(X86_BUG_MONITOR) || boot_cpu_has_bug(X86_BUG_AMD_APIC_C1E))
>  		return false;
>  
> -	cpuid(CPUID_MWAIT_LEAF, &eax, &ebx, &ecx, &edx);
> +	cpuid(CPUID_LEAF_MWAIT, &eax, &ebx, &ecx, &edx);
>  
>  	/*
>  	 * If MWAIT extensions are not available, it is safe to use MWAIT
> diff -puN arch/x86/kernel/smpboot.c~xsave-leaf-checks-3 arch/x86/kernel/smpboot.c
> --- a/arch/x86/kernel/smpboot.c~xsave-leaf-checks-3	2024-11-20 11:44:20.885790995 -0800
> +++ b/arch/x86/kernel/smpboot.c	2024-11-20 11:44:20.897791454 -0800
> @@ -1292,7 +1292,7 @@ static inline void mwait_play_dead(void)
>  	if (!this_cpu_has(X86_FEATURE_CLFLUSH))
>  		return;
>  
> -	eax = CPUID_MWAIT_LEAF;
> +	eax = CPUID_LEAF_MWAIT;
>  	ecx = 0;
>  	native_cpuid(&eax, &ebx, &ecx, &edx);
>  
> diff -puN arch/x86/kernel/tsc.c~xsave-leaf-checks-3 arch/x86/kernel/tsc.c
> --- a/arch/x86/kernel/tsc.c~xsave-leaf-checks-3	2024-11-20 11:44:20.885790995 -0800
> +++ b/arch/x86/kernel/tsc.c	2024-11-20 11:44:20.901791607 -0800
> @@ -665,13 +665,13 @@ unsigned long native_calibrate_tsc(void)
>  	if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL)
>  		return 0;
>  
> -	if (boot_cpu_data.cpuid_level < CPUID_TSC_LEAF)
> +	if (boot_cpu_data.cpuid_level < CPUID_LEAF_TSC)
>  		return 0;
>  
>  	eax_denominator = ebx_numerator = ecx_hz = edx = 0;
>  
>  	/* CPUID 15H TSC/Crystal ratio, plus optionally Crystal Hz */
> -	cpuid(CPUID_TSC_LEAF, &eax_denominator, &ebx_numerator, &ecx_hz, &edx);
> +	cpuid(CPUID_LEAF_TSC, &eax_denominator, &ebx_numerator, &ecx_hz, &edx);
>  
>  	if (ebx_numerator == 0 || eax_denominator == 0)
>  		return 0;
> @@ -680,7 +680,7 @@ unsigned long native_calibrate_tsc(void)
>  
>  	/*
>  	 * Denverton SoCs don't report crystal clock, and also don't support
> -	 * CPUID_FREQ_LEAF for the calculation below, so hardcode the 25MHz
> +	 * CPUID_LEAF_FREQ for the calculation below, so hardcode the 25MHz
>  	 * crystal clock.
>  	 */
>  	if (crystal_khz == 0 &&
> @@ -700,10 +700,10 @@ unsigned long native_calibrate_tsc(void)
>  	 * clock, but we can easily calculate it to a high degree of accuracy
>  	 * by considering the crystal ratio and the CPU speed.
>  	 */
> -	if (crystal_khz == 0 && boot_cpu_data.cpuid_level >= CPUID_FREQ_LEAF) {
> +	if (crystal_khz == 0 && boot_cpu_data.cpuid_level >= CPUID_LEAF_FREQ) {
>  		unsigned int eax_base_mhz, ebx, ecx, edx;
>  
> -		cpuid(CPUID_FREQ_LEAF, &eax_base_mhz, &ebx, &ecx, &edx);
> +		cpuid(CPUID_LEAF_FREQ, &eax_base_mhz, &ebx, &ecx, &edx);
>  		crystal_khz = eax_base_mhz * 1000 *
>  			eax_denominator / ebx_numerator;
>  	}
> @@ -738,12 +738,12 @@ static unsigned long cpu_khz_from_cpuid(
>  	if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL)
>  		return 0;
>  
> -	if (boot_cpu_data.cpuid_level < CPUID_FREQ_LEAF)
> +	if (boot_cpu_data.cpuid_level < CPUID_LEAF_FREQ)
>  		return 0;
>  
>  	eax_base_mhz = ebx_max_mhz = ecx_bus_mhz = edx = 0;
>  
> -	cpuid(CPUID_FREQ_LEAF, &eax_base_mhz, &ebx_max_mhz, &ecx_bus_mhz, &edx);
> +	cpuid(CPUID_LEAF_FREQ, &eax_base_mhz, &ebx_max_mhz, &ecx_bus_mhz, &edx);
>  
>  	return eax_base_mhz * 1000;
>  }
> @@ -1076,7 +1076,7 @@ static void __init detect_art(void)
>  {
>  	unsigned int unused;
>  
> -	if (boot_cpu_data.cpuid_level < CPUID_TSC_LEAF)
> +	if (boot_cpu_data.cpuid_level < CPUID_LEAF_TSC)
>  		return;
>  
>  	/*
> @@ -1089,7 +1089,7 @@ static void __init detect_art(void)
>  	    tsc_async_resets)
>  		return;
>  
> -	cpuid(CPUID_TSC_LEAF, &art_base_clk.denominator,
> +	cpuid(CPUID_LEAF_TSC, &art_base_clk.denominator,
>  	      &art_base_clk.numerator, &art_base_clk.freq_khz, &unused);
>  
>  	art_base_clk.freq_khz /= KHZ;
> diff -puN arch/x86/xen/enlighten_pv.c~xsave-leaf-checks-3 arch/x86/xen/enlighten_pv.c
> --- a/arch/x86/xen/enlighten_pv.c~xsave-leaf-checks-3	2024-11-20 11:44:20.889791148 -0800
> +++ b/arch/x86/xen/enlighten_pv.c	2024-11-20 11:44:20.901791607 -0800
> @@ -231,7 +231,7 @@ static void xen_cpuid(unsigned int *ax,
>  		or_ebx = smp_processor_id() << 24;
>  		break;
>  
> -	case CPUID_MWAIT_LEAF:
> +	case CPUID_LEAF_MWAIT:
>  		/* Synthesize the values.. */
>  		*ax = 0;
>  		*bx = 0;
> @@ -301,7 +301,7 @@ static bool __init xen_check_mwait(void)
>  	 * ecx and edx. The hypercall provides only partial information.
>  	 */
>  
> -	ax = CPUID_MWAIT_LEAF;
> +	ax = CPUID_LEAF_MWAIT;
>  	bx = 0;
>  	cx = 0;
>  	dx = 0;
> diff -puN drivers/acpi/acpi_pad.c~xsave-leaf-checks-3 drivers/acpi/acpi_pad.c
> --- a/drivers/acpi/acpi_pad.c~xsave-leaf-checks-3	2024-11-20 11:44:20.889791148 -0800
> +++ b/drivers/acpi/acpi_pad.c	2024-11-20 11:44:20.901791607 -0800
> @@ -48,7 +48,7 @@ static void power_saving_mwait_init(void
>  	if (!boot_cpu_has(X86_FEATURE_MWAIT))
>  		return;
>  
> -	cpuid(CPUID_MWAIT_LEAF, &eax, &ebx, &ecx, &edx);
> +	cpuid(CPUID_LEAF_MWAIT, &eax, &ebx, &ecx, &edx);
>  
>  	if (!(ecx & CPUID5_ECX_EXTENSIONS_SUPPORTED) ||
>  	    !(ecx & CPUID5_ECX_INTERRUPT_BREAK))
> diff -puN drivers/dma/ioat/dca.c~xsave-leaf-checks-3 drivers/dma/ioat/dca.c
> --- a/drivers/dma/ioat/dca.c~xsave-leaf-checks-3	2024-11-20 11:44:20.889791148 -0800
> +++ b/drivers/dma/ioat/dca.c	2024-11-20 11:44:20.901791607 -0800
> @@ -63,7 +63,7 @@ static int dca_enabled_in_bios(struct pc
>  	u32 eax;
>  	int res;
>  
> -	eax = cpuid_eax(CPUID_DCA_LEAF);
> +	eax = cpuid_eax(CPUID_LEAF_DCA);
>  	res = eax & BIT(0);
>  	if (!res)
>  		dev_dbg(&pdev->dev, "DCA is disabled in BIOS\n");
> diff -puN drivers/idle/intel_idle.c~xsave-leaf-checks-3 drivers/idle/intel_idle.c
> --- a/drivers/idle/intel_idle.c~xsave-leaf-checks-3	2024-11-20 11:44:20.893791301 -0800
> +++ b/drivers/idle/intel_idle.c	2024-11-20 11:44:20.901791607 -0800
> @@ -2269,7 +2269,7 @@ static int __init intel_idle_init(void)
>  			return -ENODEV;
>  	}
>  
> -	cpuid(CPUID_MWAIT_LEAF, &eax, &ebx, &ecx, &mwait_substates);
> +	cpuid(CPUID_LEAF_MWAIT, &eax, &ebx, &ecx, &mwait_substates);
>  
>  	if (!(ecx & CPUID5_ECX_EXTENSIONS_SUPPORTED) ||
>  	    !(ecx & CPUID5_ECX_INTERRUPT_BREAK) ||
> diff -puN drivers/platform/x86/intel/pmc/core.c~xsave-leaf-checks-3 drivers/platform/x86/intel/pmc/core.c
> --- a/drivers/platform/x86/intel/pmc/core.c~xsave-leaf-checks-3	2024-11-20 11:44:20.893791301 -0800
> +++ b/drivers/platform/x86/intel/pmc/core.c	2024-11-20 11:44:20.901791607 -0800
> @@ -936,13 +936,13 @@ static unsigned int pmc_core_get_crystal
>  {
>  	unsigned int eax_denominator, ebx_numerator, ecx_hz, edx;
>  
> -	if (boot_cpu_data.cpuid_level < CPUID_TSC_LEAF)
> +	if (boot_cpu_data.cpuid_level < CPUID_LEAF_TSC)
>  		return 0;
>  
>  	eax_denominator = ebx_numerator = ecx_hz = edx = 0;
>  
>  	/* TSC/Crystal ratio, plus optionally Crystal Hz */
> -	cpuid(CPUID_TSC_LEAF, &eax_denominator, &ebx_numerator, &ecx_hz, &edx);
> +	cpuid(CPUID_LEAF_TSC, &eax_denominator, &ebx_numerator, &ecx_hz, &edx);
>  
>  	if (ebx_numerator == 0 || eax_denominator == 0)
>  		return 0;
> _

Re: [PATCH 04/11] x86/acpi: Check MWAIT feature instead of CPUID level

[Sean Christopherson]

On Wed, Nov 20, 2024, Dave Hansen wrote:
> 
> From: Dave Hansen <dave.hansen@linux.intel.com>
> 
> I think this code is possibly buggy.  The CPU could have a high
> c->cpuid_level and not support MWAIT at all.

Reading CPUID.0x5 is totally fine in that case though.  Wasteful and pointless,
but functionally ok.  If the CPU provides non-zero values when MWAIT is unsupported,
then that's a broken CPU.

> It is much more clear to
> just check for MWAIT support directly.  Also, because of the CPU level
> dependency code, any CPU that has X86_FEATURE_MWAIT also has a
> high-enough CPUID level.

No?  The MWAIT feature flag is in leaf 1.  1 < 5, and I don't see any cpuid_level
magic that would force it beyond '5'.

Why not check both?

> Check X86_FEATURE_MWAIT instead of the CPUID level.
> 
> Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
> ---
> 
>  b/arch/x86/kernel/acpi/cstate.c |    2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff -puN arch/x86/kernel/acpi/cstate.c~mwait-leaf-checks-3 arch/x86/kernel/acpi/cstate.c
> --- a/arch/x86/kernel/acpi/cstate.c~mwait-leaf-checks-3	2024-11-20 11:44:17.225650902 -0800
> +++ b/arch/x86/kernel/acpi/cstate.c	2024-11-20 11:44:17.225650902 -0800
> @@ -173,7 +173,7 @@ int acpi_processor_ffh_cstate_probe(unsi
>  	struct cpuinfo_x86 *c = &cpu_data(cpu);
>  	long retval;
>  
> -	if (!cpu_cstate_entry || c->cpuid_level < CPUID_MWAIT_LEAF)
> +	if (!cpu_cstate_entry || cpu_has(c, X86_FEATURE_MWAIT))

Someone didn't test this :-)

>  		return -1;
>  
>  	if (reg->bit_offset != NATIVE_CSTATE_BEYOND_HALT)
> _

Re: [PATCH 10/11] x86/fpu: Remove unnecessary CPUID level check

[Sean Christopherson]

On Wed, Nov 20, 2024, Dave Hansen wrote:
> 
> From: Dave Hansen <dave.hansen@linux.intel.com>
> 
> The CPUID level dependency table will entirely zap X86_FEATURE_XSAVE

What table is that?  XSAVE depends on FXSR, but I can't find anything that clears
X86_FEATURE_XSAVE if cpuid_level < XSTATE_CPUID.  Even if it did, dropping a
sanity check in a one-time path adds risk for almost no reward.

> if the CPUID level is too low.  This code is unreachable.  Kill it.
> 
> Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
> ---
> 
>  b/arch/x86/kernel/fpu/xstate.c |    5 -----
>  1 file changed, 5 deletions(-)
> 
> diff -puN arch/x86/kernel/fpu/xstate.c~xsave-leaf-checks-2 arch/x86/kernel/fpu/xstate.c
> --- a/arch/x86/kernel/fpu/xstate.c~xsave-leaf-checks-2	2024-11-20 11:44:20.369771244 -0800
> +++ b/arch/x86/kernel/fpu/xstate.c	2024-11-20 11:44:20.373771397 -0800
> @@ -764,11 +764,6 @@ void __init fpu__init_system_xstate(unsi
>  		return;
>  	}
>  
> -	if (boot_cpu_data.cpuid_level < XSTATE_CPUID) {
> -		WARN_ON_FPU(1);
> -		return;
> -	}
> -
>  	/*
>  	 * Find user xstates supported by the processor.
>  	 */
> _

Re: [PATCH 04/11] x86/acpi: Check MWAIT feature instead of CPUID level

[Dave Hansen]

On 11/21/24 07:33, Sean Christopherson wrote:
> On Wed, Nov 20, 2024, Dave Hansen wrote:
>> From: Dave Hansen <dave.hansen@linux.intel.com>
>>
>> I think this code is possibly buggy.  The CPU could have a high
>> c->cpuid_level and not support MWAIT at all.
> 
> Reading CPUID.0x5 is totally fine in that case though.  Wasteful and pointless,
> but functionally ok.  If the CPU provides non-zero values when MWAIT is unsupported,
> then that's a broken CPU.

That's a good point.

I was mostly worried about consuming *bad* data from CPUID.5, but the
leaf check takes care of that now.

>> diff -puN arch/x86/kernel/acpi/cstate.c~mwait-leaf-checks-3 arch/x86/kernel/acpi/cstate.c
>> --- a/arch/x86/kernel/acpi/cstate.c~mwait-leaf-checks-3	2024-11-20 11:44:17.225650902 -0800
>> +++ b/arch/x86/kernel/acpi/cstate.c	2024-11-20 11:44:17.225650902 -0800
>> @@ -173,7 +173,7 @@ int acpi_processor_ffh_cstate_probe(unsi
>>  	struct cpuinfo_x86 *c = &cpu_data(cpu);
>>  	long retval;
>>  
>> -	if (!cpu_cstate_entry || c->cpuid_level < CPUID_MWAIT_LEAF)
>> +	if (!cpu_cstate_entry || cpu_has(c, X86_FEATURE_MWAIT))
> 
> Someone didn't test this :-)

Guilty.

I'll just drop this.

Re: [PATCH 10/11] x86/fpu: Remove unnecessary CPUID level check

[Dave Hansen]

[-- Attachment #1: Type: text/plain, Size: 789 bytes --]

On 11/21/24 07:45, Sean Christopherson wrote:
> On Wed, Nov 20, 2024, Dave Hansen wrote:
>> The CPUID level dependency table will entirely zap X86_FEATURE_XSAVE
> 
> What table is that?  XSAVE depends on FXSR, but I can't find anything that clears
> X86_FEATURE_XSAVE if cpuid_level < XSTATE_CPUID.  Even if it did, dropping a
> sanity check in a one-time path adds risk for almost no reward.

arch/x86/kernel/cpu/common.c::cpuid_dependent_features[]

It's hard to find because it hard-codes the leaf number:

        { X86_FEATURE_XSAVE,            0x0000000d },

Fixing that was my initial motivation for this series.

As for removing the checks, I'd much rather have a super generic check
in the CPUID helpers that have all the callers code something.
Something like the attached patch?

[-- Attachment #2: cpuid_count-warn.patch --]
[-- Type: text/x-patch, Size: 2247 bytes --]



---

 b/arch/x86/include/asm/cpuid.h |    6 ++++++
 b/arch/x86/kernel/cpu/common.c |   38 ++++++++++++++++++++++++++++++++++++++
 2 files changed, 44 insertions(+)

diff -puN arch/x86/include/asm/cpuid.h~cpuid_count-warn arch/x86/include/asm/cpuid.h
--- a/arch/x86/include/asm/cpuid.h~cpuid_count-warn	2024-11-22 08:50:12.618186610 -0800
+++ b/arch/x86/include/asm/cpuid.h	2024-11-22 09:10:12.112217942 -0800
@@ -64,6 +64,8 @@ native_cpuid_reg(edx)
 #define __cpuid			native_cpuid
 #endif
 
+extern void check_cpuid_level(unsigned int level);
+
 /*
  * Generic CPUID function
  * clear %ecx since some cpus (Cyrix MII) do not set or clear %ecx
@@ -73,6 +75,8 @@ static inline void cpuid(unsigned int op
 			 unsigned int *eax, unsigned int *ebx,
 			 unsigned int *ecx, unsigned int *edx)
 {
+	check_cpuid_level(op);
+
 	*eax = op;
 	*ecx = 0;
 	__cpuid(eax, ebx, ecx, edx);
@@ -83,6 +87,8 @@ static inline void cpuid_count(unsigned
 			       unsigned int *eax, unsigned int *ebx,
 			       unsigned int *ecx, unsigned int *edx)
 {
+	check_cpuid_level(op);
+
 	*eax = op;
 	*ecx = count;
 	__cpuid(eax, ebx, ecx, edx);
diff -puN arch/x86/kernel/cpu/common.c~cpuid_count-warn arch/x86/kernel/cpu/common.c
--- a/arch/x86/kernel/cpu/common.c~cpuid_count-warn	2024-11-22 09:07:43.922591720 -0800
+++ b/arch/x86/kernel/cpu/common.c	2024-11-22 09:42:48.950952538 -0800
@@ -2425,3 +2425,41 @@ void __init arch_cpu_finalize_init(void)
 	 */
 	mem_encrypt_init();
 }
+
+void check_cpuid_level(unsigned int leaf)
+{
+	unsigned int region = leaf >> 4;
+	int max_leaf;
+
+	/*
+	 * The max leaf in a region is discovered from the first
+	 * leaf. Allow this kind of discovery without checks:
+	 */
+	if (!(leaf & GENMASK(3, 0)))
+		return;
+
+	switch (region) {
+		case 0x0000:
+			max_leaf = boot_cpu_data.cpuid_level;
+			break;
+		case 0x8000:
+			max_leaf = boot_cpu_data.extended_cpuid_level;
+			break;
+		default:
+			/* Only check the basic and extended regions: */
+			return;
+	}
+
+	/*
+	 * Skip checks before ->cpuid_level is populated
+	 * and on CPUs without CPUID support:
+	 */
+	if (!max_leaf)
+		return;
+
+	if (leaf <= max_leaf)
+		return;
+
+	WARN_ONCE(1, "CPUID read leaf 0x%x above max supported leaf: 0x%x",
+		leaf, max_leaf);
+}
_

Re: [PATCH 01/11] x86/cpu: Move MWAIT leaf definition to common header

[Zhao Liu]

On Wed, Nov 20, 2024 at 11:53:28AM -0800, Dave Hansen wrote:
> Date: Wed, 20 Nov 2024 11:53:28 -0800
> From: Dave Hansen <dave.hansen@linux.intel.com>
> Subject: [PATCH 01/11] x86/cpu: Move MWAIT leaf definition to common header
> 
> 
> From: Dave Hansen <dave.hansen@linux.intel.com>
> 
> Begin constructing a common place to keep all CPUID leaf definitions.
> Move CPUID_MWAIT_LEAF to the CPUID header and include it where
> needed.
> 
> Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
> ---
> 
>  b/arch/x86/include/asm/cpuid.h  |    2 ++
>  b/arch/x86/include/asm/mwait.h  |    1 -
>  b/arch/x86/kernel/acpi/cstate.c |    1 +
>  b/arch/x86/kernel/hpet.c        |    1 +
>  b/arch/x86/kernel/process.c     |    1 +
>  b/arch/x86/kernel/smpboot.c     |    1 +
>  b/arch/x86/xen/enlighten_pv.c   |    1 +
>  b/drivers/acpi/acpi_pad.c       |    1 +
>  b/drivers/idle/intel_idle.c     |    1 +
>  9 files changed, 9 insertions(+), 1 deletion(-)

Look straightforward to me, so,

Reviewed-by: Zhao Liu <zhao1.liu@intel.com>

Re: [PATCH 02/11] x86/cpu: Use MWAIT leaf definition

[Zhao Liu]

On Wed, Nov 20, 2024 at 11:53:30AM -0800, Dave Hansen wrote:
> Date: Wed, 20 Nov 2024 11:53:30 -0800
> From: Dave Hansen <dave.hansen@linux.intel.com>
> Subject: [PATCH 02/11] x86/cpu: Use MWAIT leaf definition
> 
> 
> From: Dave Hansen <dave.hansen@linux.intel.com>
> 
> The leaf-to-feature dependency array uses hard-coded leaf numbers.
> Use the new common header definition for the MWAIT leaf.
> 
> Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
> ---
> 
>  b/arch/x86/kernel/cpu/common.c |    3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff -puN arch/x86/kernel/cpu/common.c~mwait-leaf-checks-1 arch/x86/kernel/cpu/common.c
> --- a/arch/x86/kernel/cpu/common.c~mwait-leaf-checks-1	2024-11-20 11:44:16.169610481 -0800
> +++ b/arch/x86/kernel/cpu/common.c	2024-11-20 11:44:16.169610481 -0800
> @@ -29,6 +29,7 @@

LGTM,

Reviewed-by: Zhao Liu <zhao1.liu@intel.com>

Re: [PATCH 05/11] x86/cpu: Refresh DCA leaf reading code

[Dave Hansen]

On 11/25/24 20:11, Zhao Liu wrote:
>> -#define CPUID_MWAIT_LEAF		5
>> +#define CPUID_MWAIT_LEAF	0x5
> Nit, this change can be merged into patch 1?

Except that it doesn't make any sense in patch 1. At least in this patch
you can tell that the change is being made for consistency. If it's in
patch 1, it looks like a random, arbitrary change.

Re: [PATCH 05/11] x86/cpu: Refresh DCA leaf reading code

[Zhao Liu]

On Wed, Nov 20, 2024 at 11:53:34AM -0800, Dave Hansen wrote:
> Date: Wed, 20 Nov 2024 11:53:34 -0800
> From: Dave Hansen <dave.hansen@linux.intel.com>
> Subject: [PATCH 05/11] x86/cpu: Refresh DCA leaf reading code
> 
> 
> From: Dave Hansen <dave.hansen@linux.intel.com>
> 
> The DCA leaf number is also hard-coded in the CPUID level dependency
> table. Move its definition to common code and use it.
> 
> While at it, fix up the naming and types in the probe code.  All
> CPUID data is provided in 32-bit registers, not 'unsigned long'.
> Also stop referring to "level_9".  Move away from test_bit()
> because the type is no longer an 'unsigned long'.
> 
> Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
> ---
> 
>  b/arch/x86/include/asm/cpuid.h |    3 ++-
>  b/arch/x86/kernel/cpu/common.c |    2 +-
>  b/drivers/dma/ioat/dca.c       |    8 +++++---
>  3 files changed, 8 insertions(+), 5 deletions(-)
> 
> diff -puN arch/x86/include/asm/cpuid.h~dca-leaf-checks-1 arch/x86/include/asm/cpuid.h
> --- a/arch/x86/include/asm/cpuid.h~dca-leaf-checks-1	2024-11-20 11:44:17.721669887 -0800
> +++ b/arch/x86/include/asm/cpuid.h	2024-11-20 11:44:17.725670041 -0800
> @@ -19,7 +19,8 @@ enum cpuid_regs_idx {
>  	CPUID_EDX,
>  };
>  
> -#define CPUID_MWAIT_LEAF		5
> +#define CPUID_MWAIT_LEAF	0x5

Nit, this change can be merged into patch 1?

Otherwise,

Reviewed-by: Zhao Liu <zhao1.liu@intel.com>

Re: [PATCH 06/11] x86/cpu: Move TSC CPUID leaf definition

[Zhao Liu]

On Wed, Nov 20, 2024 at 11:53:35AM -0800, Dave Hansen wrote:
> Date: Wed, 20 Nov 2024 11:53:35 -0800
> From: Dave Hansen <dave.hansen@linux.intel.com>
> Subject: [PATCH 06/11] x86/cpu: Move TSC CPUID leaf definition
> 
> 
> From: Dave Hansen <dave.hansen@linux.intel.com>
> 
> Prepare to use the TSC CPUID leaf definition more widely by moving
> it to the common header.
> 
> Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
> ---
> 
>  b/arch/x86/events/intel/pt.c   |    1 +
>  b/arch/x86/events/intel/pt.h   |    3 ---
>  b/arch/x86/include/asm/cpuid.h |    1 +
>  3 files changed, 2 insertions(+), 3 deletions(-)

Reviewed-by: Zhao Liu <zhao1.liu@intel.com>

Re: [PATCH 08/11] x86/tsc: Remove CPUID "frequency" leaf magic numbers.

[Zhao Liu]

On Wed, Nov 20, 2024 at 11:53:38AM -0800, Dave Hansen wrote:
> Date: Wed, 20 Nov 2024 11:53:38 -0800
> From: Dave Hansen <dave.hansen@linux.intel.com>
> Subject: [PATCH 08/11] x86/tsc: Remove CPUID "frequency" leaf magic numbers.
> 
> 
> From: Dave Hansen <dave.hansen@linux.intel.com>
> 
> All the code that reads the CPUID frequency information leaf hard-codes
> a magic number.  Give it a symbolic name and use it.
> 
> Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
> ---
> 
>  b/arch/x86/include/asm/cpuid.h |    1 +
>  b/arch/x86/kernel/tsc.c        |   12 ++++++------
>  2 files changed, 7 insertions(+), 6 deletions(-)

Reviewed-by: Zhao Liu <zhao1.liu@intel.com>

Re: [PATCH 09/11] x86/fpu: Move CPUID leaf definitions to common code

[Zhao Liu]

On Wed, Nov 20, 2024 at 11:53:39AM -0800, Dave Hansen wrote:
> Date: Wed, 20 Nov 2024 11:53:39 -0800
> From: Dave Hansen <dave.hansen@linux.intel.com>
> Subject: [PATCH 09/11] x86/fpu: Move CPUID leaf definitions to common code
> 
> 
> From: Dave Hansen <dave.hansen@linux.intel.com>
> 
> Move the XSAVE-related CPUID leaf definitions to common code.  Then,
> use the new definition to remove the last magic number from the CPUID
> level dependency table.
> 
> Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
> ---
> 
>  b/arch/x86/include/asm/cpuid.h      |    2 ++
>  b/arch/x86/include/asm/fpu/xstate.h |    4 ----
>  b/arch/x86/kernel/cpu/common.c      |    2 +-
>  b/arch/x86/kernel/fpu/xstate.c      |    1 +
>  4 files changed, 4 insertions(+), 5 deletions(-)
 
Reviewed-by: Zhao Liu <zhao1.liu@intel.com>

Re: [PATCH 11/11] x86/cpu: Make all all CPUID leaf names consistent

[Borislav Petkov]

On Mon, Dec 09, 2024 at 08:27:58AM -0800, Sean Christopherson wrote:
> > > And having a "CPUID_" prefixed thing and a "CPUID_LEAF_" prefixed other thing
> > > is going to cause confusion.
> 
> +1.
> 
> What about CPUID_FN_xxx for thing architectural leaf function number?  E.g.
> CPUID_FN_80000007 or maybe even CPUID_FN_0x80000007.  CPUID_LEAF_xxx is arguably
> wrong anyways for entries with sub-leaves.

Makes sense to me.

Especially if the name already has the function number in it too, which is
self-documenting.

Vs.

CPUID_FN_XSTATE

which will make me go lookup what that "XSTATE" function number was...

In any case, I think having a clear distinction in the naming between

* arch/hw names: CPUID_FN

* our own: CPUID_LNX_...

should help.

And once we're clear on the nomenclature, the conversion will happen
"automatically". :)

Thx.

-- 
Regards/Gruss,
    Boris.

https://people.kernel.org/tglx/notes-about-netiquette

Re: [PATCH 11/11] x86/cpu: Make all all CPUID leaf names consistent

[Borislav Petkov]

On Thu, Oct 31, 2024 at 10:19:37AM -0700, Dave Hansen wrote:
> diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
> index a5f221ea5688..b44dbb952d8c 100644
> --- a/arch/x86/kernel/cpu/common.c
> +++ b/arch/x86/kernel/cpu/common.c
> @@ -1001,8 +1001,8 @@ void get_cpu_cap(struct cpuinfo_x86 *c)
>  	}
>  
>  	/* Extended state features: level 0x0000000d */
> -	if (c->cpuid_level >= 0x0000000d) {
> -		cpuid_count(0x0000000d, 1, &eax, &ebx, &ecx, &edx);
> +	if (c->cpuid_level >= CPUID_LEAF_XSTATE) {
> +		cpuid_count(CPUID_LEAF_XSTATE, 1, &eax, &ebx, &ecx, &edx);
>  
>  		c->x86_capability[CPUID_D_1_EAX] = eax;

Yah, I'll take whatever I can get. You should add this hunk to your set.

Thx.

-- 
Regards/Gruss,
    Boris.

https://people.kernel.org/tglx/notes-about-netiquette

Re: [PATCH 11/11] x86/cpu: Make all all CPUID leaf names consistent

[Sean Christopherson]

On Mon, Dec 09, 2024, Dave Hansen wrote:
> On 12/9/24 08:27, Sean Christopherson wrote:
> > As for "cap_nr", IMO that is a net negative relative to "leaf".  For all CPUID
> > leaves that KVM cares about, the array entry is guaranteed to correspond to a
> > single CPUID leaf, albeit for only one output register.  KVM has definitely
> > bastardized "leaf", but I do think it helps convey that the "word" being modified
> > corresponds 1:1 with a specific CPUID leaf output.
> 
> I'm having a little trouble parsing this.

Gah, sorry, too much implied KVM knowledge.

> I think you're saying that, right now, if KVM cares about a CPUID leaf
> that it only cares about a single _word_, even if the core x86 code
> cares about multiple words. So the concept of a word is actually mostly
> changeable with a leaf ... for now.
> 
> Is that right?

No.  What I was trying to say is that KVM's CPUID code only ever manipulates
words that are hardware-defined, i.e. that aren't any of the CPUID_LNX_x words.

Because KVM doesn't care about the Linux-defined words, "leaf" can be used to
refer to a specific CPUID leaf+register without being too misleading, i.e. doesn't
incorrectly suggest that the Linux-defined words somehow correspond to CPUID
leaves.  KVM usage of "leaf" isn't perfectly aligned with the SDM's usage, but
I can't recall anyone ever complaining that KVM's usage of "leaf" is confusing.

On the plus side, "leaf" helps communicate to readers that the code is dealing
with the data, as opposed to referring to the function+index values themselves.
And IMO, "leaf" is much more self-documenting that "word" or "cap_nr".

Re: [PATCH 11/11] x86/cpu: Make all all CPUID leaf names consistent

[Dave Hansen]

On 12/9/24 08:27, Sean Christopherson wrote:
> As for "cap_nr", IMO that is a net negative relative to "leaf".  For all CPUID
> leaves that KVM cares about, the array entry is guaranteed to correspond to a
> single CPUID leaf, albeit for only one output register.  KVM has definitely
> bastardized "leaf", but I do think it helps convey that the "word" being modified
> corresponds 1:1 with a specific CPUID leaf output.

I'm having a little trouble parsing this.

I think you're saying that, right now, if KVM cares about a CPUID leaf
that it only cares about a single _word_, even if the core x86 code
cares about multiple words. So the concept of a word is actually mostly
changeable with a leaf ... for now.

Is that right?

Re: [PATCH 11/11] x86/cpu: Make all all CPUID leaf names consistent

[Sean Christopherson]

On Fri, Dec 06, 2024, Dave Hansen wrote:
> On 11/29/24 10:27, Borislav Petkov wrote:
> > Well, enum cpuid_leafs as it is now is the *indices* into the cap flags array:
> > 
> > struct cpuinfo_x86 {
> > 
> > 	...
> > 
> > 	__u32           x86_capability[NCAPINTS + NBUGINTS];
> > 
> > And having a "CPUID_" prefixed thing and a "CPUID_LEAF_" prefixed other thing
> > is going to cause confusion.

+1.

What about CPUID_FN_xxx for thing architectural leaf function number?  E.g.
CPUID_FN_80000007 or maybe even CPUID_FN_0x80000007.  CPUID_LEAF_xxx is arguably
wrong anyways for entries with sub-leaves.

There's still potential for confusion, but I think it would be clear enough to
be offset by the niceness of replacing all the open coded CPUID function literals.

> > And renaming enum cpuid_leafs is going to cause a massive churn...
> 
> Wait a sec though:
> 
> $ git grep 'enum cpuid_leafs' arch/x86/
> arch/x86/include/asm/cpufeature.h:enum cpuid_leafs
> arch/x86/kvm/cpuid.c:static __always_inline void kvm_cpu_cap_mask(enum
> cpuid_leafs leaf, u32 mask)
> 
> So there is only one direct reference to the type.
> 
> I think all it will take to rename the _type_ is something like the
> attached. Also, I think the new name 'x86_capability_words' and variable
> 'cap_nr' make the KVM site a lot more readable.

KVM's usage of the type will be gone in 6.14[*] (not yet applied, but it will be,
soon).  Unless renaming the enum type is central to your plans, maybe just wait
until after 6.14 to clean that up?  Note, we should also rename KVM's enum
kvm_only_cpuid_leafs to align with whatever the new enum name ends up being.

As for "cap_nr", IMO that is a net negative relative to "leaf".  For all CPUID
leaves that KVM cares about, the array entry is guaranteed to correspond to a
single CPUID leaf, albeit for only one output register.  KVM has definitely
bastardized "leaf", but I do think it helps convey that the "word" being modified
corresponds 1:1 with a specific CPUID leaf output.

[*] https://lore.kernel.org/all/20241128013424.4096668-27-seanjc@google.com

Re: [PATCH 11/11] x86/cpu: Make all all CPUID leaf names consistent

[Dave Hansen]

[-- Attachment #1: Type: text/plain, Size: 867 bytes --]

On 11/29/24 10:27, Borislav Petkov wrote:
> Well, enum cpuid_leafs as it is now is the *indices* into the cap flags array:
> 
> struct cpuinfo_x86 {
> 
> 	...
> 
> 	__u32           x86_capability[NCAPINTS + NBUGINTS];
> 
> And having a "CPUID_" prefixed thing and a "CPUID_LEAF_" prefixed other thing
> is going to cause confusion.
> 
> And renaming enum cpuid_leafs is going to cause a massive churn...

Wait a sec though:

$ git grep 'enum cpuid_leafs' arch/x86/
arch/x86/include/asm/cpufeature.h:enum cpuid_leafs
arch/x86/kvm/cpuid.c:static __always_inline void kvm_cpu_cap_mask(enum
cpuid_leafs leaf, u32 mask)

So there is only one direct reference to the type.

I think all it will take to rename the _type_ is something like the
attached. Also, I think the new name 'x86_capability_words' and variable
'cap_nr' make the KVM site a lot more readable.

Thoughts?

[-- Attachment #2: rename-cpuid_leafs.patch --]
[-- Type: text/x-patch, Size: 1369 bytes --]



---

 b/arch/x86/include/asm/cpufeature.h |    2 +-
 b/arch/x86/kvm/cpuid.c              |    8 ++++----
 2 files changed, 5 insertions(+), 5 deletions(-)

diff -puN arch/x86/include/asm/cpufeature.h~rename-cpuid_leafs arch/x86/include/asm/cpufeature.h
--- a/arch/x86/include/asm/cpufeature.h~rename-cpuid_leafs	2024-12-06 14:57:52.350793675 -0800
+++ b/arch/x86/include/asm/cpufeature.h	2024-12-06 14:58:43.464719842 -0800
@@ -10,7 +10,7 @@
 #include <linux/bitops.h>
 #include <asm/alternative.h>
 
-enum cpuid_leafs
+enum x86_capability_words
 {
 	CPUID_1_EDX		= 0,
 	CPUID_8000_0001_EDX,
diff -puN arch/x86/kvm/cpuid.c~rename-cpuid_leafs arch/x86/kvm/cpuid.c
--- a/arch/x86/kvm/cpuid.c~rename-cpuid_leafs	2024-12-06 14:58:45.084780924 -0800
+++ b/arch/x86/kvm/cpuid.c	2024-12-06 14:59:24.818279432 -0800
@@ -594,14 +594,14 @@ void kvm_cpu_cap_init_kvm_defined(enum k
 	__kvm_cpu_cap_mask(leaf);
 }
 
-static __always_inline void kvm_cpu_cap_mask(enum cpuid_leafs leaf, u32 mask)
+static __always_inline void kvm_cpu_cap_mask(enum x86_capability_words cap_nr, u32 mask)
 {
 	/* Use kvm_cpu_cap_init_kvm_defined for KVM-only leafs. */
-	BUILD_BUG_ON(leaf >= NCAPINTS);
+	BUILD_BUG_ON(cap_nr >= NCAPINTS);
 
-	kvm_cpu_caps[leaf] &= mask;
+	kvm_cpu_caps[cap_nr] &= mask;
 
-	__kvm_cpu_cap_mask(leaf);
+	__kvm_cpu_cap_mask(cap_nr);
 }
 
 void kvm_set_cpu_caps(void)
_

Re: [PATCH 11/11] x86/cpu: Make all all CPUID leaf names consistent

[Borislav Petkov]

On Thu, Oct 31, 2024 at 10:19:37AM -0700, Dave Hansen wrote:
> >> -#define CPUID_MWAIT_LEAF	0x5
> >> -#define CPUID_DCA_LEAF		0x9
> >> -#define XSTATE_CPUID		0x0d
> >> -#define CPUID_TSC_LEAF		0x15
> >> -#define CPUID_FREQ_LEAF		0x16
> >> -#define TILE_CPUID		0x1d
> >> +#define CPUID_LEAF_MWAIT	0x5
> >> +#define CPUID_LEAF_DCA		0x9
> >> +#define CPUID_LEAF_XSTATE	0x0d
> >> +#define CPUID_LEAF_TSC		0x15
> >> +#define CPUID_LEAF_FREQ		0x16
> >> +#define CPUID_LEAF_TILE		0x1d
> > 
> > ... and just to confuse things even more, there's enum cpuid_leafs too which
> > start with the "CPUID_" prefix too.
> > 
> > Pfff.
> 
> Yeah, lovely.  'enum cpuid_leafs' does appear misnamed though.  It is a
> list of *words*, not actual leaf numbers.  There's also very little
> overlap between those leafs and the newly-renamed ones in this series.
> I think that's because most of the leaves we dump into the CPU caps have
> random feature bits that aren't logically grouped and resist naming.
> 
> The one exception to that is the CPUID_D_1_EAX aka. CPUID_LEAF_XSTATE.
> We could do something like the attached patch, but I don't think it
> really helps much.
> 
> > I'd like to unify them and I *think* kvm_cpu_cap_mask() should be able to
> > stomach that (or fixed if not)...
> 
> Do you mean we could unify the CPUID_8000_0001_EDX enum values and the
> CPUID_LEAF_* defines from this series?

Well, enum cpuid_leafs as it is now is the *indices* into the cap flags array:

struct cpuinfo_x86 {

	...

	__u32           x86_capability[NCAPINTS + NBUGINTS];

And having a "CPUID_" prefixed thing and a "CPUID_LEAF_" prefixed other thing
is going to cause confusion.

And renaming enum cpuid_leafs is going to cause a massive churn...

IOW:

[ Rock ]	<-- us --> 	[ Hard Place ]

:-\

-- 
Regards/Gruss,
    Boris.

https://people.kernel.org/tglx/notes-about-netiquette

Re: [PATCH 11/11] x86/cpu: Make all all CPUID leaf names consistent

[Dave Hansen]

[-- Attachment #1: Type: text/plain, Size: 2312 bytes --]

On 10/31/24 03:18, Borislav Petkov wrote:
> On Wed, Oct 30, 2024 at 02:33:29PM -0700, Dave Hansen wrote:
>> diff -puN arch/x86/include/asm/cpuid.h~xsave-leaf-checks-3 arch/x86/include/asm/cpuid.h
>> --- a/arch/x86/include/asm/cpuid.h~xsave-leaf-checks-3	2024-10-30 12:26:59.222216332 -0700
>> +++ b/arch/x86/include/asm/cpuid.h	2024-10-30 12:26:59.238216364 -0700
>> @@ -19,12 +19,12 @@ enum cpuid_regs_idx {
>>  	CPUID_EDX,
>>  };
>>  
>> -#define CPUID_MWAIT_LEAF	0x5
>> -#define CPUID_DCA_LEAF		0x9
>> -#define XSTATE_CPUID		0x0d
>> -#define CPUID_TSC_LEAF		0x15
>> -#define CPUID_FREQ_LEAF		0x16
>> -#define TILE_CPUID		0x1d
>> +#define CPUID_LEAF_MWAIT	0x5
>> +#define CPUID_LEAF_DCA		0x9
>> +#define CPUID_LEAF_XSTATE	0x0d
>> +#define CPUID_LEAF_TSC		0x15
>> +#define CPUID_LEAF_FREQ		0x16
>> +#define CPUID_LEAF_TILE		0x1d
> 
> ... and just to confuse things even more, there's enum cpuid_leafs too which
> start with the "CPUID_" prefix too.
> 
> Pfff.

Yeah, lovely.  'enum cpuid_leafs' does appear misnamed though.  It is a
list of *words*, not actual leaf numbers.  There's also very little
overlap between those leafs and the newly-renamed ones in this series.
I think that's because most of the leaves we dump into the CPU caps have
random feature bits that aren't logically grouped and resist naming.

The one exception to that is the CPUID_D_1_EAX aka. CPUID_LEAF_XSTATE.
We could do something like the attached patch, but I don't think it
really helps much.

> I'd like to unify them and I *think* kvm_cpu_cap_mask() should be able to
> stomach that (or fixed if not)...

Do you mean we could unify the CPUID_8000_0001_EDX enum values and the
CPUID_LEAF_* defines from this series?

I'm not quite sure how that would look.  I think we'd end up doing
something like:

#define CPUID_LEAF_C000_0001 	0xC0000001

and we'd still need some macro magic to munge the word "number" into
there, like:

#define FOO(x,reg) ((x)<<2 | CPUID_##reg)

that could be used this way:

enum cpuid_leafs
{
	...
        FOO(CPUID_LEAF_C000_0001, EDX),

It would let us do stuff like this:

-        case 0xC0000001:
+        case CPUID_LEAF_C000_0001:
                cpuid_entry_override(entry, CPUID_C000_0001_EDX);
                break;

But I'm not sure that makes things all that much more readable or greppable.

[-- Attachment #2: leafd.patch --]
[-- Type: text/x-patch, Size: 550 bytes --]

diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index a5f221ea5688..b44dbb952d8c 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -1001,8 +1001,8 @@ void get_cpu_cap(struct cpuinfo_x86 *c)
 	}
 
 	/* Extended state features: level 0x0000000d */
-	if (c->cpuid_level >= 0x0000000d) {
-		cpuid_count(0x0000000d, 1, &eax, &ebx, &ecx, &edx);
+	if (c->cpuid_level >= CPUID_LEAF_XSTATE) {
+		cpuid_count(CPUID_LEAF_XSTATE, 1, &eax, &ebx, &ecx, &edx);
 
 		c->x86_capability[CPUID_D_1_EAX] = eax;
 	}

Re: [PATCH 11/11] x86/cpu: Make all all CPUID leaf names consistent

[Borislav Petkov]

On Wed, Oct 30, 2024 at 02:33:29PM -0700, Dave Hansen wrote:
> diff -puN arch/x86/include/asm/cpuid.h~xsave-leaf-checks-3 arch/x86/include/asm/cpuid.h
> --- a/arch/x86/include/asm/cpuid.h~xsave-leaf-checks-3	2024-10-30 12:26:59.222216332 -0700
> +++ b/arch/x86/include/asm/cpuid.h	2024-10-30 12:26:59.238216364 -0700
> @@ -19,12 +19,12 @@ enum cpuid_regs_idx {
>  	CPUID_EDX,
>  };
>  
> -#define CPUID_MWAIT_LEAF	0x5
> -#define CPUID_DCA_LEAF		0x9
> -#define XSTATE_CPUID		0x0d
> -#define CPUID_TSC_LEAF		0x15
> -#define CPUID_FREQ_LEAF		0x16
> -#define TILE_CPUID		0x1d
> +#define CPUID_LEAF_MWAIT	0x5
> +#define CPUID_LEAF_DCA		0x9
> +#define CPUID_LEAF_XSTATE	0x0d
> +#define CPUID_LEAF_TSC		0x15
> +#define CPUID_LEAF_FREQ		0x16
> +#define CPUID_LEAF_TILE		0x1d

... and just to confuse things even more, there's enum cpuid_leafs too which
start with the "CPUID_" prefix too.

Pfff.

I'd like to unify them and I *think* kvm_cpu_cap_mask() should be able to
stomach that (or fixed if not)...

-- 
Regards/Gruss,
    Boris.

https://people.kernel.org/tglx/notes-about-netiquette

[PATCH 11/11] x86/cpu: Make all all CPUID leaf names consistent

[Dave Hansen]

From: Dave Hansen <dave.hansen@linux.intel.com>

The leaf names are not consistent.  Give them all a CPUID_LEAF_ prefix
for consistency and vertical alignment.

Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
---

 b/arch/x86/events/intel/pt.c            |    4 ++--
 b/arch/x86/include/asm/cpuid.h          |   12 ++++++------
 b/arch/x86/kernel/acpi/cstate.c         |    2 +-
 b/arch/x86/kernel/cpu/common.c          |    6 +++---
 b/arch/x86/kernel/fpu/xstate.c          |   20 ++++++++++----------
 b/arch/x86/kernel/hpet.c                |    2 +-
 b/arch/x86/kernel/process.c             |    2 +-
 b/arch/x86/kernel/smpboot.c             |    2 +-
 b/arch/x86/kernel/tsc.c                 |   18 +++++++++---------
 b/arch/x86/xen/enlighten_pv.c           |    4 ++--
 b/drivers/acpi/acpi_pad.c               |    2 +-
 b/drivers/dma/ioat/dca.c                |    2 +-
 b/drivers/idle/intel_idle.c             |    2 +-
 b/drivers/platform/x86/intel/pmc/core.c |    4 ++--
 14 files changed, 41 insertions(+), 41 deletions(-)

diff -puN arch/x86/events/intel/pt.c~xsave-leaf-checks-3 arch/x86/events/intel/pt.c
--- a/arch/x86/events/intel/pt.c~xsave-leaf-checks-3	2024-10-30 12:26:59.218216325 -0700
+++ b/arch/x86/events/intel/pt.c	2024-10-30 12:26:59.238216364 -0700
@@ -202,10 +202,10 @@ static int __init pt_pmu_hw_init(void)
 	 * otherwise, zero for numerator stands for "not enumerated"
 	 * as per SDM
 	 */
-	if (boot_cpu_data.cpuid_level >= CPUID_TSC_LEAF) {
+	if (boot_cpu_data.cpuid_level >= CPUID_LEAF_TSC) {
 		u32 eax, ebx, ecx, edx;
 
-		cpuid(CPUID_TSC_LEAF, &eax, &ebx, &ecx, &edx);
+		cpuid(CPUID_LEAF_TSC, &eax, &ebx, &ecx, &edx);
 
 		pt_pmu.tsc_art_num = ebx;
 		pt_pmu.tsc_art_den = eax;
diff -puN arch/x86/include/asm/cpuid.h~xsave-leaf-checks-3 arch/x86/include/asm/cpuid.h
--- a/arch/x86/include/asm/cpuid.h~xsave-leaf-checks-3	2024-10-30 12:26:59.222216332 -0700
+++ b/arch/x86/include/asm/cpuid.h	2024-10-30 12:26:59.238216364 -0700
@@ -19,12 +19,12 @@ enum cpuid_regs_idx {
 	CPUID_EDX,
 };
 
-#define CPUID_MWAIT_LEAF	0x5
-#define CPUID_DCA_LEAF		0x9
-#define XSTATE_CPUID		0x0d
-#define CPUID_TSC_LEAF		0x15
-#define CPUID_FREQ_LEAF		0x16
-#define TILE_CPUID		0x1d
+#define CPUID_LEAF_MWAIT	0x5
+#define CPUID_LEAF_DCA		0x9
+#define CPUID_LEAF_XSTATE	0x0d
+#define CPUID_LEAF_TSC		0x15
+#define CPUID_LEAF_FREQ		0x16
+#define CPUID_LEAF_TILE		0x1d
 
 #ifdef CONFIG_X86_32
 extern int have_cpuid_p(void);
diff -puN arch/x86/kernel/acpi/cstate.c~xsave-leaf-checks-3 arch/x86/kernel/acpi/cstate.c
--- a/arch/x86/kernel/acpi/cstate.c~xsave-leaf-checks-3	2024-10-30 12:26:59.222216332 -0700
+++ b/arch/x86/kernel/acpi/cstate.c	2024-10-30 12:26:59.238216364 -0700
@@ -129,7 +129,7 @@ static long acpi_processor_ffh_cstate_pr
 	unsigned int cstate_type; /* C-state type and not ACPI C-state type */
 	unsigned int num_cstate_subtype;
 
-	cpuid(CPUID_MWAIT_LEAF, &eax, &ebx, &ecx, &edx);
+	cpuid(CPUID_LEAF_MWAIT, &eax, &ebx, &ecx, &edx);
 
 	/* Check whether this particular cx_type (in CST) is supported or not */
 	cstate_type = (((cx->address >> MWAIT_SUBSTATE_SIZE) &
diff -puN arch/x86/kernel/cpu/common.c~xsave-leaf-checks-3 arch/x86/kernel/cpu/common.c
--- a/arch/x86/kernel/cpu/common.c~xsave-leaf-checks-3	2024-10-30 12:26:59.222216332 -0700
+++ b/arch/x86/kernel/cpu/common.c	2024-10-30 12:26:59.238216364 -0700
@@ -637,9 +637,9 @@ struct cpuid_dependent_feature {
 
 static const struct cpuid_dependent_feature
 cpuid_dependent_features[] = {
-	{ X86_FEATURE_MWAIT,		CPUID_MWAIT_LEAF },
-	{ X86_FEATURE_DCA,		CPUID_DCA_LEAF },
-	{ X86_FEATURE_XSAVE,		XSTATE_CPUID },
+	{ X86_FEATURE_MWAIT,		CPUID_LEAF_MWAIT },
+	{ X86_FEATURE_DCA,		CPUID_LEAF_DCA },
+	{ X86_FEATURE_XSAVE,		CPUID_LEAF_XSTATE },
 	{ 0, 0 }
 };
 
diff -puN arch/x86/kernel/fpu/xstate.c~xsave-leaf-checks-3 arch/x86/kernel/fpu/xstate.c
--- a/arch/x86/kernel/fpu/xstate.c~xsave-leaf-checks-3	2024-10-30 12:26:59.226216341 -0700
+++ b/arch/x86/kernel/fpu/xstate.c	2024-10-30 12:26:59.238216364 -0700
@@ -233,7 +233,7 @@ static void __init setup_xstate_cache(vo
 						       xmm_space);
 
 	for_each_extended_xfeature(i, fpu_kernel_cfg.max_features) {
-		cpuid_count(XSTATE_CPUID, i, &eax, &ebx, &ecx, &edx);
+		cpuid_count(CPUID_LEAF_XSTATE, i, &eax, &ebx, &ecx, &edx);
 
 		xstate_sizes[i] = eax;
 		xstate_flags[i] = ecx;
@@ -399,7 +399,7 @@ int xfeature_size(int xfeature_nr)
 	u32 eax, ebx, ecx, edx;
 
 	CHECK_XFEATURE(xfeature_nr);
-	cpuid_count(XSTATE_CPUID, xfeature_nr, &eax, &ebx, &ecx, &edx);
+	cpuid_count(CPUID_LEAF_XSTATE, xfeature_nr, &eax, &ebx, &ecx, &edx);
 	return eax;
 }
 
@@ -442,9 +442,9 @@ static void __init __xstate_dump_leaves(
 	 * just in case there are some goodies up there
 	 */
 	for (i = 0; i < XFEATURE_MAX + 10; i++) {
-		cpuid_count(XSTATE_CPUID, i, &eax, &ebx, &ecx, &edx);
+		cpuid_count(CPUID_LEAF_XSTATE, i, &eax, &ebx, &ecx, &edx);
 		pr_warn("CPUID[%02x, %02x]: eax=%08x ebx=%08x ecx=%08x edx=%08x\n",
-			XSTATE_CPUID, i, eax, ebx, ecx, edx);
+			CPUID_LEAF_XSTATE, i, eax, ebx, ecx, edx);
 	}
 }
 
@@ -485,7 +485,7 @@ static int __init check_xtile_data_again
 	 * Check the maximum palette id:
 	 *   eax: the highest numbered palette subleaf.
 	 */
-	cpuid_count(TILE_CPUID, 0, &max_palid, &ebx, &ecx, &edx);
+	cpuid_count(CPUID_LEAF_TILE, 0, &max_palid, &ebx, &ecx, &edx);
 
 	/*
 	 * Cross-check each tile size and find the maximum number of
@@ -499,7 +499,7 @@ static int __init check_xtile_data_again
 		 *   eax[31:16]:  bytes per title
 		 *   ebx[31:16]:  the max names (or max number of tiles)
 		 */
-		cpuid_count(TILE_CPUID, palid, &eax, &ebx, &edx, &edx);
+		cpuid_count(CPUID_LEAF_TILE, palid, &eax, &ebx, &edx, &edx);
 		tile_size = eax >> 16;
 		max = ebx >> 16;
 
@@ -634,7 +634,7 @@ static unsigned int __init get_compacted
 	 * are no supervisor states, but XSAVEC still uses compacted
 	 * format.
 	 */
-	cpuid_count(XSTATE_CPUID, 1, &eax, &ebx, &ecx, &edx);
+	cpuid_count(CPUID_LEAF_XSTATE, 1, &eax, &ebx, &ecx, &edx);
 	return ebx;
 }
 
@@ -675,7 +675,7 @@ static unsigned int __init get_xsave_siz
 	 *    containing all the *user* state components
 	 *    corresponding to bits currently set in XCR0.
 	 */
-	cpuid_count(XSTATE_CPUID, 0, &eax, &ebx, &ecx, &edx);
+	cpuid_count(CPUID_LEAF_XSTATE, 0, &eax, &ebx, &ecx, &edx);
 	return ebx;
 }
 
@@ -767,13 +767,13 @@ void __init fpu__init_system_xstate(unsi
 	/*
 	 * Find user xstates supported by the processor.
 	 */
-	cpuid_count(XSTATE_CPUID, 0, &eax, &ebx, &ecx, &edx);
+	cpuid_count(CPUID_LEAF_XSTATE, 0, &eax, &ebx, &ecx, &edx);
 	fpu_kernel_cfg.max_features = eax + ((u64)edx << 32);
 
 	/*
 	 * Find supervisor xstates supported by the processor.
 	 */
-	cpuid_count(XSTATE_CPUID, 1, &eax, &ebx, &ecx, &edx);
+	cpuid_count(CPUID_LEAF_XSTATE, 1, &eax, &ebx, &ecx, &edx);
 	fpu_kernel_cfg.max_features |= ecx + ((u64)edx << 32);
 
 	if ((fpu_kernel_cfg.max_features & XFEATURE_MASK_FPSSE) != XFEATURE_MASK_FPSSE) {
diff -puN arch/x86/kernel/hpet.c~xsave-leaf-checks-3 arch/x86/kernel/hpet.c
--- a/arch/x86/kernel/hpet.c~xsave-leaf-checks-3	2024-10-30 12:26:59.226216341 -0700
+++ b/arch/x86/kernel/hpet.c	2024-10-30 12:26:59.238216364 -0700
@@ -928,7 +928,7 @@ static bool __init mwait_pc10_supported(
 	if (!cpu_feature_enabled(X86_FEATURE_MWAIT))
 		return false;
 
-	cpuid(CPUID_MWAIT_LEAF, &eax, &ebx, &ecx, &mwait_substates);
+	cpuid(CPUID_LEAF_MWAIT, &eax, &ebx, &ecx, &mwait_substates);
 
 	return (ecx & CPUID5_ECX_EXTENSIONS_SUPPORTED) &&
 	       (ecx & CPUID5_ECX_INTERRUPT_BREAK) &&
diff -puN arch/x86/kernel/process.c~xsave-leaf-checks-3 arch/x86/kernel/process.c
--- a/arch/x86/kernel/process.c~xsave-leaf-checks-3	2024-10-30 12:26:59.226216341 -0700
+++ b/arch/x86/kernel/process.c	2024-10-30 12:26:59.238216364 -0700
@@ -878,7 +878,7 @@ static __init bool prefer_mwait_c1_over_
 	if (boot_cpu_has_bug(X86_BUG_MONITOR) || boot_cpu_has_bug(X86_BUG_AMD_APIC_C1E))
 		return false;
 
-	cpuid(CPUID_MWAIT_LEAF, &eax, &ebx, &ecx, &edx);
+	cpuid(CPUID_LEAF_MWAIT, &eax, &ebx, &ecx, &edx);
 
 	/*
 	 * If MWAIT extensions are not available, it is safe to use MWAIT
diff -puN arch/x86/kernel/smpboot.c~xsave-leaf-checks-3 arch/x86/kernel/smpboot.c
--- a/arch/x86/kernel/smpboot.c~xsave-leaf-checks-3	2024-10-30 12:26:59.226216341 -0700
+++ b/arch/x86/kernel/smpboot.c	2024-10-30 12:26:59.238216364 -0700
@@ -1292,7 +1292,7 @@ static inline void mwait_play_dead(void)
 	if (!this_cpu_has(X86_FEATURE_CLFLUSH))
 		return;
 
-	eax = CPUID_MWAIT_LEAF;
+	eax = CPUID_LEAF_MWAIT;
 	ecx = 0;
 	native_cpuid(&eax, &ebx, &ecx, &edx);
 
diff -puN arch/x86/kernel/tsc.c~xsave-leaf-checks-3 arch/x86/kernel/tsc.c
--- a/arch/x86/kernel/tsc.c~xsave-leaf-checks-3	2024-10-30 12:26:59.230216349 -0700
+++ b/arch/x86/kernel/tsc.c	2024-10-30 12:26:59.238216364 -0700
@@ -665,13 +665,13 @@ unsigned long native_calibrate_tsc(void)
 	if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL)
 		return 0;
 
-	if (boot_cpu_data.cpuid_level < CPUID_TSC_LEAF)
+	if (boot_cpu_data.cpuid_level < CPUID_LEAF_TSC)
 		return 0;
 
 	eax_denominator = ebx_numerator = ecx_hz = edx = 0;
 
 	/* CPUID 15H TSC/Crystal ratio, plus optionally Crystal Hz */
-	cpuid(CPUID_TSC_LEAF, &eax_denominator, &ebx_numerator, &ecx_hz, &edx);
+	cpuid(CPUID_LEAF_TSC, &eax_denominator, &ebx_numerator, &ecx_hz, &edx);
 
 	if (ebx_numerator == 0 || eax_denominator == 0)
 		return 0;
@@ -680,7 +680,7 @@ unsigned long native_calibrate_tsc(void)
 
 	/*
 	 * Denverton SoCs don't report crystal clock, and also don't support
-	 * CPUID_FREQ_LEAF for the calculation below, so hardcode the 25MHz
+	 * CPUID_LEAF_FREQ for the calculation below, so hardcode the 25MHz
 	 * crystal clock.
 	 */
 	if (crystal_khz == 0 &&
@@ -700,10 +700,10 @@ unsigned long native_calibrate_tsc(void)
 	 * clock, but we can easily calculate it to a high degree of accuracy
 	 * by considering the crystal ratio and the CPU speed.
 	 */
-	if (crystal_khz == 0 && boot_cpu_data.cpuid_level >= CPUID_FREQ_LEAF) {
+	if (crystal_khz == 0 && boot_cpu_data.cpuid_level >= CPUID_LEAF_FREQ) {
 		unsigned int eax_base_mhz, ebx, ecx, edx;
 
-		cpuid(CPUID_FREQ_LEAF, &eax_base_mhz, &ebx, &ecx, &edx);
+		cpuid(CPUID_LEAF_FREQ, &eax_base_mhz, &ebx, &ecx, &edx);
 		crystal_khz = eax_base_mhz * 1000 *
 			eax_denominator / ebx_numerator;
 	}
@@ -738,12 +738,12 @@ static unsigned long cpu_khz_from_cpuid(
 	if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL)
 		return 0;
 
-	if (boot_cpu_data.cpuid_level < CPUID_FREQ_LEAF)
+	if (boot_cpu_data.cpuid_level < CPUID_LEAF_FREQ)
 		return 0;
 
 	eax_base_mhz = ebx_max_mhz = ecx_bus_mhz = edx = 0;
 
-	cpuid(CPUID_FREQ_LEAF, &eax_base_mhz, &ebx_max_mhz, &ecx_bus_mhz, &edx);
+	cpuid(CPUID_LEAF_FREQ, &eax_base_mhz, &ebx_max_mhz, &ecx_bus_mhz, &edx);
 
 	return eax_base_mhz * 1000;
 }
@@ -1076,7 +1076,7 @@ static void __init detect_art(void)
 {
 	unsigned int unused;
 
-	if (boot_cpu_data.cpuid_level < CPUID_TSC_LEAF)
+	if (boot_cpu_data.cpuid_level < CPUID_LEAF_TSC)
 		return;
 
 	/*
@@ -1089,7 +1089,7 @@ static void __init detect_art(void)
 	    tsc_async_resets)
 		return;
 
-	cpuid(CPUID_TSC_LEAF, &art_base_clk.denominator,
+	cpuid(CPUID_LEAF_TSC, &art_base_clk.denominator,
 	      &art_base_clk.numerator, &art_base_clk.freq_khz, &unused);
 
 	art_base_clk.freq_khz /= KHZ;
diff -puN arch/x86/xen/enlighten_pv.c~xsave-leaf-checks-3 arch/x86/xen/enlighten_pv.c
--- a/arch/x86/xen/enlighten_pv.c~xsave-leaf-checks-3	2024-10-30 12:26:59.230216349 -0700
+++ b/arch/x86/xen/enlighten_pv.c	2024-10-30 12:26:59.238216364 -0700
@@ -231,7 +231,7 @@ static void xen_cpuid(unsigned int *ax,
 		or_ebx = smp_processor_id() << 24;
 		break;
 
-	case CPUID_MWAIT_LEAF:
+	case CPUID_LEAF_MWAIT:
 		/* Synthesize the values.. */
 		*ax = 0;
 		*bx = 0;
@@ -301,7 +301,7 @@ static bool __init xen_check_mwait(void)
 	 * ecx and edx. The hypercall provides only partial information.
 	 */
 
-	ax = CPUID_MWAIT_LEAF;
+	ax = CPUID_LEAF_MWAIT;
 	bx = 0;
 	cx = 0;
 	dx = 0;
diff -puN drivers/acpi/acpi_pad.c~xsave-leaf-checks-3 drivers/acpi/acpi_pad.c
--- a/drivers/acpi/acpi_pad.c~xsave-leaf-checks-3	2024-10-30 12:26:59.230216349 -0700
+++ b/drivers/acpi/acpi_pad.c	2024-10-30 12:26:59.238216364 -0700
@@ -48,7 +48,7 @@ static void power_saving_mwait_init(void
 	if (!boot_cpu_has(X86_FEATURE_MWAIT))
 		return;
 
-	cpuid(CPUID_MWAIT_LEAF, &eax, &ebx, &ecx, &edx);
+	cpuid(CPUID_LEAF_MWAIT, &eax, &ebx, &ecx, &edx);
 
 	if (!(ecx & CPUID5_ECX_EXTENSIONS_SUPPORTED) ||
 	    !(ecx & CPUID5_ECX_INTERRUPT_BREAK))
diff -puN drivers/dma/ioat/dca.c~xsave-leaf-checks-3 drivers/dma/ioat/dca.c
--- a/drivers/dma/ioat/dca.c~xsave-leaf-checks-3	2024-10-30 12:26:59.234216356 -0700
+++ b/drivers/dma/ioat/dca.c	2024-10-30 12:26:59.238216364 -0700
@@ -63,7 +63,7 @@ static int dca_enabled_in_bios(struct pc
 	u32 eax;
 	int res;
 
-	eax = cpuid_eax(CPUID_DCA_LEAF);
+	eax = cpuid_eax(CPUID_LEAF_DCA);
 	res = eax & BIT(0);
 	if (!res)
 		dev_dbg(&pdev->dev, "DCA is disabled in BIOS\n");
diff -puN drivers/idle/intel_idle.c~xsave-leaf-checks-3 drivers/idle/intel_idle.c
--- a/drivers/idle/intel_idle.c~xsave-leaf-checks-3	2024-10-30 12:26:59.234216356 -0700
+++ b/drivers/idle/intel_idle.c	2024-10-30 12:26:59.242216372 -0700
@@ -2269,7 +2269,7 @@ static int __init intel_idle_init(void)
 			return -ENODEV;
 	}
 
-	cpuid(CPUID_MWAIT_LEAF, &eax, &ebx, &ecx, &mwait_substates);
+	cpuid(CPUID_LEAF_MWAIT, &eax, &ebx, &ecx, &mwait_substates);
 
 	if (!(ecx & CPUID5_ECX_EXTENSIONS_SUPPORTED) ||
 	    !(ecx & CPUID5_ECX_INTERRUPT_BREAK) ||
diff -puN drivers/platform/x86/intel/pmc/core.c~xsave-leaf-checks-3 drivers/platform/x86/intel/pmc/core.c
--- a/drivers/platform/x86/intel/pmc/core.c~xsave-leaf-checks-3	2024-10-30 12:26:59.234216356 -0700
+++ b/drivers/platform/x86/intel/pmc/core.c	2024-10-30 12:26:59.242216372 -0700
@@ -937,13 +937,13 @@ static unsigned int pmc_core_get_crystal
 {
 	unsigned int eax_denominator, ebx_numerator, ecx_hz, edx;
 
-	if (boot_cpu_data.cpuid_level < CPUID_TSC_LEAF)
+	if (boot_cpu_data.cpuid_level < CPUID_LEAF_TSC)
 		return 0;
 
 	eax_denominator = ebx_numerator = ecx_hz = edx = 0;
 
 	/* TSC/Crystal ratio, plus optionally Crystal Hz */
-	cpuid(CPUID_TSC_LEAF, &eax_denominator, &ebx_numerator, &ecx_hz, &edx);
+	cpuid(CPUID_LEAF_TSC, &eax_denominator, &ebx_numerator, &ecx_hz, &edx);
 
 	if (ebx_numerator == 0 || eax_denominator == 0)
 		return 0;
_