* [PATCH v2 0/3] arm64: dts: Add support for Ultratronik i.MX8MP Ultra-MACH SBC
@ 2025-06-11 11:30 Goran Rađenović
2025-06-11 11:30 ` [PATCH v2 1/3] MAINTAINERS: Add i.MX8MP Ultra-MACH SBC to ULTRATRONIK BOARD SUPPORT Goran Rađenović
` (3 more replies)
0 siblings, 4 replies; 12+ messages in thread
From: Goran Rađenović @ 2025-06-11 11:30 UTC (permalink / raw)
To: robh, krzk+dt, conor+dt, shawnguo, boerge.struempfel
Cc: Goran Rađenović, devicetree, linux-kernel
This patch series adds support for the Ultratronik i.MX8MP-based Ultra-MACH SBC.
The Ultra-MACH SBC is an industrial-grade single-board computer based on the NXP i.MX8M Plus SoC. This initial support includes:
- Updating the MAINTAINERS file to include the new board in the Ultratronik support section.
- Adding a compatible string entry for the board to `fsl.yaml` in device tree bindings.
- Introducing a new device tree source file `imx8mp-ultra-mach-sbc.dts` with basic hardware support.
This series is modeled after the support added for the STM32MP157C-based Ultra-FLY SBC and aims to follow the conventions used for other i.MX8MP boards in mainline..
Changes in v2:
- Use `enum` with `const:` values in fsl.yaml to correctly represent multiple compatibles.
- Updated SPI child node name to use the generic `nfc-transceiver` per DT naming conventions.
- Renamed several peripheral nodes (`crypto@35`, `pmic@25`, etc.) to standard names.
- Minor formatting cleanup and compliance fixes per review feedback.
Tested on hardware with:
- Serial console
- HDMI output via LCDIF pipeline
- eMMC and SD boot
- USB gadget and host modes
- Ethernet and basic SPI/I2C devices
Feedback is welcome.
Goran Rađenović (3):
MAINTAINERS: Add i.MX8MP Ultra-MACH SBC to ULTRATRONIK BOARD SUPPORT
dt-bindings: arm: imx8mp: Add Ultratronik Ultra-MACH SBC
arm64: dts: imx8mp: Add initial support for Ultratronik
imx8mp-ultra-mach-sbc board
Documentation/devicetree/bindings/arm/fsl.yaml | 6 +
MAINTAINERS | 1 +
arch/arm64/boot/dts/freescale/Makefile | 1 +
arch/arm64/boot/dts/freescale/imx8mp-ultra-mach-sbc.dts | 909 ++++++++++++++++++
4 files changed, 917 insertions(+)
create mode 100644 arch/arm64/boot/dts/freescale/imx8mp-ultra-mach-sbc.dts
base-commit: cd2e103d57e5615f9bb027d772f93b9efd567224
--
2.43.0
^ permalink raw reply [flat|nested] 12+ messages in thread* [PATCH v2 1/3] MAINTAINERS: Add i.MX8MP Ultra-MACH SBC to ULTRATRONIK BOARD SUPPORT 2025-06-11 11:30 [PATCH v2 0/3] arm64: dts: Add support for Ultratronik i.MX8MP Ultra-MACH SBC Goran Rađenović @ 2025-06-11 11:30 ` Goran Rađenović 2025-06-11 11:30 ` [PATCH v2 2/3] dt-bindings: arm: imx8mp: Add Ultratronik Ultra-MACH SBC Goran Rađenović ` (2 subsequent siblings) 3 siblings, 0 replies; 12+ messages in thread From: Goran Rađenović @ 2025-06-11 11:30 UTC (permalink / raw) Cc: Goran Rađenović, linux-kernel The i.MX8MP-based Ultra-MACH SBC is supported by Ultratronik, and its device tree has been added under arch/arm64/boot/dts/freescale/. To ensure proper maintainer coverage and notification of relevant changes, add the imx8mp-ultra-mach-sbc.dts file to the existing ULTRATRONIK BOARD SUPPORT section. This follows the established pattern already used for the STM32MP157C- based Ultra-FLY SBC. Signed-off-by: Goran Rađenović <goran.radni@gmail.com> --- MAINTAINERS | 1 + 1 file changed, 1 insertion(+) diff --git a/MAINTAINERS b/MAINTAINERS index 75da23034e18..d830e6709c82 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -25281,6 +25281,7 @@ M: Goran Rađenović <goran.radni@gmail.com> M: Börge Strümpfel <boerge.struempfel@gmail.com> S: Maintained F: arch/arm/boot/dts/st/stm32mp157c-ultra-fly-sbc.dts +F: arch/arm64/boot/dts/freescale/imx8mp-ultra-mach-sbc.dts UNICODE SUBSYSTEM M: Gabriel Krisman Bertazi <krisman@kernel.org> -- 2.43.0 ^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH v2 2/3] dt-bindings: arm: imx8mp: Add Ultratronik Ultra-MACH SBC 2025-06-11 11:30 [PATCH v2 0/3] arm64: dts: Add support for Ultratronik i.MX8MP Ultra-MACH SBC Goran Rađenović 2025-06-11 11:30 ` [PATCH v2 1/3] MAINTAINERS: Add i.MX8MP Ultra-MACH SBC to ULTRATRONIK BOARD SUPPORT Goran Rađenović @ 2025-06-11 11:30 ` Goran Rađenović 2025-06-12 0:07 ` Rob Herring (Arm) 2025-06-12 7:09 ` Krzysztof Kozlowski 2025-06-11 11:30 ` [PATCH v2 3/3] arm64: dts: imx8mp: Add initial support for Ultratronik imx8mp-ultra-mach-sbc board Goran Rađenović 2025-06-11 13:11 ` [PATCH v2 0/3] arm64: dts: Add support for Ultratronik i.MX8MP Ultra-MACH SBC Rob Herring (Arm) 3 siblings, 2 replies; 12+ messages in thread From: Goran Rađenović @ 2025-06-11 11:30 UTC (permalink / raw) To: boerge.struempfel, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Shawn Guo Cc: Goran Rađenović, devicetree, linux-kernel Document the Ultratronik Ultra-MACH SBC, based on the NXP i.MX8MP SoC. This board is manufactured by Ultratronik GmbH and uses the compatible string "ux,imx8mp-ultra-mach-sbc". Signed-off-by: Goran Rađenović <goran.radni@gmail.com> --- Documentation/devicetree/bindings/arm/fsl.yaml | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml index d3b5e6923e41..132a6f39b59a 100644 --- a/Documentation/devicetree/bindings/arm/fsl.yaml +++ b/Documentation/devicetree/bindings/arm/fsl.yaml @@ -1232,6 +1232,12 @@ properties: - const: tq,imx8mp-tqma8mpql # TQ-Systems GmbH i.MX8MP TQMa8MPQL SOM - const: fsl,imx8mp + - description: Ultratronik SBC i.MX8MP based boards + items: + - enum: + - const: ultratronik,imx8mp-ultra-mach-sbc + - const: fsl,imx8mp + - description: Variscite VAR-SOM-MX8M Plus based boards items: - const: variscite,var-som-mx8mp-symphony -- 2.43.0 ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v2 2/3] dt-bindings: arm: imx8mp: Add Ultratronik Ultra-MACH SBC 2025-06-11 11:30 ` [PATCH v2 2/3] dt-bindings: arm: imx8mp: Add Ultratronik Ultra-MACH SBC Goran Rađenović @ 2025-06-12 0:07 ` Rob Herring (Arm) 2025-06-12 7:09 ` Krzysztof Kozlowski 1 sibling, 0 replies; 12+ messages in thread From: Rob Herring (Arm) @ 2025-06-12 0:07 UTC (permalink / raw) To: Goran Rađenović Cc: Shawn Guo, Conor Dooley, boerge.struempfel, Krzysztof Kozlowski, linux-kernel, devicetree On Wed, 11 Jun 2025 13:30:37 +0200, Goran Rađenović wrote: > Document the Ultratronik Ultra-MACH SBC, based on the NXP i.MX8MP SoC. > > This board is manufactured by Ultratronik GmbH and uses the compatible > string "ux,imx8mp-ultra-mach-sbc". > > Signed-off-by: Goran Rađenović <goran.radni@gmail.com> > --- > Documentation/devicetree/bindings/arm/fsl.yaml | 6 ++++++ > 1 file changed, 6 insertions(+) > My bot found errors running 'make dt_binding_check' on your patch: yamllint warnings/errors: dtschema/dtc warnings/errors: /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/arm/fsl.yaml: properties:compatible:oneOf:130:items:0:enum: 'oneOf' conditional failed, one must be fixed: {'const': 'ultratronik,imx8mp-ultra-mach-sbc'} is not of type 'integer' {'const': 'ultratronik,imx8mp-ultra-mach-sbc'} is not of type 'string' {'const': 'fsl,imx8mp'} is not of type 'integer' {'const': 'fsl,imx8mp'} is not of type 'string' hint: "enum" must be an array of either integers or strings from schema $id: http://devicetree.org/meta-schemas/keywords.yaml# /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/arm/fsl.yaml: properties:compatible:oneOf:130:items:0:enum:0: {'const': 'ultratronik,imx8mp-ultra-mach-sbc'} is not of type 'string' from schema $id: http://devicetree.org/meta-schemas/string-array.yaml# /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/arm/fsl.yaml: properties:compatible:oneOf:130:items:0:enum:1: {'const': 'fsl,imx8mp'} is not of type 'string' from schema $id: http://devicetree.org/meta-schemas/string-array.yaml# doc reference errors (make refcheckdocs): See https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20250611113039.304742-3-goran.radni@gmail.com The base for the series is generally the latest rc1. A different dependency should be noted in *this* patch. If you already ran 'make dt_binding_check' and didn't see the above error(s), then make sure 'yamllint' is installed and dt-schema is up to date: pip3 install dtschema --upgrade Please check and re-submit after running the above command yourself. Note that DT_SCHEMA_FILES can be set to your schema file to speed up checking your schema. However, it must be unset to test all examples with your schema. ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v2 2/3] dt-bindings: arm: imx8mp: Add Ultratronik Ultra-MACH SBC 2025-06-11 11:30 ` [PATCH v2 2/3] dt-bindings: arm: imx8mp: Add Ultratronik Ultra-MACH SBC Goran Rađenović 2025-06-12 0:07 ` Rob Herring (Arm) @ 2025-06-12 7:09 ` Krzysztof Kozlowski 2025-06-12 10:09 ` Goran Radenovic 1 sibling, 1 reply; 12+ messages in thread From: Krzysztof Kozlowski @ 2025-06-12 7:09 UTC (permalink / raw) To: Goran Rađenović Cc: boerge.struempfel, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Shawn Guo, devicetree, linux-kernel On Wed, Jun 11, 2025 at 01:30:37PM GMT, Goran Rađenović wrote: > Document the Ultratronik Ultra-MACH SBC, based on the NXP i.MX8MP SoC. > > This board is manufactured by Ultratronik GmbH and uses the compatible > string "ux,imx8mp-ultra-mach-sbc". > > Signed-off-by: Goran Rađenović <goran.radni@gmail.com> > --- > Documentation/devicetree/bindings/arm/fsl.yaml | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml > index d3b5e6923e41..132a6f39b59a 100644 > --- a/Documentation/devicetree/bindings/arm/fsl.yaml > +++ b/Documentation/devicetree/bindings/arm/fsl.yaml > @@ -1232,6 +1232,12 @@ properties: > - const: tq,imx8mp-tqma8mpql # TQ-Systems GmbH i.MX8MP TQMa8MPQL SOM > - const: fsl,imx8mp > > + - description: Ultratronik SBC i.MX8MP based boards > + items: > + - enum: Nothing improved... got actually worse, because you never tested it. ^ | Look here. This is '+' means you added it. My previous comment was that it should be part of previous enum. If you add enum, then it is not part of previous, right? Best regards, Krzysztof ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v2 2/3] dt-bindings: arm: imx8mp: Add Ultratronik Ultra-MACH SBC 2025-06-12 7:09 ` Krzysztof Kozlowski @ 2025-06-12 10:09 ` Goran Radenovic 2025-06-12 11:01 ` Krzysztof Kozlowski 0 siblings, 1 reply; 12+ messages in thread From: Goran Radenovic @ 2025-06-12 10:09 UTC (permalink / raw) To: Krzysztof Kozlowski Cc: boerge.struempfel, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Shawn Guo, devicetree, linux-kernel Hi Krzysztof, Thanks for the feedback, and you're absolutely right — I made a mistake here. That said, I’m still a bit confused by your earlier comment: "That's just part of the standard/first enum." I’m introducing a new board from a new manufacturer, so I expected to add a new enum block — similar to how it's done for other vendor entries in the same file. I ran dt_binding_check, and it passed without errors for this structure. Could you clarify which “standard/first enum” you were referring to? Should all i.MX8MP-based boards share a single enum block, regardless of vendor? Thanks again for your guidance. Best regards, Goran Krzysztof Kozlowski wrote: > On Wed, Jun 11, 2025 at 01:30:37PM GMT, Goran Rađenović wrote: >> Document the Ultratronik Ultra-MACH SBC, based on the NXP i.MX8MP SoC. >> >> This board is manufactured by Ultratronik GmbH and uses the compatible >> string "ux,imx8mp-ultra-mach-sbc". >> >> Signed-off-by: Goran Rađenović <goran.radni@gmail.com> >> --- >> Documentation/devicetree/bindings/arm/fsl.yaml | 6 ++++++ >> 1 file changed, 6 insertions(+) >> >> diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml >> index d3b5e6923e41..132a6f39b59a 100644 >> --- a/Documentation/devicetree/bindings/arm/fsl.yaml >> +++ b/Documentation/devicetree/bindings/arm/fsl.yaml >> @@ -1232,6 +1232,12 @@ properties: >> - const: tq,imx8mp-tqma8mpql # TQ-Systems GmbH i.MX8MP TQMa8MPQL SOM >> - const: fsl,imx8mp >> >> + - description: Ultratronik SBC i.MX8MP based boards >> + items: >> + - enum: > > Nothing improved... got actually worse, because you never tested it. > > ^ > | > Look here. This is '+' means you added it. My previous comment was that > it should be part of previous enum. If you add enum, then it is not part > of previous, right? > > Best regards, > Krzysztof > ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v2 2/3] dt-bindings: arm: imx8mp: Add Ultratronik Ultra-MACH SBC 2025-06-12 10:09 ` Goran Radenovic @ 2025-06-12 11:01 ` Krzysztof Kozlowski 2025-06-20 8:53 ` Goran Radenovic 0 siblings, 1 reply; 12+ messages in thread From: Krzysztof Kozlowski @ 2025-06-12 11:01 UTC (permalink / raw) To: Goran Radenovic Cc: boerge.struempfel, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Shawn Guo, devicetree, linux-kernel On 12/06/2025 12:09, Goran Radenovic wrote: > Hi Krzysztof, > > Thanks for the feedback, and you're absolutely right — I made a mistake > here. > > That said, I’m still a bit confused by your earlier comment: > > "That's just part of the standard/first enum." > > I’m introducing a new board from a new manufacturer, so I expected to > add a new enum block — similar to how it's done for other vendor entries No, you are expected to add to existing enum. > in the same file. I ran dt_binding_check, and it passed without errors > for this structure. Not possible. The syntax is clearly wrong, so there is no way it passed any tests. And Rob's report is a proof of that. > > Could you clarify which “standard/first enum” you were referring to? > Should all i.MX8MP-based boards share a single enum block, regardless of > vendor? Don't they? Look around in this file. > > Thanks again for your guidance. Don't top post but reply inline. Best regards, Krzysztof ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v2 2/3] dt-bindings: arm: imx8mp: Add Ultratronik Ultra-MACH SBC 2025-06-12 11:01 ` Krzysztof Kozlowski @ 2025-06-20 8:53 ` Goran Radenovic 0 siblings, 0 replies; 12+ messages in thread From: Goran Radenovic @ 2025-06-20 8:53 UTC (permalink / raw) To: Krzysztof Kozlowski Cc: boerge.struempfel, Rob Herring, Krzysztof Kozlowski, devicetree, linux-kernel Krzysztof Kozlowski wrote: > On 12/06/2025 12:09, Goran Radenovic wrote: >> Hi Krzysztof, >> >> Thanks for the feedback, and you're absolutely right — I made a mistake >> here. >> >> That said, I’m still a bit confused by your earlier comment: >> >> "That's just part of the standard/first enum." >> >> I’m introducing a new board from a new manufacturer, so I expected to >> add a new enum block — similar to how it's done for other vendor entries > > No, you are expected to add to existing enum. Very well, I'll add the entry to the existing `description: i.MX8MP based Boards` block. > >> in the same file. I ran dt_binding_check, and it passed without errors >> for this structure. > > Not possible. The syntax is clearly wrong, so there is no way it passed > any tests. And Rob's report is a proof of that. > You are right for v2. I was referring to v1. Sorry for the confusion. >> >> Could you clarify which “standard/first enum” you were referring to? >> Should all i.MX8MP-based boards share a single enum block, regardless of >> vendor? > > Don't they? Look around in this file. > I did, and I've learned something. >> >> Thanks again for your guidance. > > Don't top post but reply inline. > Ok, thank you for the correction. > Best regards, > Krzysztof Best regards Goran ^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH v2 3/3] arm64: dts: imx8mp: Add initial support for Ultratronik imx8mp-ultra-mach-sbc board 2025-06-11 11:30 [PATCH v2 0/3] arm64: dts: Add support for Ultratronik i.MX8MP Ultra-MACH SBC Goran Rađenović 2025-06-11 11:30 ` [PATCH v2 1/3] MAINTAINERS: Add i.MX8MP Ultra-MACH SBC to ULTRATRONIK BOARD SUPPORT Goran Rađenović 2025-06-11 11:30 ` [PATCH v2 2/3] dt-bindings: arm: imx8mp: Add Ultratronik Ultra-MACH SBC Goran Rađenović @ 2025-06-11 11:30 ` Goran Rađenović 2025-06-11 15:34 ` Frank Li 2025-06-11 13:11 ` [PATCH v2 0/3] arm64: dts: Add support for Ultratronik i.MX8MP Ultra-MACH SBC Rob Herring (Arm) 3 siblings, 1 reply; 12+ messages in thread From: Goran Rađenović @ 2025-06-11 11:30 UTC (permalink / raw) To: boerge.struempfel, Shawn Guo, Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Goran Rađenović Cc: imx, linux-arm-kernel, devicetree, linux-kernel Add initial device tree support for the Ultratronik Ultra-MACH SBC based on the NXP i.MX8M Plus SoC with 2GB LPDDR4. The board features: - 1 x USB 2.0 Host - 1 x USB 2.0 via USB-C - Debug UART + 1 x UART + 1 x USART - SD card and eMMC support - 2 x Ethernet (RJ45) - HDMI This initial DTS enables basic board support for booting via SD card or eMMC. Signed-off-by: Goran Rađenović <goran.radni@gmail.com> --- arch/arm64/boot/dts/freescale/Makefile | 1 + .../dts/freescale/imx8mp-ultra-mach-sbc.dts | 909 ++++++++++++++++++ 2 files changed, 910 insertions(+) create mode 100644 arch/arm64/boot/dts/freescale/imx8mp-ultra-mach-sbc.dts diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile index 0b473a23d120..e2f2500238fe 100644 --- a/arch/arm64/boot/dts/freescale/Makefile +++ b/arch/arm64/boot/dts/freescale/Makefile @@ -229,6 +229,7 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mp-skov-revc-tian-g07017.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mp-toradex-smarc-dev.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mp-tqma8mpql-mba8mpxl.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mp-tqma8mpql-mba8mp-ras314.dtb +dtb-$(CONFIG_ARCH_MXC) += imx8mp-ultra-mach-sbc.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mp-var-som-symphony.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mp-venice-gw71xx-2x.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mp-venice-gw72xx-2x.dtb diff --git a/arch/arm64/boot/dts/freescale/imx8mp-ultra-mach-sbc.dts b/arch/arm64/boot/dts/freescale/imx8mp-ultra-mach-sbc.dts new file mode 100644 index 000000000000..cb99145a4308 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8mp-ultra-mach-sbc.dts @@ -0,0 +1,909 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (C) 2025 Ultratronik + */ + +/dts-v1/; + +#include <dt-bindings/usb/pd.h> +#include "imx8mp.dtsi" + +/ { + model = "NXP i.MX8MPlus Ultratronik MMI_A53 board"; + compatible = "ultratronik,imx8mp-ultra-mach-sbc", "fsl,imx8mp"; + + aliases { + ethernet0 = &fec; + ethernet1 = &eqos; + rtc0 = &hwrtc; + rtc1 = &snvs_rtc; + }; + + chosen { + stdout-path = &uart2; + }; + + gpio-sbu-mux { + compatible = "nxp,cbdtu02043", "gpio-sbu-mux"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_sbu_mux>; + select-gpios = <&gpio4 20 GPIO_ACTIVE_HIGH>; + enable-gpios = <&gpio2 20 GPIO_ACTIVE_HIGH>; + orientation-switch; + + port { + usb3_data_ss: endpoint { + remote-endpoint = <&typec_con_ss>; + }; + }; + }; + + gpio-keys { + compatible = "gpio-keys"; + + button-0 { + gpios = <&gpio4 27 GPIO_ACTIVE_LOW>; /* Wakeup */ + label = "Wakeup"; + linux,code = <KEY_WAKEUP>; + pinctrl-0 = <&pinctrl_gpio_key_wakeup>; + pinctrl-names = "default"; + wakeup-source; + }; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpio_leds>; + + led1 { + label = "red"; + gpios = <&gpio4 24 GPIO_ACTIVE_HIGH>; + default-state = "off"; + }; + + led2 { + label = "green"; + gpios = <&gpio4 25 GPIO_ACTIVE_HIGH>; + default-state = "off"; + }; + + led3 { + label = "yellow"; + gpios = <&gpio4 26 GPIO_ACTIVE_HIGH>; + default-state = "off"; + }; + }; + + reg_usba_vbus: regulator-usba-vbus { + compatible = "regulator-fixed"; + regulator-name = "usb-A-vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-names="default"; + pinctrl-0 = <&pinctrl_usb1>; + }; + + reg_usdhc2_vmmc: regulator-usdhc2 { + compatible = "regulator-fixed"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>; + regulator-name = "VSD_3V3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; +}; + +&A53_0 { + cpu-supply = <&buck2>; +}; + +&A53_1 { + cpu-supply = <&buck2>; +}; + +&A53_2 { + cpu-supply = <&buck2>; +}; + +&A53_3 { + cpu-supply = <&buck2>; +}; + +&ecspi1 { + #address-cells = <1>; + #size-cells = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ecspi1 &pinctrl_ecspi1_cs>; + cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>; + status = "okay"; + + slb9670: tpm@0 { + compatible = "infineon,slb9670", "tcg,tpm_tis-spi"; + reg = <0>; + spi-max-frequency = <32000000>; + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_slb9670>; + interrupt-parent = <&gpio1>; + interrupts = <0 IRQ_TYPE_LEVEL_LOW>; + }; +}; + +&ecspi2 { + #address-cells = <1>; + #size-cells = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ecspi2 &pinctrl_ecspi2_cs>; + cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>, + <&gpio1 8 GPIO_ACTIVE_LOW>, + <&gpio1 9 GPIO_ACTIVE_LOW>; + status = "okay"; + + nfc_transceiver@1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_nfc>; + reg = <1>; + compatible = "st,st95hf"; + spi-max-frequency = <100000>; + interrupt-parent = <&gpio1>; + interrupts = <7 IRQ_TYPE_EDGE_FALLING>; + enable-gpio = <&gpio1 6 GPIO_ACTIVE_HIGH>; + status = "okay"; + }; +}; + +&eqos { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_eqos>; + phy-mode = "rgmii-id"; + phy-handle = <ðphy0>; + status = "okay"; + + mdio { + compatible = "snps,dwmac-mdio"; + #address-cells = <1>; + #size-cells = <0>; + + ethphy0: ethernet-phy@1 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <0x1>; + interrupt-parent = <&gpio4>; + interrupts = <18 IRQ_TYPE_LEVEL_LOW>; + }; + }; +}; + +&fec { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_fec>; + phy-mode = "rgmii-id"; + phy-handle = <ðphy1>; + fsl,magic-packet; + status = "okay"; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + ethphy1: ethernet-phy@2 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <0x2>; + interrupt-parent = <&gpio4>; + interrupts = <1 IRQ_TYPE_LEVEL_LOW>; + }; + }; +}; + +&flexcan1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_flexcan1>; + status = "okay"; +}; + +&gpio1 { + gpio-line-names = + "#TPM_IRQ", "GPIO1", "", "#PMIC_INT", + "SD2_VSEL", "#TOUCH_IRQ", "#NFC_INT_I", "#NFC_INT", + "#SPI2_CS2", "#SPI2_CS3", "#RTS4", "", + "USB_PWR", "GPIO2", "GPIO3", ""; +}; + +&gpio2 { + gpio-line-names = + "", "", "", "", "", "", "", "", + "", "", "", "", "#SD2_CD", "", "", "", + "", "", "", "", "#USB-C_EN", "", "", "", + "", "", "", "", "", "", "", ""; +}; + +&gpio3 { + gpio-line-names = + "", "", "", "", "", "", "", "", + "", "", "", "", "", "", "", "", + "", "", "", "", "", "", "DISP_POW", "GPIO4", + "#", "", "", "", "", "", "", ""; +}; + +&gpio4 { + gpio-line-names = + "BKL_POW", "#ETH1_INT", "#TPM_RES", "#PCAP_RES", + "", "", "", "", + "", "", "", "", "", "", "", "", + "", "", "#ETH0_INT", "#USB-C_ALERT", + "#USB-C_SEL", "", "", "", + "LED_RED", "LED_GREEN", "LED_YELLOW", "#WAKEUP", + "", "", "", ""; +}; + +&gpio5 { + gpio-line-names = + "", "", "", "", "", "", "", "", + "", "#SPI1_CS", "", "", "", "#SPI2_CS1", "", "", + "", "", "", "", "ENA_KAM", "ENA_LED", "", "", + "", "", "", "", "", "", "", ""; +}; + +&hdmi_pvi { + status = "okay"; +}; + +&hdmi_tx { + ddc-i2c-bus = <&i2c5>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_hdmi>; + status = "okay"; +}; + +&hdmi_tx_phy { + status = "okay"; +}; + +&i2c1 { + clock-frequency = <100000>; + pinctrl-names = "default", "gpio"; + pinctrl-0 = <&pinctrl_i2c1>; + pinctrl-1 = <&pinctrl_i2c1_gpio>; + scl-gpios = <&gpio5 14 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + sda-gpios = <&gpio5 15 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + status = "okay"; + + pmic@25 { + reg = <0x25>; + compatible = "nxp,pca9450c"; + /* PMIC PCA9450 PMIC_nINT GPIO1_IO3 */ + pinctrl-0 = <&pinctrl_pmic>; + interrupt-parent = <&gpio1>; + interrupts = <3 GPIO_ACTIVE_LOW>; + + /* + * i.MX 8M Plus Data Sheet for Consumer Products + * 3.1.4 Operating ranges + * MIMX8ML8DVNLZAB + */ + regulators { + buck1: BUCK1 { /* VDD_SOC (dual-phase with BUCK3) */ + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <1050000>; + regulator-always-on; + regulator-boot-on; + regulator-ramp-delay = <3125>; + }; + + buck2: BUCK2 { /* VDD_ARM */ + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <1000000>; + regulator-always-on; + regulator-boot-on; + regulator-ramp-delay = <3125>; + nxp,dvs-run-voltage = <950000>; + nxp,dvs-standby-voltage = <850000>; + }; + + buck4: BUCK4 { /* +3V3 */ + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + regulator-boot-on; + }; + + buck5: BUCK5 { /* +1V8 */ + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + }; + + buck6: BUCK6 { /* DRAM_1V1 */ + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1100000>; + regulator-always-on; + regulator-boot-on; + }; + + ldo1: LDO1 { /* NVCC_SNVS_1V8 */ + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + }; + + ldo3: LDO3 { /* VDDA_1P8 */ + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + }; + + ldo4: LDO4 { /* ENET_2V5 */ + regulator-min-microvolt = <2500000>; + regulator-max-microvolt = <2500000>; + regulator-always-on; + regulator-boot-on; + }; + + ldo5: LDO5 { /* NVCC_SD2 */ + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + regulator-boot-on; + }; + }; + }; + + crypto@35 { + compatible = "atmel,atecc508a"; + reg = <0x35>; + }; + + eeprom@50 { + compatible = "atmel,24c16"; + reg = <0x50>; + pagesize = <16>; + }; +}; + +&i2c2 { + clock-frequency = <100000>; + pinctrl-names = "default", "gpio"; + pinctrl-0 = <&pinctrl_i2c2>; + pinctrl-1 = <&pinctrl_i2c2_gpio>; + scl-gpios = <&gpio5 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + sda-gpios = <&gpio5 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + status = "okay"; + + hwrtc: rtc@32 { + compatible = "epson,rx8900"; + reg = <0x32>; + epson,vdet-disable; + trickle-diode-disable; + }; + + tcpc@52 { + compatible = "nxp,ptn5110", "tcpci"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ptn5110>; + reg = <0x52>; + interrupt-parent = <&gpio4>; + interrupts = <19 IRQ_TYPE_LEVEL_LOW>; + + usb_con: connector { + compatible = "usb-c-connector"; + label = "USB-C"; + power-role = "dual"; + data-role = "dual"; + try-power-role = "sink"; + source-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>; + sink-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM) + PDO_VAR(5000, 5000, 3000)>; + op-sink-microwatt = <15000000>; + self-powered; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + typec_dr_sw: endpoint { + remote-endpoint = <&usb3_drd_sw>; + }; + }; + + port@1 { + reg = <1>; + typec_con_ss: endpoint { + remote-endpoint = <&usb3_data_ss>; + }; + }; + }; + }; + }; +}; + +&i2c3 { + clock-frequency = <100000>; + pinctrl-names = "default", "gpio"; + pinctrl-0 = <&pinctrl_i2c3>; + pinctrl-1 = <&pinctrl_i2c3_gpio>; + scl-gpios = <&gpio5 18 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + sda-gpios = <&gpio5 19 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + status = "okay"; +}; + +&i2c5 { /* HDMI EDID bus */ + clock-frequency = <100000>; + pinctrl-names = "default", "gpio"; + pinctrl-0 = <&pinctrl_i2c5>; + pinctrl-1 = <&pinctrl_i2c5_gpio>; + scl-gpios = <&gpio3 26 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + sda-gpios = <&gpio3 27 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + status = "okay"; +}; + +&lcdif3 { + status = "okay"; +}; + +&pwm1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm1>; + status = "okay"; +}; + +&pwm2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm2>; + status = "okay"; +}; + +&snvs_pwrkey { + status = "okay"; +}; + +&uart2 { + /* system console */ + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart2>; + status = "okay"; +}; + +&uart3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart3>; + status = "okay"; +}; + +&uart4 { + /* expansion port serial connection */ + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart4>; + status = "okay"; +}; + +&usb3_phy0 { + status = "okay"; +}; + +&usb3_0 { + status = "okay"; +}; + +&usb_dwc3_0 { + dr_mode = "otg"; + hnp-disable; + srp-disable; + adp-disable; + usb-role-switch; + status = "okay"; + + port { + usb3_drd_sw: endpoint { + remote-endpoint = <&typec_dr_sw>; + }; + }; +}; + +&usb3_phy1 { + vbus-supply = <®_usba_vbus>; + status = "okay"; +}; + +&usb3_1 { + status = "okay"; +}; + +&usb_dwc3_1 { + dr_mode = "host"; + status = "okay"; + snps,hsphy_interface = "utmi"; +}; + +&usdhc2 { + assigned-clocks = <&clk IMX8MP_CLK_USDHC2>; + assigned-clock-rates = <400000000>; + pinctrl-names = "default", "state_100mhz", "state_200mhz"; + pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>; + pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>; + pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>; + cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>; + bus-width = <4>; + vmmc-supply = <®_usdhc2_vmmc>; + vqmmc-supply = <&ldo5>; + status = "okay"; +}; + +&usdhc3 { + assigned-clocks = <&clk IMX8MP_CLK_USDHC3>; + assigned-clock-rates = <400000000>; + pinctrl-names = "default", "state_100mhz", "state_200mhz"; + pinctrl-0 = <&pinctrl_usdhc3>; + pinctrl-1 = <&pinctrl_usdhc3_100mhz>; + pinctrl-2 = <&pinctrl_usdhc3_200mhz>; + vmmc-supply = <&buck4>; + vqmmc-supply = <&buck5>; + bus-width = <8>; + no-sd; + no-sdio; + non-removable; + status = "okay"; +}; + +&wdog1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_wdog>; + fsl,ext-reset-output; + status = "okay"; +}; + +&iomuxc { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_hog>; + + pinctrl_ecspi1_cs: ecspi1-cs-grp { + fsl,pins = < + MX8MP_IOMUXC_ECSPI1_SS0__GPIO5_IO09 0x40 /* #SPI1_CS */ + >; + }; + + pinctrl_ecspi1: ecspi1-grp { + fsl,pins = < + MX8MP_IOMUXC_ECSPI1_SCLK__ECSPI1_SCLK 0x82 + MX8MP_IOMUXC_ECSPI1_MOSI__ECSPI1_MOSI 0x82 + MX8MP_IOMUXC_ECSPI1_MISO__ECSPI1_MISO 0x82 + >; + }; + + pinctrl_ecspi2_cs: ecspi2-cs-grp { + fsl,pins = < + MX8MP_IOMUXC_ECSPI2_SS0__GPIO5_IO13 0x40 /* #SPI2_CS */ + MX8MP_IOMUXC_GPIO1_IO08__GPIO1_IO08 0x40 /* #SPI2_CS2 */ + MX8MP_IOMUXC_GPIO1_IO09__GPIO1_IO09 0x40 /* #SPI2_CS3 */ + >; + }; + + pinctrl_ecspi2: ecspi2-grp { + fsl,pins = < + MX8MP_IOMUXC_ECSPI2_SCLK__ECSPI2_SCLK 0x82 + MX8MP_IOMUXC_ECSPI2_MOSI__ECSPI2_MOSI 0x82 + MX8MP_IOMUXC_ECSPI2_MISO__ECSPI2_MISO 0x82 + >; + }; + + pinctrl_eqos: eqos-grp { + fsl,pins = < + MX8MP_IOMUXC_ENET_MDC__ENET_QOS_MDC 0x0 + MX8MP_IOMUXC_ENET_MDIO__ENET_QOS_MDIO 0x0 + MX8MP_IOMUXC_ENET_RD0__ENET_QOS_RGMII_RD0 0x90 + MX8MP_IOMUXC_ENET_RD1__ENET_QOS_RGMII_RD1 0x90 + MX8MP_IOMUXC_ENET_RD2__ENET_QOS_RGMII_RD2 0x90 + MX8MP_IOMUXC_ENET_RD3__ENET_QOS_RGMII_RD3 0x90 + MX8MP_IOMUXC_ENET_RXC__CCM_ENET_QOS_CLOCK_GENERATE_RX_CLK 0x90 + MX8MP_IOMUXC_ENET_RX_CTL__ENET_QOS_RGMII_RX_CTL 0x90 + MX8MP_IOMUXC_ENET_TD0__ENET_QOS_RGMII_TD0 0x16 + MX8MP_IOMUXC_ENET_TD1__ENET_QOS_RGMII_TD1 0x16 + MX8MP_IOMUXC_ENET_TD2__ENET_QOS_RGMII_TD2 0x16 + MX8MP_IOMUXC_ENET_TD3__ENET_QOS_RGMII_TD3 0x16 + MX8MP_IOMUXC_ENET_TX_CTL__ENET_QOS_RGMII_TX_CTL 0x16 + MX8MP_IOMUXC_ENET_TXC__CCM_ENET_QOS_CLOCK_GENERATE_TX_CLK 0x16 + MX8MP_IOMUXC_SAI1_TXD6__GPIO4_IO18 0x10 /* #ETH0_INT */ + >; + }; + + pinctrl_fec: fec-grp { + fsl,pins = < + MX8MP_IOMUXC_SAI1_RXD2__ENET1_MDC 0x0 + MX8MP_IOMUXC_SAI1_RXD3__ENET1_MDIO 0x0 + MX8MP_IOMUXC_SAI1_RXD4__ENET1_RGMII_RD0 0x90 + MX8MP_IOMUXC_SAI1_RXD5__ENET1_RGMII_RD1 0x90 + MX8MP_IOMUXC_SAI1_RXD6__ENET1_RGMII_RD2 0x90 + MX8MP_IOMUXC_SAI1_RXD7__ENET1_RGMII_RD3 0x90 + MX8MP_IOMUXC_SAI1_TXC__ENET1_RGMII_RXC 0x90 + MX8MP_IOMUXC_SAI1_TXFS__ENET1_RGMII_RX_CTL 0x90 + MX8MP_IOMUXC_SAI1_TXD0__ENET1_RGMII_TD0 0x16 + MX8MP_IOMUXC_SAI1_TXD1__ENET1_RGMII_TD1 0x16 + MX8MP_IOMUXC_SAI1_TXD2__ENET1_RGMII_TD2 0x16 + MX8MP_IOMUXC_SAI1_TXD3__ENET1_RGMII_TD3 0x16 + MX8MP_IOMUXC_SAI1_TXD4__ENET1_RGMII_TX_CTL 0x16 + MX8MP_IOMUXC_SAI1_TXD5__ENET1_RGMII_TXC 0x16 + MX8MP_IOMUXC_SAI1_RXC__GPIO4_IO01 0x10 /* #ETH1_INT */ + >; + }; + + pinctrl_flexcan1: flexcan1-grp { + fsl,pins = < + MX8MP_IOMUXC_SPDIF_RX__CAN1_RX 0x154 + MX8MP_IOMUXC_SPDIF_TX__CAN1_TX 0x154 + >; + }; + + pinctrl_gpio_key_wakeup: gpio-key-wakeup-grp { + fsl,pins = < + MX8MP_IOMUXC_SAI2_MCLK__GPIO4_IO27 0x40 /* #WAKEUP */ + >; + }; + + pinctrl_gpio_leds: gpio-leds-grp { + fsl,pins = < + MX8MP_IOMUXC_SAI2_TXFS__GPIO4_IO24 0x40 /* LED_RED */ + MX8MP_IOMUXC_SAI2_TXC__GPIO4_IO25 0x40 /* LED_GREEN */ + MX8MP_IOMUXC_SAI2_TXD0__GPIO4_IO26 0x40 /* LED_YELLOW */ + >; + }; + + pinctrl_hdmi: hdmi-grp { + fsl,pins = < + MX8MP_IOMUXC_HDMI_CEC__HDMIMIX_HDMI_CEC 0x154 + MX8MP_IOMUXC_HDMI_HPD__HDMIMIX_HDMI_HPD 0x154 + >; + }; + + pinctrl_hog: hog-grp { + fsl,pins = < + MX8MP_IOMUXC_GPIO1_IO01__GPIO1_IO01 0x40 /* GPIO1 */ + MX8MP_IOMUXC_GPIO1_IO13__GPIO1_IO13 0x40 /* GPIO2 */ + MX8MP_IOMUXC_GPIO1_IO14__GPIO1_IO14 0x40 /* GPIO3 */ + MX8MP_IOMUXC_SAI5_RXD2__GPIO3_IO23 0x40 /* GPIO4 */ + MX8MP_IOMUXC_I2C4_SCL__GPIO5_IO20 0x40 /* ENA_KAM */ + MX8MP_IOMUXC_I2C4_SDA__GPIO5_IO21 0x40 /* ENA_LED */ + MX8MP_IOMUXC_SAI1_RXD1__GPIO4_IO03 0x40 /* #PCAP_RES */ + MX8MP_IOMUXC_GPIO1_IO10__GPIO1_IO10 0x40 /* #RTS4 */ + >; + }; + + pinctrl_i2c1: i2c1-grp { + fsl,pins = < + MX8MP_IOMUXC_I2C1_SCL__I2C1_SCL 0x400001c0 + MX8MP_IOMUXC_I2C1_SDA__I2C1_SDA 0x400001c0 + >; + }; + + pinctrl_i2c1_gpio: i2c1-gpio-grp { + fsl,pins = < + MX8MP_IOMUXC_I2C1_SCL__GPIO5_IO14 0xc0 + MX8MP_IOMUXC_I2C1_SDA__GPIO5_IO15 0xc0 + >; + }; + + pinctrl_i2c2: i2c2-grp { + fsl,pins = < + MX8MP_IOMUXC_I2C2_SCL__I2C2_SCL 0x400001c0 + MX8MP_IOMUXC_I2C2_SDA__I2C2_SDA 0x400001c0 + >; + }; + + pinctrl_i2c2_gpio: i2c2-gpio-grp { + fsl,pins = < + MX8MP_IOMUXC_I2C2_SCL__GPIO5_IO16 0xc0 + MX8MP_IOMUXC_I2C2_SDA__GPIO5_IO17 0xc0 + >; + }; + + pinctrl_i2c3: i2c3-grp { + fsl,pins = < + MX8MP_IOMUXC_I2C3_SCL__I2C3_SCL 0x400001c2 + MX8MP_IOMUXC_I2C3_SDA__I2C3_SDA 0x400001c2 + >; + }; + + pinctrl_i2c3_gpio: i2c3-gpio-grp { + fsl,pins = < + MX8MP_IOMUXC_I2C3_SCL__GPIO5_IO18 0xc2 + MX8MP_IOMUXC_I2C3_SDA__GPIO5_IO19 0xc2 + >; + }; + + pinctrl_i2c5: i2c5-grp { + fsl,pins = < + MX8MP_IOMUXC_HDMI_DDC_SCL__I2C5_SCL 0x400000c4 + MX8MP_IOMUXC_HDMI_DDC_SDA__I2C5_SDA 0x400000c4 + >; + }; + + pinctrl_i2c5_gpio: i2c5-gpio-grp { + fsl,pins = < + MX8MP_IOMUXC_HDMI_DDC_SCL__GPIO3_IO26 0xc4 + MX8MP_IOMUXC_HDMI_DDC_SDA__GPIO3_IO27 0xc4 + >; + }; + + pinctrl_nfc: nfc-grp { + fsl,pins = < + MX8MP_IOMUXC_GPIO1_IO06__GPIO1_IO06 0x40 /* NFC_INT_I */ + MX8MP_IOMUXC_GPIO1_IO07__GPIO1_IO07 0x40 /* NFC_INT */ + >; + }; + + pinctrl_pmic: pmic-grp { + fsl,pins = < + MX8MP_IOMUXC_GPIO1_IO03__GPIO1_IO03 0x40 /* #PMIC_INT */ + >; + }; + + pinctrl_ptn5110: ptn5110-grp { + fsl,pins = < + MX8MP_IOMUXC_SAI1_TXD7__GPIO4_IO19 0x1c4 /* #USB-C_ALERT */ + >; + }; + + pinctrl_pwm1: pwm1-grp { + fsl,pins = < + MX8MP_IOMUXC_SPDIF_EXT_CLK__PWM1_OUT 0x116 + >; + }; + + pinctrl_pwm2: pwm2-grp { + fsl,pins = < + MX8MP_IOMUXC_SAI5_RXD0__PWM2_OUT 0x116 /* EXT_PWM */ + >; + }; + + pinctrl_reg_usdhc2_vmmc: reg-usdhc2-vmmc-grp { + fsl,pins = < + MX8MP_IOMUXC_SD2_RESET_B__GPIO2_IO19 0x40 + >; + }; + + pinctrl_sbu_mux: sbu-mux-grp { + fsl,pins = < + MX8MP_IOMUXC_SAI1_MCLK__GPIO4_IO20 0x16 /* #USB-C_SEL */ + MX8MP_IOMUXC_SD2_WP__GPIO2_IO20 0x16 /* #USB-C_EN */ + >; + }; + + pinctrl_slb9670: slb9670-grp { + fsl,pins = < + MX8MP_IOMUXC_GPIO1_IO00__GPIO1_IO00 0x40 /* #TPM_IRQ */ + MX8MP_IOMUXC_SAI1_RXD0__GPIO4_IO02 0x40 /* #TPM_RES */ + >; + }; + + pinctrl_uart2: uart2-grp { + fsl,pins = < + MX8MP_IOMUXC_UART2_RXD__UART2_DCE_RX 0x40 + MX8MP_IOMUXC_UART2_TXD__UART2_DCE_TX 0x40 + >; + }; + + pinctrl_uart3: uart3-grp { + fsl,pins = < + MX8MP_IOMUXC_UART3_RXD__UART3_DCE_RX 0x40 + MX8MP_IOMUXC_UART3_TXD__UART3_DCE_TX 0x40 + >; + }; + + pinctrl_uart4: uart4-grp { + fsl,pins = < + MX8MP_IOMUXC_UART4_RXD__UART4_DCE_RX 0x40 + MX8MP_IOMUXC_UART4_TXD__UART4_DCE_TX 0x40 + >; + }; + + pinctrl_usb1: usb1-grp { + fsl,pins = < + MX8MP_IOMUXC_GPIO1_IO12__GPIO1_IO12 0x40 /* USB_PWR */ + >; + }; + + pinctrl_usdhc2: usdhc2-grp { + fsl,pins = < + MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x190 + MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d0 + MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d0 + MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d0 + MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d0 + MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d0 + MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc0 /* SD2_VSEL */ + >; + }; + + pinctrl_usdhc2_100mhz: usdhc2-100mhz-grp { + fsl,pins = < + MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x194 + MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d4 + MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d4 + MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d4 + MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d4 + MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d4 + MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc0 /* SD2_VSEL */ + >; + }; + + pinctrl_usdhc2_200mhz: usdhc2-200mhz-grp { + fsl,pins = < + MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x196 + MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d6 + MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d6 + MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d6 + MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d6 + MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d6 + MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc0 /* SD2_VSEL */ + >; + }; + + pinctrl_usdhc2_gpio: usdhc2-gpio-grp { + fsl,pins = < + MX8MP_IOMUXC_SD2_CD_B__GPIO2_IO12 0x1c4 + >; + }; + + pinctrl_usdhc3: usdhc3-grp { + fsl,pins = < + MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK 0x190 + MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD 0x1d0 + MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0 0x1d0 + MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1 0x1d0 + MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2 0x1d0 + MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3 0x1d0 + MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4 0x1d0 + MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5 0x1d0 + MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6 0x1d0 + MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7 0x1d0 + MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE 0x190 + MX8MP_IOMUXC_NAND_READY_B__USDHC3_RESET_B 0x40 /* #SD3_RESET */ + >; + }; + + pinctrl_usdhc3_100mhz: usdhc3-100mhz-grp { + fsl,pins = < + MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK 0x194 + MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD 0x1d4 + MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0 0x1d4 + MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1 0x1d4 + MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2 0x1d4 + MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3 0x1d4 + MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4 0x1d4 + MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5 0x1d4 + MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6 0x1d4 + MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7 0x1d4 + MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE 0x194 + >; + }; + + pinctrl_usdhc3_200mhz: usdhc3-200mhz-grp { + fsl,pins = < + MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK 0x192 + MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD 0x1d2 + MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0 0x1d2 + MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1 0x1d2 + MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2 0x1d2 + MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3 0x1d2 + MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4 0x1d2 + MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5 0x1d2 + MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6 0x1d2 + MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7 0x1d2 + MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE 0x192 + >; + }; + + pinctrl_wdog: wdog-grp { + fsl,pins = < + MX8MP_IOMUXC_GPIO1_IO02__WDOG1_WDOG_B 0xc6 /* #WDOG */ + >; + }; +}; -- 2.43.0 ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v2 3/3] arm64: dts: imx8mp: Add initial support for Ultratronik imx8mp-ultra-mach-sbc board 2025-06-11 11:30 ` [PATCH v2 3/3] arm64: dts: imx8mp: Add initial support for Ultratronik imx8mp-ultra-mach-sbc board Goran Rađenović @ 2025-06-11 15:34 ` Frank Li 2025-06-20 9:58 ` Goran Radenovic 0 siblings, 1 reply; 12+ messages in thread From: Frank Li @ 2025-06-11 15:34 UTC (permalink / raw) To: Goran Rađenović Cc: boerge.struempfel, Shawn Guo, Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam, Rob Herring, Krzysztof Kozlowski, Conor Dooley, imx, linux-arm-kernel, devicetree, linux-kernel On Wed, Jun 11, 2025 at 01:30:38PM +0200, Goran Rađenović wrote: > Add initial device tree support for the Ultratronik Ultra-MACH SBC > based on the NXP i.MX8M Plus SoC with 2GB LPDDR4. > > The board features: > - 1 x USB 2.0 Host > - 1 x USB 2.0 via USB-C > - Debug UART + 1 x UART + 1 x USART > - SD card and eMMC support > - 2 x Ethernet (RJ45) > - HDMI > > This initial DTS enables basic board support for booting via > SD card or eMMC. > > Signed-off-by: Goran Rađenović <goran.radni@gmail.com> > --- > arch/arm64/boot/dts/freescale/Makefile | 1 + > .../dts/freescale/imx8mp-ultra-mach-sbc.dts | 909 ++++++++++++++++++ > 2 files changed, 910 insertions(+) > create mode 100644 arch/arm64/boot/dts/freescale/imx8mp-ultra-mach-sbc.dts > > diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile > index 0b473a23d120..e2f2500238fe 100644 > --- a/arch/arm64/boot/dts/freescale/Makefile > +++ b/arch/arm64/boot/dts/freescale/Makefile > @@ -229,6 +229,7 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mp-skov-revc-tian-g07017.dtb > dtb-$(CONFIG_ARCH_MXC) += imx8mp-toradex-smarc-dev.dtb > dtb-$(CONFIG_ARCH_MXC) += imx8mp-tqma8mpql-mba8mpxl.dtb > dtb-$(CONFIG_ARCH_MXC) += imx8mp-tqma8mpql-mba8mp-ras314.dtb > +dtb-$(CONFIG_ARCH_MXC) += imx8mp-ultra-mach-sbc.dtb > dtb-$(CONFIG_ARCH_MXC) += imx8mp-var-som-symphony.dtb > dtb-$(CONFIG_ARCH_MXC) += imx8mp-venice-gw71xx-2x.dtb > dtb-$(CONFIG_ARCH_MXC) += imx8mp-venice-gw72xx-2x.dtb > diff --git a/arch/arm64/boot/dts/freescale/imx8mp-ultra-mach-sbc.dts b/arch/arm64/boot/dts/freescale/imx8mp-ultra-mach-sbc.dts > new file mode 100644 > index 000000000000..cb99145a4308 > --- /dev/null > +++ b/arch/arm64/boot/dts/freescale/imx8mp-ultra-mach-sbc.dts > @@ -0,0 +1,909 @@ > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) > +/* > + * Copyright (C) 2025 Ultratronik > + */ > + > +/dts-v1/; > + > +#include <dt-bindings/usb/pd.h> > +#include "imx8mp.dtsi" > + > +/ { > + model = "NXP i.MX8MPlus Ultratronik MMI_A53 board"; > + compatible = "ultratronik,imx8mp-ultra-mach-sbc", "fsl,imx8mp"; > + > + aliases { > + ethernet0 = &fec; > + ethernet1 = &eqos; > + rtc0 = &hwrtc; > + rtc1 = &snvs_rtc; > + }; > + ... > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_slb9670>; > + interrupt-parent = <&gpio1>; > + interrupts = <0 IRQ_TYPE_LEVEL_LOW>; > + }; > +}; > + > +&ecspi2 { > + #address-cells = <1>; > + #size-cells = <0>; > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_ecspi2 &pinctrl_ecspi2_cs>; > + cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>, > + <&gpio1 8 GPIO_ACTIVE_LOW>, > + <&gpio1 9 GPIO_ACTIVE_LOW>; > + status = "okay"; > + > + nfc_transceiver@1 { node name use -, nfc-transceiver@1 > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_nfc>; > + reg = <1>; > + compatible = "st,st95hf"; compatible should first property reg should be second one. > + spi-max-frequency = <100000>; > + interrupt-parent = <&gpio1>; > + interrupts = <7 IRQ_TYPE_EDGE_FALLING>; > + enable-gpio = <&gpio1 6 GPIO_ACTIVE_HIGH>; > + status = "okay"; > + }; > +}; > + > +&eqos { > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_eqos>; > + phy-mode = "rgmii-id"; > + phy-handle = <ðphy0>; > + status = "okay"; > + > + mdio { > + compatible = "snps,dwmac-mdio"; > + #address-cells = <1>; > + #size-cells = <0>; > + > + ethphy0: ethernet-phy@1 { > + compatible = "ethernet-phy-ieee802.3-c22"; > + reg = <0x1>; > + interrupt-parent = <&gpio4>; > + interrupts = <18 IRQ_TYPE_LEVEL_LOW>; > + }; > + }; > +}; > + > +&fec { > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_fec>; > + phy-mode = "rgmii-id"; > + phy-handle = <ðphy1>; > + fsl,magic-packet; > + status = "okay"; > + > + mdio { > + #address-cells = <1>; > + #size-cells = <0>; > + > + ethphy1: ethernet-phy@2 { > + compatible = "ethernet-phy-ieee802.3-c22"; > + reg = <0x2>; > + interrupt-parent = <&gpio4>; > + interrupts = <1 IRQ_TYPE_LEVEL_LOW>; > + }; > + }; > +}; > + > +&flexcan1 { > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_flexcan1>; > + status = "okay"; > +}; > + > +&gpio1 { > + gpio-line-names = > + "#TPM_IRQ", "GPIO1", "", "#PMIC_INT", > + "SD2_VSEL", "#TOUCH_IRQ", "#NFC_INT_I", "#NFC_INT", > + "#SPI2_CS2", "#SPI2_CS3", "#RTS4", "", > + "USB_PWR", "GPIO2", "GPIO3", ""; > +}; > + > +&gpio2 { > + gpio-line-names = > + "", "", "", "", "", "", "", "", > + "", "", "", "", "#SD2_CD", "", "", "", > + "", "", "", "", "#USB-C_EN", "", "", "", > + "", "", "", "", "", "", "", ""; > +}; > + > +&gpio3 { > + gpio-line-names = > + "", "", "", "", "", "", "", "", > + "", "", "", "", "", "", "", "", > + "", "", "", "", "", "", "DISP_POW", "GPIO4", > + "#", "", "", "", "", "", "", ""; > +}; > + > +&gpio4 { > + gpio-line-names = > + "BKL_POW", "#ETH1_INT", "#TPM_RES", "#PCAP_RES", > + "", "", "", "", > + "", "", "", "", "", "", "", "", > + "", "", "#ETH0_INT", "#USB-C_ALERT", > + "#USB-C_SEL", "", "", "", > + "LED_RED", "LED_GREEN", "LED_YELLOW", "#WAKEUP", > + "", "", "", ""; > +}; > + > +&gpio5 { > + gpio-line-names = > + "", "", "", "", "", "", "", "", > + "", "#SPI1_CS", "", "", "", "#SPI2_CS1", "", "", > + "", "", "", "", "ENA_KAM", "ENA_LED", "", "", > + "", "", "", "", "", "", "", ""; > +}; > + > +&hdmi_pvi { > + status = "okay"; > +}; > + > +&hdmi_tx { > + ddc-i2c-bus = <&i2c5>; > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_hdmi>; > + status = "okay"; > +}; > + > +&hdmi_tx_phy { > + status = "okay"; > +}; > + > +&i2c1 { > + clock-frequency = <100000>; > + pinctrl-names = "default", "gpio"; > + pinctrl-0 = <&pinctrl_i2c1>; > + pinctrl-1 = <&pinctrl_i2c1_gpio>; > + scl-gpios = <&gpio5 14 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; > + sda-gpios = <&gpio5 15 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; > + status = "okay"; > + > + pmic@25 { > + reg = <0x25>; > + compatible = "nxp,pca9450c"; reg is second one. Frank > + /* PMIC PCA9450 PMIC_nINT GPIO1_IO3 */ > + pinctrl-0 = <&pinctrl_pmic>; > + interrupt-parent = <&gpio1>; > + interrupts = <3 GPIO_ACTIVE_LOW>; > + > + /* > + * i.MX 8M Plus Data Sheet for Consumer Products > + * 3.1.4 Operating ranges > + * MIMX8ML8DVNLZAB > + */ > + regulators { > + buck1: BUCK1 { /* VDD_SOC (dual-phase with BUCK3) */ > + regulator-min-microvolt = <850000>; > + regulator-max-microvolt = <1050000>; > + regulator-always-on; > + regulator-boot-on; > + regulator-ramp-delay = <3125>; > + }; > + > + buck2: BUCK2 { /* VDD_ARM */ > + regulator-min-microvolt = <850000>; > + regulator-max-microvolt = <1000000>; > + regulator-always-on; > + regulator-boot-on; > + regulator-ramp-delay = <3125>; > + nxp,dvs-run-voltage = <950000>; > + nxp,dvs-standby-voltage = <850000>; > + }; > + > + buck4: BUCK4 { /* +3V3 */ > + regulator-min-microvolt = <3300000>; > + regulator-max-microvolt = <3300000>; > + regulator-always-on; > + regulator-boot-on; > + }; > + > + buck5: BUCK5 { /* +1V8 */ > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + regulator-always-on; > + regulator-boot-on; > + }; > + > + buck6: BUCK6 { /* DRAM_1V1 */ > + regulator-min-microvolt = <1100000>; > + regulator-max-microvolt = <1100000>; > + regulator-always-on; > + regulator-boot-on; > + }; > + > + ldo1: LDO1 { /* NVCC_SNVS_1V8 */ > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + regulator-always-on; > + regulator-boot-on; > + }; > + > + ldo3: LDO3 { /* VDDA_1P8 */ > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + regulator-always-on; > + regulator-boot-on; > + }; > + > + ldo4: LDO4 { /* ENET_2V5 */ > + regulator-min-microvolt = <2500000>; > + regulator-max-microvolt = <2500000>; > + regulator-always-on; > + regulator-boot-on; > + }; > + > + ldo5: LDO5 { /* NVCC_SD2 */ > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <3300000>; > + regulator-always-on; > + regulator-boot-on; > + }; > + }; > + }; > + > + crypto@35 { > + compatible = "atmel,atecc508a"; > + reg = <0x35>; > + }; > + > + eeprom@50 { > + compatible = "atmel,24c16"; > + reg = <0x50>; > + pagesize = <16>; > + }; > +}; > + > +&i2c2 { > + clock-frequency = <100000>; > + pinctrl-names = "default", "gpio"; > + pinctrl-0 = <&pinctrl_i2c2>; > + pinctrl-1 = <&pinctrl_i2c2_gpio>; > + scl-gpios = <&gpio5 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; > + sda-gpios = <&gpio5 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; > + status = "okay"; > + > + hwrtc: rtc@32 { > + compatible = "epson,rx8900"; > + reg = <0x32>; > + epson,vdet-disable; > + trickle-diode-disable; > + }; > + > + tcpc@52 { > + compatible = "nxp,ptn5110", "tcpci"; > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_ptn5110>; > + reg = <0x52>; > + interrupt-parent = <&gpio4>; > + interrupts = <19 IRQ_TYPE_LEVEL_LOW>; > + > + usb_con: connector { > + compatible = "usb-c-connector"; > + label = "USB-C"; > + power-role = "dual"; > + data-role = "dual"; > + try-power-role = "sink"; > + source-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>; > + sink-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM) > + PDO_VAR(5000, 5000, 3000)>; > + op-sink-microwatt = <15000000>; > + self-powered; > + > + ports { > + #address-cells = <1>; > + #size-cells = <0>; > + > + port@0 { > + reg = <0>; > + typec_dr_sw: endpoint { > + remote-endpoint = <&usb3_drd_sw>; > + }; > + }; > + > + port@1 { > + reg = <1>; > + typec_con_ss: endpoint { > + remote-endpoint = <&usb3_data_ss>; > + }; > + }; > + }; > + }; > + }; > +}; > + > +&i2c3 { > + clock-frequency = <100000>; > + pinctrl-names = "default", "gpio"; > + pinctrl-0 = <&pinctrl_i2c3>; > + pinctrl-1 = <&pinctrl_i2c3_gpio>; > + scl-gpios = <&gpio5 18 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; > + sda-gpios = <&gpio5 19 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; > + status = "okay"; > +}; > + > +&i2c5 { /* HDMI EDID bus */ > + clock-frequency = <100000>; > + pinctrl-names = "default", "gpio"; > + pinctrl-0 = <&pinctrl_i2c5>; > + pinctrl-1 = <&pinctrl_i2c5_gpio>; > + scl-gpios = <&gpio3 26 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; > + sda-gpios = <&gpio3 27 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; > + status = "okay"; > +}; > + > +&lcdif3 { > + status = "okay"; > +}; > + > +&pwm1 { > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_pwm1>; > + status = "okay"; > +}; > + > +&pwm2 { > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_pwm2>; > + status = "okay"; > +}; > + > +&snvs_pwrkey { > + status = "okay"; > +}; > + > +&uart2 { > + /* system console */ > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_uart2>; > + status = "okay"; > +}; > + > +&uart3 { > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_uart3>; > + status = "okay"; > +}; > + > +&uart4 { > + /* expansion port serial connection */ > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_uart4>; > + status = "okay"; > +}; > + > +&usb3_phy0 { > + status = "okay"; > +}; > + > +&usb3_0 { > + status = "okay"; > +}; > + > +&usb_dwc3_0 { > + dr_mode = "otg"; > + hnp-disable; > + srp-disable; > + adp-disable; > + usb-role-switch; > + status = "okay"; > + > + port { > + usb3_drd_sw: endpoint { > + remote-endpoint = <&typec_dr_sw>; > + }; > + }; > +}; > + > +&usb3_phy1 { > + vbus-supply = <®_usba_vbus>; > + status = "okay"; > +}; > + > +&usb3_1 { > + status = "okay"; > +}; > + > +&usb_dwc3_1 { > + dr_mode = "host"; > + status = "okay"; > + snps,hsphy_interface = "utmi"; > +}; > + > +&usdhc2 { > + assigned-clocks = <&clk IMX8MP_CLK_USDHC2>; > + assigned-clock-rates = <400000000>; > + pinctrl-names = "default", "state_100mhz", "state_200mhz"; > + pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>; > + pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>; > + pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>; > + cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>; > + bus-width = <4>; > + vmmc-supply = <®_usdhc2_vmmc>; > + vqmmc-supply = <&ldo5>; > + status = "okay"; > +}; > + > +&usdhc3 { > + assigned-clocks = <&clk IMX8MP_CLK_USDHC3>; > + assigned-clock-rates = <400000000>; > + pinctrl-names = "default", "state_100mhz", "state_200mhz"; > + pinctrl-0 = <&pinctrl_usdhc3>; > + pinctrl-1 = <&pinctrl_usdhc3_100mhz>; > + pinctrl-2 = <&pinctrl_usdhc3_200mhz>; > + vmmc-supply = <&buck4>; > + vqmmc-supply = <&buck5>; > + bus-width = <8>; > + no-sd; > + no-sdio; > + non-removable; > + status = "okay"; > +}; > + > +&wdog1 { > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_wdog>; > + fsl,ext-reset-output; > + status = "okay"; > +}; > + > +&iomuxc { > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_hog>; > + > + pinctrl_ecspi1_cs: ecspi1-cs-grp { > + fsl,pins = < > + MX8MP_IOMUXC_ECSPI1_SS0__GPIO5_IO09 0x40 /* #SPI1_CS */ > + >; > + }; > + > + pinctrl_ecspi1: ecspi1-grp { > + fsl,pins = < > + MX8MP_IOMUXC_ECSPI1_SCLK__ECSPI1_SCLK 0x82 > + MX8MP_IOMUXC_ECSPI1_MOSI__ECSPI1_MOSI 0x82 > + MX8MP_IOMUXC_ECSPI1_MISO__ECSPI1_MISO 0x82 > + >; > + }; > + > + pinctrl_ecspi2_cs: ecspi2-cs-grp { > + fsl,pins = < > + MX8MP_IOMUXC_ECSPI2_SS0__GPIO5_IO13 0x40 /* #SPI2_CS */ > + MX8MP_IOMUXC_GPIO1_IO08__GPIO1_IO08 0x40 /* #SPI2_CS2 */ > + MX8MP_IOMUXC_GPIO1_IO09__GPIO1_IO09 0x40 /* #SPI2_CS3 */ > + >; > + }; > + > + pinctrl_ecspi2: ecspi2-grp { > + fsl,pins = < > + MX8MP_IOMUXC_ECSPI2_SCLK__ECSPI2_SCLK 0x82 > + MX8MP_IOMUXC_ECSPI2_MOSI__ECSPI2_MOSI 0x82 > + MX8MP_IOMUXC_ECSPI2_MISO__ECSPI2_MISO 0x82 > + >; > + }; > + > + pinctrl_eqos: eqos-grp { > + fsl,pins = < > + MX8MP_IOMUXC_ENET_MDC__ENET_QOS_MDC 0x0 > + MX8MP_IOMUXC_ENET_MDIO__ENET_QOS_MDIO 0x0 > + MX8MP_IOMUXC_ENET_RD0__ENET_QOS_RGMII_RD0 0x90 > + MX8MP_IOMUXC_ENET_RD1__ENET_QOS_RGMII_RD1 0x90 > + MX8MP_IOMUXC_ENET_RD2__ENET_QOS_RGMII_RD2 0x90 > + MX8MP_IOMUXC_ENET_RD3__ENET_QOS_RGMII_RD3 0x90 > + MX8MP_IOMUXC_ENET_RXC__CCM_ENET_QOS_CLOCK_GENERATE_RX_CLK 0x90 > + MX8MP_IOMUXC_ENET_RX_CTL__ENET_QOS_RGMII_RX_CTL 0x90 > + MX8MP_IOMUXC_ENET_TD0__ENET_QOS_RGMII_TD0 0x16 > + MX8MP_IOMUXC_ENET_TD1__ENET_QOS_RGMII_TD1 0x16 > + MX8MP_IOMUXC_ENET_TD2__ENET_QOS_RGMII_TD2 0x16 > + MX8MP_IOMUXC_ENET_TD3__ENET_QOS_RGMII_TD3 0x16 > + MX8MP_IOMUXC_ENET_TX_CTL__ENET_QOS_RGMII_TX_CTL 0x16 > + MX8MP_IOMUXC_ENET_TXC__CCM_ENET_QOS_CLOCK_GENERATE_TX_CLK 0x16 > + MX8MP_IOMUXC_SAI1_TXD6__GPIO4_IO18 0x10 /* #ETH0_INT */ > + >; > + }; > + > + pinctrl_fec: fec-grp { > + fsl,pins = < > + MX8MP_IOMUXC_SAI1_RXD2__ENET1_MDC 0x0 > + MX8MP_IOMUXC_SAI1_RXD3__ENET1_MDIO 0x0 > + MX8MP_IOMUXC_SAI1_RXD4__ENET1_RGMII_RD0 0x90 > + MX8MP_IOMUXC_SAI1_RXD5__ENET1_RGMII_RD1 0x90 > + MX8MP_IOMUXC_SAI1_RXD6__ENET1_RGMII_RD2 0x90 > + MX8MP_IOMUXC_SAI1_RXD7__ENET1_RGMII_RD3 0x90 > + MX8MP_IOMUXC_SAI1_TXC__ENET1_RGMII_RXC 0x90 > + MX8MP_IOMUXC_SAI1_TXFS__ENET1_RGMII_RX_CTL 0x90 > + MX8MP_IOMUXC_SAI1_TXD0__ENET1_RGMII_TD0 0x16 > + MX8MP_IOMUXC_SAI1_TXD1__ENET1_RGMII_TD1 0x16 > + MX8MP_IOMUXC_SAI1_TXD2__ENET1_RGMII_TD2 0x16 > + MX8MP_IOMUXC_SAI1_TXD3__ENET1_RGMII_TD3 0x16 > + MX8MP_IOMUXC_SAI1_TXD4__ENET1_RGMII_TX_CTL 0x16 > + MX8MP_IOMUXC_SAI1_TXD5__ENET1_RGMII_TXC 0x16 > + MX8MP_IOMUXC_SAI1_RXC__GPIO4_IO01 0x10 /* #ETH1_INT */ > + >; > + }; > + > + pinctrl_flexcan1: flexcan1-grp { > + fsl,pins = < > + MX8MP_IOMUXC_SPDIF_RX__CAN1_RX 0x154 > + MX8MP_IOMUXC_SPDIF_TX__CAN1_TX 0x154 > + >; > + }; > + > + pinctrl_gpio_key_wakeup: gpio-key-wakeup-grp { > + fsl,pins = < > + MX8MP_IOMUXC_SAI2_MCLK__GPIO4_IO27 0x40 /* #WAKEUP */ > + >; > + }; > + > + pinctrl_gpio_leds: gpio-leds-grp { > + fsl,pins = < > + MX8MP_IOMUXC_SAI2_TXFS__GPIO4_IO24 0x40 /* LED_RED */ > + MX8MP_IOMUXC_SAI2_TXC__GPIO4_IO25 0x40 /* LED_GREEN */ > + MX8MP_IOMUXC_SAI2_TXD0__GPIO4_IO26 0x40 /* LED_YELLOW */ > + >; > + }; > + > + pinctrl_hdmi: hdmi-grp { > + fsl,pins = < > + MX8MP_IOMUXC_HDMI_CEC__HDMIMIX_HDMI_CEC 0x154 > + MX8MP_IOMUXC_HDMI_HPD__HDMIMIX_HDMI_HPD 0x154 > + >; > + }; > + > + pinctrl_hog: hog-grp { > + fsl,pins = < > + MX8MP_IOMUXC_GPIO1_IO01__GPIO1_IO01 0x40 /* GPIO1 */ > + MX8MP_IOMUXC_GPIO1_IO13__GPIO1_IO13 0x40 /* GPIO2 */ > + MX8MP_IOMUXC_GPIO1_IO14__GPIO1_IO14 0x40 /* GPIO3 */ > + MX8MP_IOMUXC_SAI5_RXD2__GPIO3_IO23 0x40 /* GPIO4 */ > + MX8MP_IOMUXC_I2C4_SCL__GPIO5_IO20 0x40 /* ENA_KAM */ > + MX8MP_IOMUXC_I2C4_SDA__GPIO5_IO21 0x40 /* ENA_LED */ > + MX8MP_IOMUXC_SAI1_RXD1__GPIO4_IO03 0x40 /* #PCAP_RES */ > + MX8MP_IOMUXC_GPIO1_IO10__GPIO1_IO10 0x40 /* #RTS4 */ > + >; > + }; > + > + pinctrl_i2c1: i2c1-grp { > + fsl,pins = < > + MX8MP_IOMUXC_I2C1_SCL__I2C1_SCL 0x400001c0 > + MX8MP_IOMUXC_I2C1_SDA__I2C1_SDA 0x400001c0 > + >; > + }; > + > + pinctrl_i2c1_gpio: i2c1-gpio-grp { > + fsl,pins = < > + MX8MP_IOMUXC_I2C1_SCL__GPIO5_IO14 0xc0 > + MX8MP_IOMUXC_I2C1_SDA__GPIO5_IO15 0xc0 > + >; > + }; > + > + pinctrl_i2c2: i2c2-grp { > + fsl,pins = < > + MX8MP_IOMUXC_I2C2_SCL__I2C2_SCL 0x400001c0 > + MX8MP_IOMUXC_I2C2_SDA__I2C2_SDA 0x400001c0 > + >; > + }; > + > + pinctrl_i2c2_gpio: i2c2-gpio-grp { > + fsl,pins = < > + MX8MP_IOMUXC_I2C2_SCL__GPIO5_IO16 0xc0 > + MX8MP_IOMUXC_I2C2_SDA__GPIO5_IO17 0xc0 > + >; > + }; > + > + pinctrl_i2c3: i2c3-grp { > + fsl,pins = < > + MX8MP_IOMUXC_I2C3_SCL__I2C3_SCL 0x400001c2 > + MX8MP_IOMUXC_I2C3_SDA__I2C3_SDA 0x400001c2 > + >; > + }; > + > + pinctrl_i2c3_gpio: i2c3-gpio-grp { > + fsl,pins = < > + MX8MP_IOMUXC_I2C3_SCL__GPIO5_IO18 0xc2 > + MX8MP_IOMUXC_I2C3_SDA__GPIO5_IO19 0xc2 > + >; > + }; > + > + pinctrl_i2c5: i2c5-grp { > + fsl,pins = < > + MX8MP_IOMUXC_HDMI_DDC_SCL__I2C5_SCL 0x400000c4 > + MX8MP_IOMUXC_HDMI_DDC_SDA__I2C5_SDA 0x400000c4 > + >; > + }; > + > + pinctrl_i2c5_gpio: i2c5-gpio-grp { > + fsl,pins = < > + MX8MP_IOMUXC_HDMI_DDC_SCL__GPIO3_IO26 0xc4 > + MX8MP_IOMUXC_HDMI_DDC_SDA__GPIO3_IO27 0xc4 > + >; > + }; > + > + pinctrl_nfc: nfc-grp { > + fsl,pins = < > + MX8MP_IOMUXC_GPIO1_IO06__GPIO1_IO06 0x40 /* NFC_INT_I */ > + MX8MP_IOMUXC_GPIO1_IO07__GPIO1_IO07 0x40 /* NFC_INT */ > + >; > + }; > + > + pinctrl_pmic: pmic-grp { > + fsl,pins = < > + MX8MP_IOMUXC_GPIO1_IO03__GPIO1_IO03 0x40 /* #PMIC_INT */ > + >; > + }; > + > + pinctrl_ptn5110: ptn5110-grp { > + fsl,pins = < > + MX8MP_IOMUXC_SAI1_TXD7__GPIO4_IO19 0x1c4 /* #USB-C_ALERT */ > + >; > + }; > + > + pinctrl_pwm1: pwm1-grp { > + fsl,pins = < > + MX8MP_IOMUXC_SPDIF_EXT_CLK__PWM1_OUT 0x116 > + >; > + }; > + > + pinctrl_pwm2: pwm2-grp { > + fsl,pins = < > + MX8MP_IOMUXC_SAI5_RXD0__PWM2_OUT 0x116 /* EXT_PWM */ > + >; > + }; > + > + pinctrl_reg_usdhc2_vmmc: reg-usdhc2-vmmc-grp { > + fsl,pins = < > + MX8MP_IOMUXC_SD2_RESET_B__GPIO2_IO19 0x40 > + >; > + }; > + > + pinctrl_sbu_mux: sbu-mux-grp { > + fsl,pins = < > + MX8MP_IOMUXC_SAI1_MCLK__GPIO4_IO20 0x16 /* #USB-C_SEL */ > + MX8MP_IOMUXC_SD2_WP__GPIO2_IO20 0x16 /* #USB-C_EN */ > + >; > + }; > + > + pinctrl_slb9670: slb9670-grp { > + fsl,pins = < > + MX8MP_IOMUXC_GPIO1_IO00__GPIO1_IO00 0x40 /* #TPM_IRQ */ > + MX8MP_IOMUXC_SAI1_RXD0__GPIO4_IO02 0x40 /* #TPM_RES */ > + >; > + }; > + > + pinctrl_uart2: uart2-grp { > + fsl,pins = < > + MX8MP_IOMUXC_UART2_RXD__UART2_DCE_RX 0x40 > + MX8MP_IOMUXC_UART2_TXD__UART2_DCE_TX 0x40 > + >; > + }; > + > + pinctrl_uart3: uart3-grp { > + fsl,pins = < > + MX8MP_IOMUXC_UART3_RXD__UART3_DCE_RX 0x40 > + MX8MP_IOMUXC_UART3_TXD__UART3_DCE_TX 0x40 > + >; > + }; > + > + pinctrl_uart4: uart4-grp { > + fsl,pins = < > + MX8MP_IOMUXC_UART4_RXD__UART4_DCE_RX 0x40 > + MX8MP_IOMUXC_UART4_TXD__UART4_DCE_TX 0x40 > + >; > + }; > + > + pinctrl_usb1: usb1-grp { > + fsl,pins = < > + MX8MP_IOMUXC_GPIO1_IO12__GPIO1_IO12 0x40 /* USB_PWR */ > + >; > + }; > + > + pinctrl_usdhc2: usdhc2-grp { > + fsl,pins = < > + MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x190 > + MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d0 > + MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d0 > + MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d0 > + MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d0 > + MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d0 > + MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc0 /* SD2_VSEL */ > + >; > + }; > + > + pinctrl_usdhc2_100mhz: usdhc2-100mhz-grp { > + fsl,pins = < > + MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x194 > + MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d4 > + MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d4 > + MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d4 > + MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d4 > + MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d4 > + MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc0 /* SD2_VSEL */ > + >; > + }; > + > + pinctrl_usdhc2_200mhz: usdhc2-200mhz-grp { > + fsl,pins = < > + MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x196 > + MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d6 > + MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d6 > + MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d6 > + MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d6 > + MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d6 > + MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc0 /* SD2_VSEL */ > + >; > + }; > + > + pinctrl_usdhc2_gpio: usdhc2-gpio-grp { > + fsl,pins = < > + MX8MP_IOMUXC_SD2_CD_B__GPIO2_IO12 0x1c4 > + >; > + }; > + > + pinctrl_usdhc3: usdhc3-grp { > + fsl,pins = < > + MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK 0x190 > + MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD 0x1d0 > + MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0 0x1d0 > + MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1 0x1d0 > + MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2 0x1d0 > + MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3 0x1d0 > + MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4 0x1d0 > + MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5 0x1d0 > + MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6 0x1d0 > + MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7 0x1d0 > + MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE 0x190 > + MX8MP_IOMUXC_NAND_READY_B__USDHC3_RESET_B 0x40 /* #SD3_RESET */ > + >; > + }; > + > + pinctrl_usdhc3_100mhz: usdhc3-100mhz-grp { > + fsl,pins = < > + MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK 0x194 > + MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD 0x1d4 > + MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0 0x1d4 > + MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1 0x1d4 > + MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2 0x1d4 > + MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3 0x1d4 > + MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4 0x1d4 > + MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5 0x1d4 > + MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6 0x1d4 > + MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7 0x1d4 > + MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE 0x194 > + >; > + }; > + > + pinctrl_usdhc3_200mhz: usdhc3-200mhz-grp { > + fsl,pins = < > + MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK 0x192 > + MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD 0x1d2 > + MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0 0x1d2 > + MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1 0x1d2 > + MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2 0x1d2 > + MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3 0x1d2 > + MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4 0x1d2 > + MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5 0x1d2 > + MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6 0x1d2 > + MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7 0x1d2 > + MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE 0x192 > + >; > + }; > + > + pinctrl_wdog: wdog-grp { > + fsl,pins = < > + MX8MP_IOMUXC_GPIO1_IO02__WDOG1_WDOG_B 0xc6 /* #WDOG */ > + >; > + }; > +}; > -- > 2.43.0 > ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v2 3/3] arm64: dts: imx8mp: Add initial support for Ultratronik imx8mp-ultra-mach-sbc board 2025-06-11 15:34 ` Frank Li @ 2025-06-20 9:58 ` Goran Radenovic 0 siblings, 0 replies; 12+ messages in thread From: Goran Radenovic @ 2025-06-20 9:58 UTC (permalink / raw) To: Frank Li Cc: boerge.struempfel, imx, linux-arm-kernel, devicetree, linux-kernel Frank Li wrote: > On Wed, Jun 11, 2025 at 01:30:38PM +0200, Goran Rađenović wrote: >> Add initial device tree support for the Ultratronik Ultra-MACH SBC >> based on the NXP i.MX8M Plus SoC with 2GB LPDDR4. >> >> The board features: >> - 1 x USB 2.0 Host >> - 1 x USB 2.0 via USB-C >> - Debug UART + 1 x UART + 1 x USART >> - SD card and eMMC support >> - 2 x Ethernet (RJ45) >> - HDMI >> >> This initial DTS enables basic board support for booting via >> SD card or eMMC. >> >> Signed-off-by: Goran Rađenović <goran.radni@gmail.com> >> --- >> arch/arm64/boot/dts/freescale/Makefile | 1 + >> .../dts/freescale/imx8mp-ultra-mach-sbc.dts | 909 ++++++++++++++++++ >> 2 files changed, 910 insertions(+) >> create mode 100644 arch/arm64/boot/dts/freescale/imx8mp-ultra-mach-sbc.dts >> >> diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile >> index 0b473a23d120..e2f2500238fe 100644 >> --- a/arch/arm64/boot/dts/freescale/Makefile >> +++ b/arch/arm64/boot/dts/freescale/Makefile >> @@ -229,6 +229,7 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mp-skov-revc-tian-g07017.dtb >> dtb-$(CONFIG_ARCH_MXC) += imx8mp-toradex-smarc-dev.dtb >> dtb-$(CONFIG_ARCH_MXC) += imx8mp-tqma8mpql-mba8mpxl.dtb >> dtb-$(CONFIG_ARCH_MXC) += imx8mp-tqma8mpql-mba8mp-ras314.dtb >> +dtb-$(CONFIG_ARCH_MXC) += imx8mp-ultra-mach-sbc.dtb >> dtb-$(CONFIG_ARCH_MXC) += imx8mp-var-som-symphony.dtb >> dtb-$(CONFIG_ARCH_MXC) += imx8mp-venice-gw71xx-2x.dtb >> dtb-$(CONFIG_ARCH_MXC) += imx8mp-venice-gw72xx-2x.dtb >> diff --git a/arch/arm64/boot/dts/freescale/imx8mp-ultra-mach-sbc.dts b/arch/arm64/boot/dts/freescale/imx8mp-ultra-mach-sbc.dts >> new file mode 100644 >> index 000000000000..cb99145a4308 >> --- /dev/null >> +++ b/arch/arm64/boot/dts/freescale/imx8mp-ultra-mach-sbc.dts >> @@ -0,0 +1,909 @@ >> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) >> +/* >> + * Copyright (C) 2025 Ultratronik >> + */ >> + >> +/dts-v1/; >> + >> +#include <dt-bindings/usb/pd.h> >> +#include "imx8mp.dtsi" >> + >> +/ { >> + model = "NXP i.MX8MPlus Ultratronik MMI_A53 board"; >> + compatible = "ultratronik,imx8mp-ultra-mach-sbc", "fsl,imx8mp"; >> + >> + aliases { >> + ethernet0 = &fec; >> + ethernet1 = &eqos; >> + rtc0 = &hwrtc; >> + rtc1 = &snvs_rtc; >> + }; >> + > ... >> + pinctrl-names = "default"; >> + pinctrl-0 = <&pinctrl_slb9670>; >> + interrupt-parent = <&gpio1>; >> + interrupts = <0 IRQ_TYPE_LEVEL_LOW>; >> + }; >> +}; >> + >> +&ecspi2 { >> + #address-cells = <1>; >> + #size-cells = <0>; >> + pinctrl-names = "default"; >> + pinctrl-0 = <&pinctrl_ecspi2 &pinctrl_ecspi2_cs>; >> + cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>, >> + <&gpio1 8 GPIO_ACTIVE_LOW>, >> + <&gpio1 9 GPIO_ACTIVE_LOW>; >> + status = "okay"; >> + >> + nfc_transceiver@1 { > > node name use -, nfc-transceiver@1 > >> + pinctrl-names = "default"; >> + pinctrl-0 = <&pinctrl_nfc>; >> + reg = <1>; >> + compatible = "st,st95hf"; > > compatible should first property > reg should be second one. > >> + spi-max-frequency = <100000>; >> + interrupt-parent = <&gpio1>; >> + interrupts = <7 IRQ_TYPE_EDGE_FALLING>; >> + enable-gpio = <&gpio1 6 GPIO_ACTIVE_HIGH>; >> + status = "okay"; >> + }; >> +}; >> + >> +&eqos { >> + pinctrl-names = "default"; >> + pinctrl-0 = <&pinctrl_eqos>; >> + phy-mode = "rgmii-id"; >> + phy-handle = <ðphy0>; >> + status = "okay"; >> + >> + mdio { >> + compatible = "snps,dwmac-mdio"; >> + #address-cells = <1>; >> + #size-cells = <0>; >> + >> + ethphy0: ethernet-phy@1 { >> + compatible = "ethernet-phy-ieee802.3-c22"; >> + reg = <0x1>; >> + interrupt-parent = <&gpio4>; >> + interrupts = <18 IRQ_TYPE_LEVEL_LOW>; >> + }; >> + }; >> +}; >> + >> +&fec { >> + pinctrl-names = "default"; >> + pinctrl-0 = <&pinctrl_fec>; >> + phy-mode = "rgmii-id"; >> + phy-handle = <ðphy1>; >> + fsl,magic-packet; >> + status = "okay"; >> + >> + mdio { >> + #address-cells = <1>; >> + #size-cells = <0>; >> + >> + ethphy1: ethernet-phy@2 { >> + compatible = "ethernet-phy-ieee802.3-c22"; >> + reg = <0x2>; >> + interrupt-parent = <&gpio4>; >> + interrupts = <1 IRQ_TYPE_LEVEL_LOW>; >> + }; >> + }; >> +}; >> + >> +&flexcan1 { >> + pinctrl-names = "default"; >> + pinctrl-0 = <&pinctrl_flexcan1>; >> + status = "okay"; >> +}; >> + >> +&gpio1 { >> + gpio-line-names = >> + "#TPM_IRQ", "GPIO1", "", "#PMIC_INT", >> + "SD2_VSEL", "#TOUCH_IRQ", "#NFC_INT_I", "#NFC_INT", >> + "#SPI2_CS2", "#SPI2_CS3", "#RTS4", "", >> + "USB_PWR", "GPIO2", "GPIO3", ""; >> +}; >> + >> +&gpio2 { >> + gpio-line-names = >> + "", "", "", "", "", "", "", "", >> + "", "", "", "", "#SD2_CD", "", "", "", >> + "", "", "", "", "#USB-C_EN", "", "", "", >> + "", "", "", "", "", "", "", ""; >> +}; >> + >> +&gpio3 { >> + gpio-line-names = >> + "", "", "", "", "", "", "", "", >> + "", "", "", "", "", "", "", "", >> + "", "", "", "", "", "", "DISP_POW", "GPIO4", >> + "#", "", "", "", "", "", "", ""; >> +}; >> + >> +&gpio4 { >> + gpio-line-names = >> + "BKL_POW", "#ETH1_INT", "#TPM_RES", "#PCAP_RES", >> + "", "", "", "", >> + "", "", "", "", "", "", "", "", >> + "", "", "#ETH0_INT", "#USB-C_ALERT", >> + "#USB-C_SEL", "", "", "", >> + "LED_RED", "LED_GREEN", "LED_YELLOW", "#WAKEUP", >> + "", "", "", ""; >> +}; >> + >> +&gpio5 { >> + gpio-line-names = >> + "", "", "", "", "", "", "", "", >> + "", "#SPI1_CS", "", "", "", "#SPI2_CS1", "", "", >> + "", "", "", "", "ENA_KAM", "ENA_LED", "", "", >> + "", "", "", "", "", "", "", ""; >> +}; >> + >> +&hdmi_pvi { >> + status = "okay"; >> +}; >> + >> +&hdmi_tx { >> + ddc-i2c-bus = <&i2c5>; >> + pinctrl-names = "default"; >> + pinctrl-0 = <&pinctrl_hdmi>; >> + status = "okay"; >> +}; >> + >> +&hdmi_tx_phy { >> + status = "okay"; >> +}; >> + >> +&i2c1 { >> + clock-frequency = <100000>; >> + pinctrl-names = "default", "gpio"; >> + pinctrl-0 = <&pinctrl_i2c1>; >> + pinctrl-1 = <&pinctrl_i2c1_gpio>; >> + scl-gpios = <&gpio5 14 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; >> + sda-gpios = <&gpio5 15 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; >> + status = "okay"; >> + >> + pmic@25 { >> + reg = <0x25>; >> + compatible = "nxp,pca9450c"; > > reg is second one. > > Frank > >> + /* PMIC PCA9450 PMIC_nINT GPIO1_IO3 */ >> + pinctrl-0 = <&pinctrl_pmic>; >> + interrupt-parent = <&gpio1>; >> + interrupts = <3 GPIO_ACTIVE_LOW>; >> + >> + /* >> + * i.MX 8M Plus Data Sheet for Consumer Products >> + * 3.1.4 Operating ranges >> + * MIMX8ML8DVNLZAB >> + */ >> + regulators { >> + buck1: BUCK1 { /* VDD_SOC (dual-phase with BUCK3) */ >> + regulator-min-microvolt = <850000>; >> + regulator-max-microvolt = <1050000>; >> + regulator-always-on; >> + regulator-boot-on; >> + regulator-ramp-delay = <3125>; >> + }; >> + >> + buck2: BUCK2 { /* VDD_ARM */ >> + regulator-min-microvolt = <850000>; >> + regulator-max-microvolt = <1000000>; >> + regulator-always-on; >> + regulator-boot-on; >> + regulator-ramp-delay = <3125>; >> + nxp,dvs-run-voltage = <950000>; >> + nxp,dvs-standby-voltage = <850000>; >> + }; >> + >> + buck4: BUCK4 { /* +3V3 */ >> + regulator-min-microvolt = <3300000>; >> + regulator-max-microvolt = <3300000>; >> + regulator-always-on; >> + regulator-boot-on; >> + }; >> + >> + buck5: BUCK5 { /* +1V8 */ >> + regulator-min-microvolt = <1800000>; >> + regulator-max-microvolt = <1800000>; >> + regulator-always-on; >> + regulator-boot-on; >> + }; >> + >> + buck6: BUCK6 { /* DRAM_1V1 */ >> + regulator-min-microvolt = <1100000>; >> + regulator-max-microvolt = <1100000>; >> + regulator-always-on; >> + regulator-boot-on; >> + }; >> + >> + ldo1: LDO1 { /* NVCC_SNVS_1V8 */ >> + regulator-min-microvolt = <1800000>; >> + regulator-max-microvolt = <1800000>; >> + regulator-always-on; >> + regulator-boot-on; >> + }; >> + >> + ldo3: LDO3 { /* VDDA_1P8 */ >> + regulator-min-microvolt = <1800000>; >> + regulator-max-microvolt = <1800000>; >> + regulator-always-on; >> + regulator-boot-on; >> + }; >> + >> + ldo4: LDO4 { /* ENET_2V5 */ >> + regulator-min-microvolt = <2500000>; >> + regulator-max-microvolt = <2500000>; >> + regulator-always-on; >> + regulator-boot-on; >> + }; >> + >> + ldo5: LDO5 { /* NVCC_SD2 */ >> + regulator-min-microvolt = <1800000>; >> + regulator-max-microvolt = <3300000>; >> + regulator-always-on; >> + regulator-boot-on; >> + }; >> + }; >> + }; >> + >> + crypto@35 { >> + compatible = "atmel,atecc508a"; >> + reg = <0x35>; >> + }; >> + >> + eeprom@50 { >> + compatible = "atmel,24c16"; >> + reg = <0x50>; >> + pagesize = <16>; >> + }; >> +}; >> + >> +&i2c2 { >> + clock-frequency = <100000>; >> + pinctrl-names = "default", "gpio"; >> + pinctrl-0 = <&pinctrl_i2c2>; >> + pinctrl-1 = <&pinctrl_i2c2_gpio>; >> + scl-gpios = <&gpio5 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; >> + sda-gpios = <&gpio5 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; >> + status = "okay"; >> + >> + hwrtc: rtc@32 { >> + compatible = "epson,rx8900"; >> + reg = <0x32>; >> + epson,vdet-disable; >> + trickle-diode-disable; >> + }; >> + >> + tcpc@52 { >> + compatible = "nxp,ptn5110", "tcpci"; >> + pinctrl-names = "default"; >> + pinctrl-0 = <&pinctrl_ptn5110>; >> + reg = <0x52>; >> + interrupt-parent = <&gpio4>; >> + interrupts = <19 IRQ_TYPE_LEVEL_LOW>; >> + >> + usb_con: connector { >> + compatible = "usb-c-connector"; >> + label = "USB-C"; >> + power-role = "dual"; >> + data-role = "dual"; >> + try-power-role = "sink"; >> + source-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>; >> + sink-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM) >> + PDO_VAR(5000, 5000, 3000)>; >> + op-sink-microwatt = <15000000>; >> + self-powered; >> + >> + ports { >> + #address-cells = <1>; >> + #size-cells = <0>; >> + >> + port@0 { >> + reg = <0>; >> + typec_dr_sw: endpoint { >> + remote-endpoint = <&usb3_drd_sw>; >> + }; >> + }; >> + >> + port@1 { >> + reg = <1>; >> + typec_con_ss: endpoint { >> + remote-endpoint = <&usb3_data_ss>; >> + }; >> + }; >> + }; >> + }; >> + }; >> +}; >> + >> +&i2c3 { >> + clock-frequency = <100000>; >> + pinctrl-names = "default", "gpio"; >> + pinctrl-0 = <&pinctrl_i2c3>; >> + pinctrl-1 = <&pinctrl_i2c3_gpio>; >> + scl-gpios = <&gpio5 18 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; >> + sda-gpios = <&gpio5 19 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; >> + status = "okay"; >> +}; >> + >> +&i2c5 { /* HDMI EDID bus */ >> + clock-frequency = <100000>; >> + pinctrl-names = "default", "gpio"; >> + pinctrl-0 = <&pinctrl_i2c5>; >> + pinctrl-1 = <&pinctrl_i2c5_gpio>; >> + scl-gpios = <&gpio3 26 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; >> + sda-gpios = <&gpio3 27 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; >> + status = "okay"; >> +}; >> + >> +&lcdif3 { >> + status = "okay"; >> +}; >> + >> +&pwm1 { >> + pinctrl-names = "default"; >> + pinctrl-0 = <&pinctrl_pwm1>; >> + status = "okay"; >> +}; >> + >> +&pwm2 { >> + pinctrl-names = "default"; >> + pinctrl-0 = <&pinctrl_pwm2>; >> + status = "okay"; >> +}; >> + >> +&snvs_pwrkey { >> + status = "okay"; >> +}; >> + >> +&uart2 { >> + /* system console */ >> + pinctrl-names = "default"; >> + pinctrl-0 = <&pinctrl_uart2>; >> + status = "okay"; >> +}; >> + >> +&uart3 { >> + pinctrl-names = "default"; >> + pinctrl-0 = <&pinctrl_uart3>; >> + status = "okay"; >> +}; >> + >> +&uart4 { >> + /* expansion port serial connection */ >> + pinctrl-names = "default"; >> + pinctrl-0 = <&pinctrl_uart4>; >> + status = "okay"; >> +}; >> + >> +&usb3_phy0 { >> + status = "okay"; >> +}; >> + >> +&usb3_0 { >> + status = "okay"; >> +}; >> + >> +&usb_dwc3_0 { >> + dr_mode = "otg"; >> + hnp-disable; >> + srp-disable; >> + adp-disable; >> + usb-role-switch; >> + status = "okay"; >> + >> + port { >> + usb3_drd_sw: endpoint { >> + remote-endpoint = <&typec_dr_sw>; >> + }; >> + }; >> +}; >> + >> +&usb3_phy1 { >> + vbus-supply = <®_usba_vbus>; >> + status = "okay"; >> +}; >> + >> +&usb3_1 { >> + status = "okay"; >> +}; >> + >> +&usb_dwc3_1 { >> + dr_mode = "host"; >> + status = "okay"; >> + snps,hsphy_interface = "utmi"; >> +}; >> + >> +&usdhc2 { >> + assigned-clocks = <&clk IMX8MP_CLK_USDHC2>; >> + assigned-clock-rates = <400000000>; >> + pinctrl-names = "default", "state_100mhz", "state_200mhz"; >> + pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>; >> + pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>; >> + pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>; >> + cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>; >> + bus-width = <4>; >> + vmmc-supply = <®_usdhc2_vmmc>; >> + vqmmc-supply = <&ldo5>; >> + status = "okay"; >> +}; >> + >> +&usdhc3 { >> + assigned-clocks = <&clk IMX8MP_CLK_USDHC3>; >> + assigned-clock-rates = <400000000>; >> + pinctrl-names = "default", "state_100mhz", "state_200mhz"; >> + pinctrl-0 = <&pinctrl_usdhc3>; >> + pinctrl-1 = <&pinctrl_usdhc3_100mhz>; >> + pinctrl-2 = <&pinctrl_usdhc3_200mhz>; >> + vmmc-supply = <&buck4>; >> + vqmmc-supply = <&buck5>; >> + bus-width = <8>; >> + no-sd; >> + no-sdio; >> + non-removable; >> + status = "okay"; >> +}; >> + >> +&wdog1 { >> + pinctrl-names = "default"; >> + pinctrl-0 = <&pinctrl_wdog>; >> + fsl,ext-reset-output; >> + status = "okay"; >> +}; >> + >> +&iomuxc { >> + pinctrl-names = "default"; >> + pinctrl-0 = <&pinctrl_hog>; >> + >> + pinctrl_ecspi1_cs: ecspi1-cs-grp { >> + fsl,pins = < >> + MX8MP_IOMUXC_ECSPI1_SS0__GPIO5_IO09 0x40 /* #SPI1_CS */ >> + >; >> + }; >> + >> + pinctrl_ecspi1: ecspi1-grp { >> + fsl,pins = < >> + MX8MP_IOMUXC_ECSPI1_SCLK__ECSPI1_SCLK 0x82 >> + MX8MP_IOMUXC_ECSPI1_MOSI__ECSPI1_MOSI 0x82 >> + MX8MP_IOMUXC_ECSPI1_MISO__ECSPI1_MISO 0x82 >> + >; >> + }; >> + >> + pinctrl_ecspi2_cs: ecspi2-cs-grp { >> + fsl,pins = < >> + MX8MP_IOMUXC_ECSPI2_SS0__GPIO5_IO13 0x40 /* #SPI2_CS */ >> + MX8MP_IOMUXC_GPIO1_IO08__GPIO1_IO08 0x40 /* #SPI2_CS2 */ >> + MX8MP_IOMUXC_GPIO1_IO09__GPIO1_IO09 0x40 /* #SPI2_CS3 */ >> + >; >> + }; >> + >> + pinctrl_ecspi2: ecspi2-grp { >> + fsl,pins = < >> + MX8MP_IOMUXC_ECSPI2_SCLK__ECSPI2_SCLK 0x82 >> + MX8MP_IOMUXC_ECSPI2_MOSI__ECSPI2_MOSI 0x82 >> + MX8MP_IOMUXC_ECSPI2_MISO__ECSPI2_MISO 0x82 >> + >; >> + }; >> + >> + pinctrl_eqos: eqos-grp { >> + fsl,pins = < >> + MX8MP_IOMUXC_ENET_MDC__ENET_QOS_MDC 0x0 >> + MX8MP_IOMUXC_ENET_MDIO__ENET_QOS_MDIO 0x0 >> + MX8MP_IOMUXC_ENET_RD0__ENET_QOS_RGMII_RD0 0x90 >> + MX8MP_IOMUXC_ENET_RD1__ENET_QOS_RGMII_RD1 0x90 >> + MX8MP_IOMUXC_ENET_RD2__ENET_QOS_RGMII_RD2 0x90 >> + MX8MP_IOMUXC_ENET_RD3__ENET_QOS_RGMII_RD3 0x90 >> + MX8MP_IOMUXC_ENET_RXC__CCM_ENET_QOS_CLOCK_GENERATE_RX_CLK 0x90 >> + MX8MP_IOMUXC_ENET_RX_CTL__ENET_QOS_RGMII_RX_CTL 0x90 >> + MX8MP_IOMUXC_ENET_TD0__ENET_QOS_RGMII_TD0 0x16 >> + MX8MP_IOMUXC_ENET_TD1__ENET_QOS_RGMII_TD1 0x16 >> + MX8MP_IOMUXC_ENET_TD2__ENET_QOS_RGMII_TD2 0x16 >> + MX8MP_IOMUXC_ENET_TD3__ENET_QOS_RGMII_TD3 0x16 >> + MX8MP_IOMUXC_ENET_TX_CTL__ENET_QOS_RGMII_TX_CTL 0x16 >> + MX8MP_IOMUXC_ENET_TXC__CCM_ENET_QOS_CLOCK_GENERATE_TX_CLK 0x16 >> + MX8MP_IOMUXC_SAI1_TXD6__GPIO4_IO18 0x10 /* #ETH0_INT */ >> + >; >> + }; >> + >> + pinctrl_fec: fec-grp { >> + fsl,pins = < >> + MX8MP_IOMUXC_SAI1_RXD2__ENET1_MDC 0x0 >> + MX8MP_IOMUXC_SAI1_RXD3__ENET1_MDIO 0x0 >> + MX8MP_IOMUXC_SAI1_RXD4__ENET1_RGMII_RD0 0x90 >> + MX8MP_IOMUXC_SAI1_RXD5__ENET1_RGMII_RD1 0x90 >> + MX8MP_IOMUXC_SAI1_RXD6__ENET1_RGMII_RD2 0x90 >> + MX8MP_IOMUXC_SAI1_RXD7__ENET1_RGMII_RD3 0x90 >> + MX8MP_IOMUXC_SAI1_TXC__ENET1_RGMII_RXC 0x90 >> + MX8MP_IOMUXC_SAI1_TXFS__ENET1_RGMII_RX_CTL 0x90 >> + MX8MP_IOMUXC_SAI1_TXD0__ENET1_RGMII_TD0 0x16 >> + MX8MP_IOMUXC_SAI1_TXD1__ENET1_RGMII_TD1 0x16 >> + MX8MP_IOMUXC_SAI1_TXD2__ENET1_RGMII_TD2 0x16 >> + MX8MP_IOMUXC_SAI1_TXD3__ENET1_RGMII_TD3 0x16 >> + MX8MP_IOMUXC_SAI1_TXD4__ENET1_RGMII_TX_CTL 0x16 >> + MX8MP_IOMUXC_SAI1_TXD5__ENET1_RGMII_TXC 0x16 >> + MX8MP_IOMUXC_SAI1_RXC__GPIO4_IO01 0x10 /* #ETH1_INT */ >> + >; >> + }; >> + >> + pinctrl_flexcan1: flexcan1-grp { >> + fsl,pins = < >> + MX8MP_IOMUXC_SPDIF_RX__CAN1_RX 0x154 >> + MX8MP_IOMUXC_SPDIF_TX__CAN1_TX 0x154 >> + >; >> + }; >> + >> + pinctrl_gpio_key_wakeup: gpio-key-wakeup-grp { >> + fsl,pins = < >> + MX8MP_IOMUXC_SAI2_MCLK__GPIO4_IO27 0x40 /* #WAKEUP */ >> + >; >> + }; >> + >> + pinctrl_gpio_leds: gpio-leds-grp { >> + fsl,pins = < >> + MX8MP_IOMUXC_SAI2_TXFS__GPIO4_IO24 0x40 /* LED_RED */ >> + MX8MP_IOMUXC_SAI2_TXC__GPIO4_IO25 0x40 /* LED_GREEN */ >> + MX8MP_IOMUXC_SAI2_TXD0__GPIO4_IO26 0x40 /* LED_YELLOW */ >> + >; >> + }; >> + >> + pinctrl_hdmi: hdmi-grp { >> + fsl,pins = < >> + MX8MP_IOMUXC_HDMI_CEC__HDMIMIX_HDMI_CEC 0x154 >> + MX8MP_IOMUXC_HDMI_HPD__HDMIMIX_HDMI_HPD 0x154 >> + >; >> + }; >> + >> + pinctrl_hog: hog-grp { >> + fsl,pins = < >> + MX8MP_IOMUXC_GPIO1_IO01__GPIO1_IO01 0x40 /* GPIO1 */ >> + MX8MP_IOMUXC_GPIO1_IO13__GPIO1_IO13 0x40 /* GPIO2 */ >> + MX8MP_IOMUXC_GPIO1_IO14__GPIO1_IO14 0x40 /* GPIO3 */ >> + MX8MP_IOMUXC_SAI5_RXD2__GPIO3_IO23 0x40 /* GPIO4 */ >> + MX8MP_IOMUXC_I2C4_SCL__GPIO5_IO20 0x40 /* ENA_KAM */ >> + MX8MP_IOMUXC_I2C4_SDA__GPIO5_IO21 0x40 /* ENA_LED */ >> + MX8MP_IOMUXC_SAI1_RXD1__GPIO4_IO03 0x40 /* #PCAP_RES */ >> + MX8MP_IOMUXC_GPIO1_IO10__GPIO1_IO10 0x40 /* #RTS4 */ >> + >; >> + }; >> + >> + pinctrl_i2c1: i2c1-grp { >> + fsl,pins = < >> + MX8MP_IOMUXC_I2C1_SCL__I2C1_SCL 0x400001c0 >> + MX8MP_IOMUXC_I2C1_SDA__I2C1_SDA 0x400001c0 >> + >; >> + }; >> + >> + pinctrl_i2c1_gpio: i2c1-gpio-grp { >> + fsl,pins = < >> + MX8MP_IOMUXC_I2C1_SCL__GPIO5_IO14 0xc0 >> + MX8MP_IOMUXC_I2C1_SDA__GPIO5_IO15 0xc0 >> + >; >> + }; >> + >> + pinctrl_i2c2: i2c2-grp { >> + fsl,pins = < >> + MX8MP_IOMUXC_I2C2_SCL__I2C2_SCL 0x400001c0 >> + MX8MP_IOMUXC_I2C2_SDA__I2C2_SDA 0x400001c0 >> + >; >> + }; >> + >> + pinctrl_i2c2_gpio: i2c2-gpio-grp { >> + fsl,pins = < >> + MX8MP_IOMUXC_I2C2_SCL__GPIO5_IO16 0xc0 >> + MX8MP_IOMUXC_I2C2_SDA__GPIO5_IO17 0xc0 >> + >; >> + }; >> + >> + pinctrl_i2c3: i2c3-grp { >> + fsl,pins = < >> + MX8MP_IOMUXC_I2C3_SCL__I2C3_SCL 0x400001c2 >> + MX8MP_IOMUXC_I2C3_SDA__I2C3_SDA 0x400001c2 >> + >; >> + }; >> + >> + pinctrl_i2c3_gpio: i2c3-gpio-grp { >> + fsl,pins = < >> + MX8MP_IOMUXC_I2C3_SCL__GPIO5_IO18 0xc2 >> + MX8MP_IOMUXC_I2C3_SDA__GPIO5_IO19 0xc2 >> + >; >> + }; >> + >> + pinctrl_i2c5: i2c5-grp { >> + fsl,pins = < >> + MX8MP_IOMUXC_HDMI_DDC_SCL__I2C5_SCL 0x400000c4 >> + MX8MP_IOMUXC_HDMI_DDC_SDA__I2C5_SDA 0x400000c4 >> + >; >> + }; >> + >> + pinctrl_i2c5_gpio: i2c5-gpio-grp { >> + fsl,pins = < >> + MX8MP_IOMUXC_HDMI_DDC_SCL__GPIO3_IO26 0xc4 >> + MX8MP_IOMUXC_HDMI_DDC_SDA__GPIO3_IO27 0xc4 >> + >; >> + }; >> + >> + pinctrl_nfc: nfc-grp { >> + fsl,pins = < >> + MX8MP_IOMUXC_GPIO1_IO06__GPIO1_IO06 0x40 /* NFC_INT_I */ >> + MX8MP_IOMUXC_GPIO1_IO07__GPIO1_IO07 0x40 /* NFC_INT */ >> + >; >> + }; >> + >> + pinctrl_pmic: pmic-grp { >> + fsl,pins = < >> + MX8MP_IOMUXC_GPIO1_IO03__GPIO1_IO03 0x40 /* #PMIC_INT */ >> + >; >> + }; >> + >> + pinctrl_ptn5110: ptn5110-grp { >> + fsl,pins = < >> + MX8MP_IOMUXC_SAI1_TXD7__GPIO4_IO19 0x1c4 /* #USB-C_ALERT */ >> + >; >> + }; >> + >> + pinctrl_pwm1: pwm1-grp { >> + fsl,pins = < >> + MX8MP_IOMUXC_SPDIF_EXT_CLK__PWM1_OUT 0x116 >> + >; >> + }; >> + >> + pinctrl_pwm2: pwm2-grp { >> + fsl,pins = < >> + MX8MP_IOMUXC_SAI5_RXD0__PWM2_OUT 0x116 /* EXT_PWM */ >> + >; >> + }; >> + >> + pinctrl_reg_usdhc2_vmmc: reg-usdhc2-vmmc-grp { >> + fsl,pins = < >> + MX8MP_IOMUXC_SD2_RESET_B__GPIO2_IO19 0x40 >> + >; >> + }; >> + >> + pinctrl_sbu_mux: sbu-mux-grp { >> + fsl,pins = < >> + MX8MP_IOMUXC_SAI1_MCLK__GPIO4_IO20 0x16 /* #USB-C_SEL */ >> + MX8MP_IOMUXC_SD2_WP__GPIO2_IO20 0x16 /* #USB-C_EN */ >> + >; >> + }; >> + >> + pinctrl_slb9670: slb9670-grp { >> + fsl,pins = < >> + MX8MP_IOMUXC_GPIO1_IO00__GPIO1_IO00 0x40 /* #TPM_IRQ */ >> + MX8MP_IOMUXC_SAI1_RXD0__GPIO4_IO02 0x40 /* #TPM_RES */ >> + >; >> + }; >> + >> + pinctrl_uart2: uart2-grp { >> + fsl,pins = < >> + MX8MP_IOMUXC_UART2_RXD__UART2_DCE_RX 0x40 >> + MX8MP_IOMUXC_UART2_TXD__UART2_DCE_TX 0x40 >> + >; >> + }; >> + >> + pinctrl_uart3: uart3-grp { >> + fsl,pins = < >> + MX8MP_IOMUXC_UART3_RXD__UART3_DCE_RX 0x40 >> + MX8MP_IOMUXC_UART3_TXD__UART3_DCE_TX 0x40 >> + >; >> + }; >> + >> + pinctrl_uart4: uart4-grp { >> + fsl,pins = < >> + MX8MP_IOMUXC_UART4_RXD__UART4_DCE_RX 0x40 >> + MX8MP_IOMUXC_UART4_TXD__UART4_DCE_TX 0x40 >> + >; >> + }; >> + >> + pinctrl_usb1: usb1-grp { >> + fsl,pins = < >> + MX8MP_IOMUXC_GPIO1_IO12__GPIO1_IO12 0x40 /* USB_PWR */ >> + >; >> + }; >> + >> + pinctrl_usdhc2: usdhc2-grp { >> + fsl,pins = < >> + MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x190 >> + MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d0 >> + MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d0 >> + MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d0 >> + MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d0 >> + MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d0 >> + MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc0 /* SD2_VSEL */ >> + >; >> + }; >> + >> + pinctrl_usdhc2_100mhz: usdhc2-100mhz-grp { >> + fsl,pins = < >> + MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x194 >> + MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d4 >> + MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d4 >> + MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d4 >> + MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d4 >> + MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d4 >> + MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc0 /* SD2_VSEL */ >> + >; >> + }; >> + >> + pinctrl_usdhc2_200mhz: usdhc2-200mhz-grp { >> + fsl,pins = < >> + MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x196 >> + MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d6 >> + MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d6 >> + MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d6 >> + MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d6 >> + MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d6 >> + MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc0 /* SD2_VSEL */ >> + >; >> + }; >> + >> + pinctrl_usdhc2_gpio: usdhc2-gpio-grp { >> + fsl,pins = < >> + MX8MP_IOMUXC_SD2_CD_B__GPIO2_IO12 0x1c4 >> + >; >> + }; >> + >> + pinctrl_usdhc3: usdhc3-grp { >> + fsl,pins = < >> + MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK 0x190 >> + MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD 0x1d0 >> + MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0 0x1d0 >> + MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1 0x1d0 >> + MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2 0x1d0 >> + MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3 0x1d0 >> + MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4 0x1d0 >> + MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5 0x1d0 >> + MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6 0x1d0 >> + MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7 0x1d0 >> + MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE 0x190 >> + MX8MP_IOMUXC_NAND_READY_B__USDHC3_RESET_B 0x40 /* #SD3_RESET */ >> + >; >> + }; >> + >> + pinctrl_usdhc3_100mhz: usdhc3-100mhz-grp { >> + fsl,pins = < >> + MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK 0x194 >> + MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD 0x1d4 >> + MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0 0x1d4 >> + MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1 0x1d4 >> + MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2 0x1d4 >> + MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3 0x1d4 >> + MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4 0x1d4 >> + MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5 0x1d4 >> + MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6 0x1d4 >> + MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7 0x1d4 >> + MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE 0x194 >> + >; >> + }; >> + >> + pinctrl_usdhc3_200mhz: usdhc3-200mhz-grp { >> + fsl,pins = < >> + MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK 0x192 >> + MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD 0x1d2 >> + MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0 0x1d2 >> + MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1 0x1d2 >> + MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2 0x1d2 >> + MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3 0x1d2 >> + MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4 0x1d2 >> + MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5 0x1d2 >> + MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6 0x1d2 >> + MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7 0x1d2 >> + MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE 0x192 >> + >; >> + }; >> + >> + pinctrl_wdog: wdog-grp { >> + fsl,pins = < >> + MX8MP_IOMUXC_GPIO1_IO02__WDOG1_WDOG_B 0xc6 /* #WDOG */ >> + >; >> + }; >> +}; >> -- >> 2.43.0 >> Thank you for the comments, I'll fix it. Best Regards Goran ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v2 0/3] arm64: dts: Add support for Ultratronik i.MX8MP Ultra-MACH SBC 2025-06-11 11:30 [PATCH v2 0/3] arm64: dts: Add support for Ultratronik i.MX8MP Ultra-MACH SBC Goran Rađenović ` (2 preceding siblings ...) 2025-06-11 11:30 ` [PATCH v2 3/3] arm64: dts: imx8mp: Add initial support for Ultratronik imx8mp-ultra-mach-sbc board Goran Rađenović @ 2025-06-11 13:11 ` Rob Herring (Arm) 3 siblings, 0 replies; 12+ messages in thread From: Rob Herring (Arm) @ 2025-06-11 13:11 UTC (permalink / raw) To: Goran Rađenović Cc: linux-kernel, boerge.struempfel, devicetree, conor+dt, shawnguo, krzk+dt On Wed, 11 Jun 2025 13:30:35 +0200, Goran Rađenović wrote: > This patch series adds support for the Ultratronik i.MX8MP-based Ultra-MACH SBC. > > The Ultra-MACH SBC is an industrial-grade single-board computer based on the NXP i.MX8M Plus SoC. This initial support includes: > > - Updating the MAINTAINERS file to include the new board in the Ultratronik support section. > - Adding a compatible string entry for the board to `fsl.yaml` in device tree bindings. > - Introducing a new device tree source file `imx8mp-ultra-mach-sbc.dts` with basic hardware support. > > This series is modeled after the support added for the STM32MP157C-based Ultra-FLY SBC and aims to follow the conventions used for other i.MX8MP boards in mainline.. > > Changes in v2: > - Use `enum` with `const:` values in fsl.yaml to correctly represent multiple compatibles. > - Updated SPI child node name to use the generic `nfc-transceiver` per DT naming conventions. > - Renamed several peripheral nodes (`crypto@35`, `pmic@25`, etc.) to standard names. > - Minor formatting cleanup and compliance fixes per review feedback. > > Tested on hardware with: > - Serial console > - HDMI output via LCDIF pipeline > - eMMC and SD boot > - USB gadget and host modes > - Ethernet and basic SPI/I2C devices > > Feedback is welcome. > > Goran Rađenović (3): > MAINTAINERS: Add i.MX8MP Ultra-MACH SBC to ULTRATRONIK BOARD SUPPORT > dt-bindings: arm: imx8mp: Add Ultratronik Ultra-MACH SBC > arm64: dts: imx8mp: Add initial support for Ultratronik > imx8mp-ultra-mach-sbc board > > Documentation/devicetree/bindings/arm/fsl.yaml | 6 + > MAINTAINERS | 1 + > arch/arm64/boot/dts/freescale/Makefile | 1 + > arch/arm64/boot/dts/freescale/imx8mp-ultra-mach-sbc.dts | 909 ++++++++++++++++++ > 4 files changed, 917 insertions(+) > create mode 100644 arch/arm64/boot/dts/freescale/imx8mp-ultra-mach-sbc.dts > > base-commit: cd2e103d57e5615f9bb027d772f93b9efd567224 > -- > 2.43.0 > > My bot found new DTB warnings on the .dts files added or changed in this series. Some warnings may be from an existing SoC .dtsi. Or perhaps the warnings are fixed by another series. Ultimately, it is up to the platform maintainer whether these warnings are acceptable or not. No need to reply unless the platform maintainer has comments. If you already ran DT checks and didn't see these error(s), then make sure dt-schema is up to date: pip3 install dtschema --upgrade This patch series was applied (using b4) to base: Base: using specified base-commit cd2e103d57e5615f9bb027d772f93b9efd567224 If this is not the correct base, please add 'base-commit' tag (or use b4 which does this automatically) New warnings running 'make CHECK_DTBS=y for arch/arm64/boot/dts/freescale/' for 20250611113039.304742-1-goran.radni@gmail.com: arch/arm64/boot/dts/freescale/imx8mp-ultra-mach-sbc.dtb: / (ultratronik,imx8mp-ultra-mach-sbc): compatible: 'oneOf' conditional failed, one must be fixed: ['ultratronik,imx8mp-ultra-mach-sbc', 'fsl,imx8mp'] is too short ['ultratronik,imx8mp-ultra-mach-sbc', 'fsl,imx8mp'] is too long arch/arm64/boot/dts/freescale/imx8mp-ultra-mach-sbc.dtb: / (ultratronik,imx8mp-ultra-mach-sbc): compatible: 'oneOf' conditional failed, one must be fixed: ['ultratronik,imx8mp-ultra-mach-sbc', 'fsl,imx8mp'] is too short 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['tq,imx8dxp-tqma8xdp-mba8xx'] 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['tq,imx8qxp-tqma8xqp-mba8xx'] 'tq,imx8dxp-tqma8xdp' was expected 'tq,imx8qxp-tqma8xqp' was expected arch/arm64/boot/dts/freescale/imx8mp-ultra-mach-sbc.dtb: / (ultratronik,imx8mp-ultra-mach-sbc): compatible: 'oneOf' conditional failed, one must be fixed: ['ultratronik,imx8mp-ultra-mach-sbc', 'fsl,imx8mp'] is too short 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['tq,imx8qxp-tqma8xqps-mb-smarc-2'] 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['tq,imx8dxp-tqma8xdps-mb-smarc-2'] 'tq,imx8qxp-tqma8xqps' was expected 'tq,imx8dxp-tqma8xdps' was expected 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['armadeus,imx1-apf9328', 'fsl,imx1ads'] 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['creative,x-fi3', 'fsl,imx23-evk', 'fsl,stmp378x-devb', 'olimex,imx23-olinuxino', 'sandisk,sansa_fuze_plus'] 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['fsl,imx25-pdk', 'karo,imx25-tx25'] 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['eukrea,mbimxsd25-baseboard'] 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['eukrea,mbimxsd25-baseboard-cmo-qvga', 'eukrea,mbimxsd25-baseboard-dvi-svga', 'eukrea,mbimxsd25-baseboard-dvi-vga'] 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['armadeus,imx27-apf27', 'fsl,imx27-pdk'] 'armadeus,imx27-apf27dev' was expected 'eukrea,mbimxsd27-baseboard' was expected 'phytec,imx27-pca100-rdk' was expected 'phytec,imx27-pcm970' was expected 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['armadeus,imx28-apf28', 'bluegiga,apx4devkit', 'crystalfontz,cfa10036', 'eukrea,mbmx28lc', 'fsl,imx28-evk', 'i2se,duckbill', 'i2se,duckbill-2', 'karo,tx28', 'lwn,imx28-btt3', 'lwn,imx28-xea', 'msr,m28cu3', 'schulercontrol,imx28-sps1', 'technologic,imx28-ts4600'] 'aries,m28' was expected 'aries,m28evk' was expected 'armadeus,imx28-apf28dev' was expected 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['crystalfontz,cfa10037', 'crystalfontz,cfa10049', 'crystalfontz,cfa10057', 'crystalfontz,cfa10058'] 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['crystalfontz,cfa10055', 'crystalfontz,cfa10056'] 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['i2se,duckbill-2-485', 'i2se,duckbill-2-enocean', 'i2se,duckbill-2-spi'] 'eukrea,mbmx283lc' was expected 'eukrea,mbmx287lc' was expected 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['buglabs,imx31-bug', 'logicpd,imx31-lite'] 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['fsl,imx35-pdk'] 'eukrea,mbimxsd35-baseboard' was expected 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['fsl,imx50-evk', 'kobo,aura'] 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['armadeus,imx51-apf51', 'fsl,imx51-babbage', 'technologic,imx51-ts4800', 'zii,imx51-scu3-esb', 'zii,imx51-scu2-mezz', 'zii,imx51-rdu1'] 'armadeus,imx51-apf51dev' was expected 'digi,connectcore-ccxmx51-jsk' was expected 'eukrea,mbimxsd51' was expected 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['bhf,cx9020', 'fsl,imx53-ard', 'fsl,imx53-evk', 'fsl,imx53-qsb', 'fsl,imx53-qsrb', 'fsl,imx53-smd', 'ge,imx53-cpuvo', 'inversepath,imx53-usbarmory', 'karo,tx53', 'kiebackpeter,imx53-ddc', 'kiebackpeter,imx53-hsc', 'menlo,m53menlo', 'starterkit,sk-imx53', 'voipac,imx53-dmm-668'] 'aries,imx53-m53evk' was expected 'tq,mba53' was expected 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['auvidea,h100', 'bosch,imx6q-acc', 'boundary,imx6q-nitrogen6_max', 'boundary,imx6q-nitrogen6_som2', 'boundary,imx6q-nitrogen6x', 'compulab,cm-fx6', 'dmo,imx6q-edmqmx6', 'ds,imx6q-sbc', 'embest,imx6q-marsboard', 'emtrion,emcon-mx6', 'emtrion,emcon-mx6-avari', 'engicam,imx6-icore', 'engicam,imx6-icore-rqs', 'fsl,imx6q-arm2', 'fsl,imx6q-sabreauto', 'fsl,imx6q-sabrelite', 'fsl,imx6q-sabresd', 'karo,imx6q-tx6q', 'kiebackpeter,imx6q-tpc', 'kontron,imx6q-samx6i', 'kosagi,imx6q-novena', 'kvg,vicut1q', 'logicpd,imx6q-logicpd', 'lwn,display5', 'lwn,mccmon6', 'nutsboard,imx6q-pistachio', 'microsys,sbc6x', 'poslab,imx6q-savageboard', 'prt,prti6q', 'prt,prtwd2', 'rex,imx6q-rex-pro', 'skov,imx6q-skov-revc-lt2', 'skov,imx6q-skov-revc-lt6', 'skov,imx6q-skov-reve-mi1010ait-1cp1', 'solidrun,cubox-i/q', 'solidrun,hummingboard/q', 'solidrun,hummingboard2/q', 'solidrun,solidsense/q', 'tbs,imx6q-tbs2910', 'technexion,imx6q-pico-dwarf', 'technexion,imx6q-pico-hobbit', 'technexion,imx6q-pico-nymph', 'technexion,imx6q-pico-pi', 'technologic,imx6q-ts4900', 'technologic,imx6q-ts7970', 'udoo,imx6q-udoo', 'uniwest,imx6q-evi', 'variscite,dt6customboard', 'wand,imx6q-wandboard', 'ysoft,imx6q-yapp4-crux', 'ysoft,imx6q-yapp4-pegasus', 'zealz,imx6q-gk802', 'zii,imx6q-zii-rdu2'] 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['advantech,imx6q-dms-ba16', 'ge,imx6q-b450v3', 'ge,imx6q-b650v3', 'ge,imx6q-b850v3'] 'armadeus,imx6q-apf6dev' was expected 'compulab,utilite-pro' was expected 'dfi,fs700-m60-6qd' was expected 'dh,imx6q-dhcom-pdk2' was expected 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['gw,imx6q-gw51xx', 'gw,imx6q-gw52xx', 'gw,imx6q-gw53xx', 'gw,imx6q-gw5400-a', 'gw,imx6q-gw54xx', 'gw,imx6q-gw551x', 'gw,imx6q-gw552x', 'gw,imx6q-gw553x', 'gw,imx6q-gw560x', 'gw,imx6q-gw5903', 'gw,imx6q-gw5904', 'gw,imx6q-gw5907', 'gw,imx6q-gw5910', 'gw,imx6q-gw5912', 'gw,imx6q-gw5913'] 'kontron,imx6q-samx6i-ads2' was expected 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['phytec,imx6q-pbac06-emmc', 'phytec,imx6q-pbac06-nand'] 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['comvetia,imx6q-lxr', 'phytec,imx6q-pbab01'] 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['toradex,apalis_imx6q-ixora', 'toradex,apalis_imx6q-ixora-v1.1', 'toradex,apalis_imx6q-ixora-v1.2', 'toradex,apalis_imx6q-eval', 'toradex,apalis_imx6q-eval-v1.2'] 'variscite,mx6customboard' was expected 'tq,imx6q-mba6x-a' was expected 'tq,imx6q-mba6x-b' was expected 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['boundary,imx6qp-nitrogen6_max', 'boundary,imx6qp-nitrogen6_som2', 'fsl,imx6qp-sabreauto', 'fsl,imx6qp-sabresd', 'karo,imx6qp-tx6qp', 'kvg,vicutp', 'prt,prtwd3', 'wand,imx6qp-wandboard', 'ysoft,imx6qp-yapp4-crux-plus', 'ysoft,imx6qp-yapp4-pegasus-plus', 'zii,imx6qp-zii-rdu2'] 'phytec,imx6qp-pbac06-nand' was expected 'tq,imx6qp-mba6x-b' was expected 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['abb,aristainetos-imx6dl-4', 'abb,aristainetos-imx6dl-7', 'abb,aristainetos2-imx6dl-4', 'abb,aristainetos2-imx6dl-7', 'alt,alti6p', 'boundary,imx6dl-nit6xlite', 'boundary,imx6dl-nitrogen6x', 'bticino,imx6dl-mamoj', 'eckelmann,imx6dl-ci4x10', 'emtrion,emcon-mx6', 'emtrion,emcon-mx6-avari', 'engicam,imx6-icore', 'engicam,imx6-icore-rqs', 'fsl,imx6dl-sabreauto', 'fsl,imx6dl-sabrelite', 'fsl,imx6dl-sabresd', 'karo,imx6dl-tx6dl', 'kontron,imx6dl-samx6i', 'kvg,victgo', 'kvg,vicut1', 'ply,plybas', 'ply,plym2m', 'poslab,imx6dl-savageboard', 'prt,prtmvt', 'prt,prtrvt', 'prt,prtvt7', 'rex,imx6dl-rex-basic', 'riot,imx6s-riotboard', 'sielaff,imx6dl-board', 'skov,imx6dl-skov-revc-lt2', 'skov,imx6dl-skov-revc-lt6', 'solidrun,cubox-i/dl', 'solidrun,hummingboard/dl', 'solidrun,hummingboard2/dl', 'solidrun,solidsense/dl', 'technexion,imx6dl-pico-dwarf', 'technexion,imx6dl-pico-hobbit', 'technexion,imx6dl-pico-nymph', 'technexion,imx6dl-pico-pi', 'technologic,imx6dl-ts4900', 'technologic,imx6dl-ts7970', 'udoo,imx6dl-udoo', 'vdl,lanmcu', 'wand,imx6dl-wandboard', 'ysoft,imx6dl-yapp4-draco', 'ysoft,imx6dl-yapp4-hydra', 'ysoft,imx6dl-yapp4-lynx', 'ysoft,imx6dl-yapp4-orion', 'ysoft,imx6dl-yapp4-phoenix', 'ysoft,imx6dl-yapp4-ursa'] 'armadeus,imx6dl-apf6dev' was expected 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['ge,imx6dl-b105v2', 'ge,imx6dl-b105pv2', 'ge,imx6dl-b125v2', 'ge,imx6dl-b125pv2', 'ge,imx6dl-b155v2'] 'dfi,fs700-m60-6dl' was expected 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['dh,imx6dl-dhcom-pdk2', 'dh,imx6dl-dhcom-picoitx'] 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['gw,imx6dl-gw51xx', 'gw,imx6dl-gw52xx', 'gw,imx6dl-gw53xx', 'gw,imx6dl-gw54xx', 'gw,imx6dl-gw551x', 'gw,imx6dl-gw552x', 'gw,imx6dl-gw553x', 'gw,imx6dl-gw560x', 'gw,imx6dl-gw5903', 'gw,imx6dl-gw5904', 'gw,imx6dl-gw5907', 'gw,imx6dl-gw5910', 'gw,imx6dl-gw5912', 'gw,imx6dl-gw5913'] 'kontron,imx6dl-samx6i-ads2' was expected 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['phytec,imx6dl-pbac06-emmc', 'phytec,imx6dl-pbac06-nand'] 'phytec,imx6dl-pbab01' was expected 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['toradex,colibri_imx6dl-aster', 'toradex,colibri_imx6dl-eval-v3', 'toradex,colibri_imx6dl-iris', 'toradex,colibri_imx6dl-iris-v2'] 'dh,imx6s-dhcom-drc02' was expected 'tq,imx6dl-mba6x-a' was expected 'tq,imx6dl-mba6x-b' was expected 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['fsl,imx6sl-evk', 'kobo,aura2', 'kobo,tolino-shine2hd', 'kobo,tolino-shine3', 'kobo,tolino-vision', 'kobo,tolino-vision5', 'revotics,imx6sl-warp'] 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['fsl,imx6sll-evk', 'kobo,clarahd', 'kobo,librah2o'] 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['kobo,clara2e-a', 'kobo,clara2e-b'] 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['boundary,imx6sx-nitrogen6sx', 'fsl,imx6sx-sabreauto', 'fsl,imx6sx-sdb', 'fsl,imx6sx-sdb-reva', 'samtec,imx6sx-vining-2000', 'udoo,neobasic', 'udoo,neoextended', 'udoo,neofull'] 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['engicam,imx6ul-geam', 'engicam,imx6ul-isiot', 'fsl,imx6ul-14x14-evk', 'karo,imx6ul-tx6ul', 'kontron,sl-imx6ul', 'prt,prti6g', 'technexion,imx6ul-pico-dwarf', 'technexion,imx6ul-pico-hobbit', 'technexion,imx6ul-pico-pi'] 'armadeus,imx6ul-opos6uldev' was expected 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['digi,ccimx6ulsbcexpress', 'digi,ccimx6ulsbcpro'] 'grinn,imx6ul-liteboard' was expected 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['phytec,imx6ul-pbacd10-emmc', 'phytec,imx6ul-pbacd10-nand'] 'variscite,mx6ulconcerto' was expected 'kontron,bl-imx6ul' was expected 'kontron,bl-imx6ul-43' was expected 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['tq,imx6ul-tqma6ul1-mba6ulx'] 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['tq,imx6ul-tqma6ul2-mba6ulx'] 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['tq,imx6ul-tqma6ul2l-mba6ulx', 'tq,imx6ul-tqma6ul2l-mba6ulxl'] 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['fsl,imx6ull-14x14-evk', 'joz,jozacp', 'kontron,sl-imx6ull', 'myir,imx6ull-mys-6ulx-eval', 'uni-t,uti260b'] 'armadeus,imx6ull-opos6uldev' was expected 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['chargebyte,imx6ull-tarragon-master', 'chargebyte,imx6ull-tarragon-micro', 'chargebyte,imx6ull-tarragon-slave', 'chargebyte,imx6ull-tarragon-slavext'] 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['dh,imx6ull-dhcom-drc02', 'dh,imx6ull-dhcom-pdk2', 'dh,imx6ull-dhcom-picoitx'] 'marantec,imx6ull-dhcor-maveo-box' was expected 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['phytec,imx6ull-pbacd10-emmc', 'phytec,imx6ull-pbacd10-nand'] 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['phytec,imx6ull-phygate-tauri-emmc', 'phytec,imx6ull-phygate-tauri-nand'] 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['toradex,colibri-imx6ull-aster', 'toradex,colibri-imx6ull-eval', 'toradex,colibri-imx6ull-iris', 'toradex,colibri-imx6ull-iris-v2'] 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['toradex,colibri-imx6ull-emmc-aster', 'toradex,colibri-imx6ull-emmc-eval', 'toradex,colibri-imx6ull-emmc-iris', 'toradex,colibri-imx6ull-emmc-iris-v2'] 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['toradex,colibri-imx6ull-wifi-eval', 'toradex,colibri-imx6ull-wifi-aster', 'toradex,colibri-imx6ull-wifi-iris', 'toradex,colibri-imx6ull-wifi-iris-v2'] 'kontron,bl-imx6ull' was expected 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['tq,imx6ull-tqma6ull2-mba6ulx'] 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['tq,imx6ull-tqma6ull2l-mba6ulx', 'tq,imx6ull-tqma6ull2l-mba6ulxl'] 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['seeed,imx6ull-seeed-npi-emmc', 'seeed,imx6ull-seeed-npi-nand'] 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['bsh,imx6ulz-bsh-smm-m2', 'fsl,imx6ulz-14x14-evk'] 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['element14,imx7s-warp', 'toradex,colibri-imx7s'] 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['toradex,colibri-imx7s-aster', 'toradex,colibri-imx7s-eval-v3', 'toradex,colibri-imx7s-iris', 'toradex,colibri-imx7s-iris-v2'] 'tq,imx7s-mba7' was expected 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['boundary,imx7d-nitrogen7', 'compulab,cl-som-imx7', 'fsl,imx7d-sdb', 'fsl,imx7d-sdb-reva', 'kam,imx7d-flex-concentrator', 'kam,imx7d-flex-concentrator-mfg', 'novtech,imx7d-meerkat96', 'remarkable,imx7d-remarkable2', 'storopack,imx7d-smegw01', 'technexion,imx7d-pico-dwarf', 'technexion,imx7d-pico-hobbit', 'technexion,imx7d-pico-nymph', 'technexion,imx7d-pico-pi', 'zii,imx7d-rmu2', 'zii,imx7d-rpu2'] 'tq,imx7d-mba7' was expected 'compulab,sbc-imx7' was expected 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['toradex,colibri-imx7d-aster', 'toradex,colibri-imx7d-eval-v3', 'toradex,colibri-imx7d-iris', 'toradex,colibri-imx7d-iris-v2'] 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['toradex,colibri-imx7d-emmc-aster', 'toradex,colibri-imx7d-emmc-eval-v3', 'toradex,colibri-imx7d-emmc-iris', 'toradex,colibri-imx7d-emmc-iris-v2'] 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['ea,imx7ulp-com', 'fsl,imx7ulp-evk'] 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['beacon,imx8mm-beacon-kit', 'boundary,imx8mm-nitrogen8mm', 'dmo,imx8mm-data-modul-edm-sbc', 'emtrion,emcon-mx8mm-avari', 'fsl,imx8mm-ddr4-evk', 'fsl,imx8mm-evk', 'fsl,imx8mm-evkb', 'gateworks,imx8mm-gw75xx-0x', 'gateworks,imx8mm-gw7904', 'gw,imx8mm-gw71xx-0x', 'gw,imx8mm-gw72xx-0x', 'gw,imx8mm-gw73xx-0x', 'gw,imx8mm-gw7901', 'gw,imx8mm-gw7902', 'gw,imx8mm-gw7903', 'innocomm,wb15-evk', 'kontron,imx8mm-sl', 'kontron,imx8mm-osm-s', 'prt,prt8mm'] 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['compulab,imx8mm-iot-gateway'] 'ees,imx8mm-emtop-baseboard' was expected 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['engicam,icore-mx8mm-ctouch2', 'engicam,icore-mx8mm-edimm2.2'] 'kontron,imx8mm-bl' was expected 'kontron,imx8mm-bl-osm-s' was expected 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['menlo,mx8menlo', 'toradex,verdin-imx8mm-nonwifi-dahlia', 'toradex,verdin-imx8mm-nonwifi-dev', 'toradex,verdin-imx8mm-nonwifi-ivy', 'toradex,verdin-imx8mm-nonwifi-mallow', 'toradex,verdin-imx8mm-nonwifi-yavia'] 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['toradex,verdin-imx8mm-wifi-dahlia', 'toradex,verdin-imx8mm-wifi-dev', 'toradex,verdin-imx8mm-wifi-ivy', 'toradex,verdin-imx8mm-wifi-mallow', 'toradex,verdin-imx8mm-wifi-yavia'] 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['phytec,imx8mm-phyboard-polis-rdk', 'phytec,imx8mm-phygate-tauri-l'] 'variscite,var-som-mx8mm-symphony' was expected 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['cloos,imx8mm-phg', 'tq,imx8mm-tqma8mqml-mba8mx'] 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['beacon,imx8mn-beacon-kit', 'bsh,imx8mn-bsh-smm-s2', 'bsh,imx8mn-bsh-smm-s2pro', 'fsl,imx8mn-ddr3l-evk', 'fsl,imx8mn-ddr4-evk', 'fsl,imx8mn-evk', 'gw,imx8mn-gw7902'] 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['dimonoff,gateway-evk', 'rve,gateway', 'variscite,var-som-mx8mn-symphony'] 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['tq,imx8mn-tqma8mqnl-mba8mx'] 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['beacon,imx8mp-beacon-kit', 'dmo,imx8mp-data-modul-edm-sbc', 'emcraft,imx8mp-navqp', 'fsl,imx8mp-evk', 'fsl,imx8mp-evk-revb4', 'gateworks,imx8mp-gw71xx-2x', 'gateworks,imx8mp-gw72xx-2x', 'gateworks,imx8mp-gw73xx-2x', 'gateworks,imx8mp-gw74xx', 'gateworks,imx8mp-gw75xx-2x', 'gateworks,imx8mp-gw82xx-2x', 'skov,imx8mp-skov-basic', 'skov,imx8mp-skov-revb-hdmi', 'skov,imx8mp-skov-revb-lt6', 'skov,imx8mp-skov-revb-mi1010ait-1cp1', 'skov,imx8mp-skov-revc-bd500', 'skov,imx8mp-skov-revc-tian-g07017', 'ysoft,imx8mp-iota2-lumpy'] 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['abb,imx8mp-aristanetos3-adpismarc', 'abb,imx8mp-aristanetos3-helios', 'abb,imx8mp-aristanetos3-proton2s'] 'avnet,sm2s-imx8mp-14N0600E-ep1' was expected 'boundary,imx8mp-nitrogen-enc-carrier-board' was expected 'boundary,imx8mp-nitrogen-smarc-universal-board' was expected 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['dh,imx8mp-dhcom-drc02', 'dh,imx8mp-dhcom-pdk2', 'dh,imx8mp-dhcom-pdk3', 'dh,imx8mp-dhcom-picoitx'] 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['engicam,icore-mx8mp-edimm2.2'] 'kontron,imx8mp-bl-osm-s' was expected 'kontron,imx8mp-smarc-eval-carrier' was expected 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['phytec,imx8mp-libra-rdk-fpsc'] 'phytec,imx8mp-phyboard-pollux-rdk' was expected 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['polyhex,imx8mp-debix-model-a'] 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['polyhex,imx8mp-debix-som-a-bmb-08'] 'toradex,smarc-imx8mp-dev' was expected 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['toradex,verdin-imx8mp-nonwifi-dahlia', 'toradex,verdin-imx8mp-nonwifi-dev', 'toradex,verdin-imx8mp-nonwifi-ivy', 'toradex,verdin-imx8mp-nonwifi-mallow', 'toradex,verdin-imx8mp-nonwifi-yavia'] 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['toradex,verdin-imx8mp-wifi-dahlia', 'toradex,verdin-imx8mp-wifi-dev', 'toradex,verdin-imx8mp-wifi-ivy', 'toradex,verdin-imx8mp-wifi-mallow', 'toradex,verdin-imx8mp-wifi-yavia'] 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['tq,imx8mp-tqma8mpql-mba8mpxl', 'tq,imx8mp-tqma8mpql-mba8mp-ras314'] 'ultratronik,imx8mp-ultra-mach-sbc' is not one of [{'const': 'ultratronik,imx8mp-ultra-mach-sbc'}, {'const': 'fsl,imx8mp'}] 'variscite,var-som-mx8mp-symphony' was expected 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['boundary,imx8mq-nitrogen8m', 'boundary,imx8mq-nitrogen8m-som', 'einfochips,imx8mq-thor96', 'fsl,imx8mq-evk', 'google,imx8mq-phanbell', 'kontron,pitx-imx8m', 'purism,librem5-devkit', 'solidrun,hummingboard-pulse', 'technexion,pico-pi-imx8m'] 'mntre,reform2' was expected 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['purism,librem5r2', 'purism,librem5r3', 'purism,librem5r4'] 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['tq,imx8mq-tqma8mq-mba8mx'] 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['zii,imx8mq-ultra-rmb3', 'zii,imx8mq-ultra-zest'] 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['fsl,imx8qm-mek', 'fsl,imx8qm-mek-revd'] 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['toradex,apalis-imx8-eval', 'toradex,apalis-imx8-eval-v1.2', 'toradex,apalis-imx8-ixora-v1.1'] 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['toradex,apalis-imx8-v1.1-eval', 'toradex,apalis-imx8-v1.1-eval-v1.2', 'toradex,apalis-imx8-v1.1-ixora-v1.1', 'toradex,apalis-imx8-v1.1-ixora-v1.2'] 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['einfochips,imx8qxp-ai_ml', 'fsl,imx8qxp-mek', 'fsl,imx8qxp-mek-wcpu'] 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['fsl,imx8dxl-evk'] 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['toradex,colibri-imx8x-aster', 'toradex,colibri-imx8x-eval-v3', 'toradex,colibri-imx8x-iris', 'toradex,colibri-imx8x-iris-v2'] 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['fsl,imx8ulp-evk'] 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['fsl,imx93-9x9-qsb', 'fsl,imx93-11x11-evk', 'fsl,imx93-14x14-evk'] 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['fsl,imx943-evk'] 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['fsl,imx95-15x15-evk', 'fsl,imx95-19x19-evk'] 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['fsl,imxrt1050-evk'] 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['fsl,imxrt1170-evk'] 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['tq,imx93-tqma9352-mba91xxca', 'tq,imx93-tqma9352-mba93xxca', 'tq,imx93-tqma9352-mba93xxla'] 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['phytec,imx93-phyboard-nash', 'phytec,imx93-phyboard-segin'] 'variscite,var-som-mx93-symphony' was expected 'kontron,imx93-bl-osm-s' was expected 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['tq,imx95-tqma9596sa-mb-smarc-2'] 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['fsl,vf500', 'fsl,vf510', 'fsl,vf600', 'fsl,vf610', 'fsl,vf610m4'] 'toradex,vf500-colibri_vf50-on-eval' was expected 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['fsl,vf610-twr', 'lwn,bk4', 'phytec,vf610-cosmic'] 'toradex,vf610-colibri_vf61-on-eval' was expected 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['zii,vf610cfu1', 'zii,vf610dev-c', 'zii,vf610dev-b', 'zii,vf610scu4-aib', 'zii,vf610dtu', 'zii,vf610spu3', 'zii,vf610spb4'] 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['ebs-systart,oxalis', 'fsl,ls1012a-rdb', 'fsl,ls1012a-frdm', 'fsl,ls1012a-frwy', 'fsl,ls1012a-qds'] 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['fsl,ls1021a-iot', 'fsl,ls1021a-moxa-uc-8410a', 'fsl,ls1021a-qds', 'fsl,ls1021a-tsn', 'fsl,ls1021a-twr'] 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['tq,ls1021a-tqmls1021a-mbls102xa'] 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['fsl,ls1028a-qds', 'fsl,ls1028a-rdb'] 'kontron,kbox-a-230-ls' was expected 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['kontron,sl28-var1-ads2', 'kontron,sl28-var2-ads2', 'kontron,sl28-var3-ads2', 'kontron,sl28-var4-ads2'] 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['kontron,sl28-var1', 'kontron,sl28-var2', 'kontron,sl28-var3', 'kontron,sl28-var4'] 'kontron,sl28' was expected 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['fsl,ls1043a-rdb', 'fsl,ls1043a-qds'] 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['tq,ls1043a-tqmls1043a-mbls10xxa'] 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['fsl,ls1046a-frwy', 'fsl,ls1046a-qds', 'fsl,ls1046a-rdb'] 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['tq,ls1046a-tqmls1046a-mbls10xxa'] 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['fsl,ls1088a-qds', 'fsl,ls1088a-rdb'] 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['tq,ls1088a-tqmls1088a-mbls10xxa'] 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['fsl,ls2080a-simu', 'fsl,ls2080a-qds', 'fsl,ls2080a-rdb'] 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['fsl,ls2081a-rdb'] 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['fsl,ls2088a-qds', 'fsl,ls2088a-rdb'] 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['fsl,lx2160a-bluebox3', 'fsl,lx2160a-bluebox3-rev-a', 'fsl,lx2160a-qds', 'fsl,lx2160a-rdb', 'fsl,lx2162a-qds'] 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['solidrun,clearfog-cx', 'solidrun,honeycomb'] 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['solidrun,lx2162a-clearfog'] 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['tq,lx2160a-tqmlx2160a-mblx2160a'] 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['nxp,s32g274a-evb', 'nxp,s32g274a-rdb2'] 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['nxp,s32g399a-rdb3'] 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['fsl,s32v234-evb'] 'ultratronik,imx8mp-ultra-mach-sbc' is not one of ['traverse,ten64'] 'fsl,imx1' was expected 'fsl,imx23' was expected 'fsl,imx25' was expected 'eukrea,cpuimx25' was expected 'eukrea,mbimxsd25-baseboard' was expected 'fsl,imx27' was expected 'armadeus,imx27-apf27' was expected 'eukrea,cpuimx27' was expected 'phytec,imx27-pca100' was expected 'phytec,imx27-pcm038' was expected 'fsl,imx28' was expected 'denx,m28' was expected 'denx,m28evk' was expected 'armadeus,imx28-apf28' was expected 'crystalfontz,cfa10036' was expected 'crystalfontz,cfa10037' was expected 'i2se,duckbill-2' was expected 'eukrea,mbmx28lc' was expected 'fsl,imx31' was expected 'fsl,imx35' was expected 'eukrea,cpuimx35' was expected 'fsl,imx50' was expected 'fsl,imx51' was expected 'armadeus,imx51-apf51' was expected 'digi,connectcore-ccxmx51-som' was expected 'eukrea,cpuimx51' was expected 'fsl,imx53' was expected 'denx,imx53-m53evk' was expected 'tq,tqma53' was expected 'fsl,imx6q' was expected 'advantech,imx6q-ba16' was expected 'armadeus,imx6q-apf6' was expected 'compulab,cm-fx6' was expected 'dfi,fs700e-m60' was expected 'dh,imx6q-dhcom-som' was expected 'gw,ventana' was expected 'kontron,imx6q-samx6i' was expected 'phytec,imx6q-pbac06' was expected 'phytec,imx6q-pfla02' was expected 'toradex,apalis_imx6q' was expected 'variscite,var-som-imx6q' was expected 'tq,mba6a' was expected 'tq,mba6b' was expected 'fsl,imx6qp' was expected 'phytec,imx6qp-pbac06' was expected 'fsl,imx6dl' was expected 'armadeus,imx6dl-apf6' was expected 'congatec,qmx6' was expected 'dh,imx6dl-dhcom-som' was expected 'kontron,imx6dl-samx6i' was expected 'phytec,imx6dl-pbac06' was expected 'phytec,imx6dl-pfla02' was expected 'toradex,colibri_imx6dl' was expected 'dh,imx6s-dhcom-som' was expected 'fsl,imx6sl' was expected 'fsl,imx6sll' was expected 'kobo,clara2e' was expected 'fsl,imx6sx' was expected 'fsl,imx6ul' was expected 'armadeus,imx6ul-opos6ul' was expected 'digi,ccimx6ulsom' was expected 'grinn,imx6ul-litesom' was expected 'phytec,imx6ul-pbacd10' was expected 'variscite,var-som-imx6ul' was expected 'kontron,sl-imx6ul' was expected 'tq,imx6ul-tqma6ul1' was expected 'tq,imx6ul-tqma6ul2' was expected 'tq,imx6ul-tqma6ul2l' was expected 'fsl,imx6ull' was expected 'armadeus,imx6ull-opos6ul' was expected 'dh,imx6ull-dhcom-som' was expected 'dh,imx6ull-dhcor-som' was expected 'phytec,imx6ull-pbacd10' was expected 'phytec,imx6ull-phygate-tauri' was expected 'toradex,colibri-imx6ull' was expected 'toradex,colibri-imx6ull-emmc' was expected 'toradex,colibri-imx6ull-wifi' was expected 'kontron,sl-imx6ull' was expected 'tq,imx6ull-tqma6ull2' was expected 'tq,imx6ull-tqma6ull2l' was expected 'seeed,imx6ull-seeed-npi' was expected 'fsl,imx7s' was expected 'toradex,colibri-imx7s' was expected 'tq,imx7s-tqma7' was expected 'fsl,imx7d' was expected 'tq,imx7d-tqma7' was expected 'compulab,cl-som-imx7' was expected 'toradex,colibri-imx7d' was expected 'toradex,colibri-imx7d-emmc' was expected 'fsl,imx7ulp' was expected 'fsl,imx8mm' was expected 'compulab,imx8mm-ucm-som' was expected 'ees,imx8mm-emtop-som' was expected 'engicam,icore-mx8mm' was expected 'kontron,imx8mm-sl' was expected 'kontron,imx8mm-osm-s' was expected 'toradex,verdin-imx8mm-nonwifi' was expected 'toradex,verdin-imx8mm-wifi' was expected 'phytec,imx8mm-phycore-som' was expected 'variscite,var-som-mx8mm' was expected 'tq,imx8mm-tqma8mqml' was expected 'fsl,imx8mn' was expected 'variscite,var-som-mx8mn' was expected 'tq,imx8mn-tqma8mqnl' was expected 'abb,imx8mp-aristanetos3-som' was expected 'avnet,sm2s-imx8mp-14N0600E' was expected 'boundary,imx8mp-nitrogen-som' was expected 'boundary,imx8mp-nitrogen-smarc-som' was expected 'dh,imx8mp-dhcom-som' was expected 'engicam,icore-mx8mp' was expected 'kontron,imx8mp-osm-s' was expected 'kontron,imx8mp-smarc' was expected 'phytec,imx8mp-phycore-fpsc' was expected 'phytec,imx8mp-phycore-som' was expected 'polyhex,imx8mp-debix' was expected 'polyhex,imx8mp-debix-som-a' was expected 'toradex,smarc-imx8mp' was expected 'toradex,verdin-imx8mp-nonwifi' was expected 'toradex,verdin-imx8mp-wifi' was expected 'tq,imx8mp-tqma8mpql' was expected 'variscite,var-som-mx8mp' was expected 'fsl,imx8mq' was expected 'boundary,imx8mq-nitrogen8m-som' was expected 'purism,librem5' was expected 'tq,imx8mq-tqma8mq' was expected 'zii,imx8mq-ultra' was expected 'fsl,imx8qm' was expected 'toradex,apalis-imx8' was expected 'toradex,apalis-imx8-v1.1' was expected 'fsl,imx8qxp' was expected 'fsl,imx8dxl' was expected 'toradex,colibri-imx8x' was expected 'fsl,imx8ulp' was expected 'fsl,imx93' was expected 'fsl,imx94' was expected 'fsl,imx95' was expected 'fsl,imxrt1050' was expected 'fsl,imxrt1170' was expected 'tq,imx93-tqma9352' was expected 'phytec,imx93-phycore-som' was expected 'variscite,var-som-mx93' was expected 'kontron,imx93-osm-s' was expected 'tq,imx95-tqma9596sa' was expected 'toradex,vf500-colibri_vf50' was expected 'fsl,vf610' was expected 'toradex,vf610-colibri_vf61' was expected 'zii,vf610dev' was expected 'fsl,ls1012a' was expected 'fsl,ls1021a' was expected 'tq,ls1021a-tqmls1021a' was expected 'fsl,ls1028a' was expected 'kontron,sl28-var4' was expected 'fsl,imx8mp' is not one of ['kontron,sl28-var1', 'kontron,sl28-var2', 'kontron,sl28-var3', 'kontron,sl28-var4'] 'fsl,ls1043a' was expected 'tq,ls1043a-tqmls1043a' was expected 'fsl,ls1046a' was expected 'tq,ls1046a-tqmls1046a' was expected 'fsl,ls1088a' was expected 'tq,ls1088a-tqmls1088a' was expected 'fsl,ls2080a' was expected 'fsl,ls2081a' was expected 'fsl,ls2088a' was expected 'fsl,lx2160a' was expected 'solidrun,lx2160a-cex7' was expected 'solidrun,lx2162a-som' was expected 'tq,lx2160a-tqmlx2160a' was expected 'nxp,s32g2' was expected 'nxp,s32g3' was expected 'fsl,s32v234' was expected from schema $id: http://devicetree.org/schemas/arm/fsl.yaml# ^ permalink raw reply [flat|nested] 12+ messages in thread
end of thread, other threads:[~2025-06-20 9:58 UTC | newest] Thread overview: 12+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2025-06-11 11:30 [PATCH v2 0/3] arm64: dts: Add support for Ultratronik i.MX8MP Ultra-MACH SBC Goran Rađenović 2025-06-11 11:30 ` [PATCH v2 1/3] MAINTAINERS: Add i.MX8MP Ultra-MACH SBC to ULTRATRONIK BOARD SUPPORT Goran Rađenović 2025-06-11 11:30 ` [PATCH v2 2/3] dt-bindings: arm: imx8mp: Add Ultratronik Ultra-MACH SBC Goran Rađenović 2025-06-12 0:07 ` Rob Herring (Arm) 2025-06-12 7:09 ` Krzysztof Kozlowski 2025-06-12 10:09 ` Goran Radenovic 2025-06-12 11:01 ` Krzysztof Kozlowski 2025-06-20 8:53 ` Goran Radenovic 2025-06-11 11:30 ` [PATCH v2 3/3] arm64: dts: imx8mp: Add initial support for Ultratronik imx8mp-ultra-mach-sbc board Goran Rađenović 2025-06-11 15:34 ` Frank Li 2025-06-20 9:58 ` Goran Radenovic 2025-06-11 13:11 ` [PATCH v2 0/3] arm64: dts: Add support for Ultratronik i.MX8MP Ultra-MACH SBC Rob Herring (Arm)
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