From: Madadi Vineeth Reddy <vineethr@linux.ibm.com>
To: "Chen, Yu C" <yu.c.chen@intel.com>
Cc: Tim Chen <tim.c.chen@linux.intel.com>,
Peter Zijlstra <peterz@infradead.org>,
Ingo Molnar <mingo@redhat.com>,
K Prateek Nayak <kprateek.nayak@amd.com>,
"Gautham R . Shenoy" <gautham.shenoy@amd.com>,
Vincent Guittot <vincent.guittot@linaro.org>,
Juri Lelli <juri.lelli@redhat.com>,
Dietmar Eggemann <dietmar.eggemann@arm.com>,
Steven Rostedt <rostedt@goodmis.org>,
Ben Segall <bsegall@google.com>, Mel Gorman <mgorman@suse.de>,
Valentin Schneider <vschneid@redhat.com>,
Hillf Danton <hdanton@sina.com>,
Shrikanth Hegde <sshegde@linux.ibm.com>,
Jianyong Wu <jianyong.wu@outlook.com>,
Yangyu Chen <cyy@cyyself.name>,
Tingyin Duan <tingyin.duan@gmail.com>,
Vern Hao <vernhao@tencent.com>, Len Brown <len.brown@intel.com>,
Aubrey Li <aubrey.li@intel.com>, Zhao Liu <zhao1.liu@intel.com>,
Chen Yu <yu.chen.surf@gmail.com>,
Libo Chen <libo.chen@oracle.com>,
Adam Li <adamli@os.amperecomputing.com>,
Tim Chen <tim.c.chen@intel.com>,
linux-kernel@vger.kernel.org, haoxing990@gmail.com,
Madadi Vineeth Reddy <vineethr@linux.ibm.com>
Subject: Re: [PATCH 00/19] Cache Aware Scheduling
Date: Wed, 15 Oct 2025 23:56:41 +0530 [thread overview]
Message-ID: <218a4324-c28c-4068-8526-3f27a55a2e70@linux.ibm.com> (raw)
In-Reply-To: <a08e9fe6-c3be-4818-bff0-7ed350b3438a@intel.com>
On 15/10/25 11:08, Chen, Yu C wrote:
> On 10/15/2025 5:48 AM, Tim Chen wrote:
>> On Tue, 2025-10-14 at 17:43 +0530, Madadi Vineeth Reddy wrote:
>>> Hi Tim,
>>> Thanks for the patch.
>>>
>>> On 11/10/25 23:54, Tim Chen wrote:
>
> [snip]
>
>>>> [Genoa details]
>>>> [ChaCha20-xiangshan]
>>>> ChaCha20-xiangshan is a simple benchmark using a static build of an
>>>> 8-thread Verilator of XiangShan(RISC-V). The README file can be
>>>> found here[2]. The score depends on how aggressive the user set the
>>>> /sys/kernel/debug/sched/llc_aggr_tolerance. Using the default values,
>>>> there is no much difference observed. While setting the
>>>> /sys/kernel/debug/sched/llc_aggr_tolerance to 100, 44% improvment is
>>>> observed.
>>>>
>>>> baseline:
>>>> Host time spent: 50,868ms
>>>>
>>>> sched_cache:
>>>> Host time spent: 28,349ms
>>>>
>>>> The time has been reduced by 44%.
>>>
>>> Milan showed no improvement across all benchmarks, which could be due to the
>>> CCX topology (8 CCXs × 8 CPUs) where the LLC domain is too small for this
>>> optimization to be effective. Moreover there could be overhead due to additional
>>> computations.
>>>
>>> ChaCha20-xiangshan improvement in Genoa when llc_aggr_tolerance is set to 100 seems
>>> due to having relatively lesser thread count. Please provide the numbers
>>> with default values too. Would like to know numbers on varying loads.
>>
>> I'll ask Chen Yu who did the Xiangshan experiments if he has those numbers.
>>
>
> Madadi, do you mean the performance score number or active thread number
> when llc_aggr_tolerance is set to 1(default)?
> The score is around with sched_cache and llc_aggr_tolerance set to 1.
> The active number is 128 per process, and there are 8 processes when
> launching the benchmark. I suppose the 128 comes from the number
> of online CPUs. Please let me know if you need more data.
>
> Cced Yangyu who's the author of this benchmark.
I mean the benchmark result with default value of llc_aggr_tolerance on Genoa
in comparison to baseline. Knowing number of threads also helps to understand
the impact.
>
> ls -l /proc/14460/task/ | grep -c '^d'
> 128
>
>>>
>>> In Power 10 and Power 11, the LLC size is 4 threads which is even smaller. Not
>>> expecting improvements here but will run some workloads and share the data.
>>>
>>> Not gone through the entire series yet but are the situations like say in two
>>> NUMA system, if a task's preferred LLC is on the wrong NUMA node for its memory,
>>> which takes precedence?
>>
>> We take preferred NUMA node in the consideration but we do not force task to
>> go to the preferred node.
>>
>> I remembered initially we limited the consideration to only LLCs in the
>> preferred node. But we encountered regressions in hackbench and schbench,
>> because when the preferred node don't have any occupancy resulting in preferred LLC
>> to be set to -1 (no preference), and resulted in extra task migrations.
>> And also the preferred node for hackbench and schbench was volatile
>> as they have small memory footprint. Chen Yu, please chime in if there
>> were other reasons you remembered.
>>
>
> Since the preferred NUMA node is per task, while the preferred LLC
> is per process, scanning only the current task's preferred node
> would lead to cross-node migration. This is because the process's
> preferred LLC may not reside within the current task's preferred
> node. Such a scenario could leave curr_m_a_occ at 0, and any LLC
> with an occupancy > 0 would then trigger a preferred LLC switch.
Understood. Thanks for the context.
>
>> We'll need to revisit this part of the code to take care of such
>> corner case. I think ideally we should move tasks to the least loaded LLC
>> in the preferred node (even if no LLCs have occupancy in the preferred node),
>> as long as preferred NUMA node don't changes too often.
>>
>>
>
> Then we might need to introduce a new member in mm_struct to store the old
> occupancy, curr_m_a_occ, so that we can reliably compare the old and new
> occupancy - to avoid the 0 value of curr_m_a_occ.
>
>>>
>>> Also, what about the workloads that don't share data like stress-ng?
>>>
>
> The stream is single process stressing the memory without any share
> data, we did not observe any difference on stream. We can launch more
> tests on stress-ng.
>
That would be helpful.
Thanks,
Madadi Vineeth Reddy
> thanks,
> Chenyu>
>> We can test those. Ideally the controls to prevent over aggregation to preferred LLC
>> would keep stress-ng happy.
>>
>>> It will
>>> be good to make sure that most other workloads don't suffer. As mentioned,
>>> per process knob for llc_aggr_tolerance could help.
>>
>> Agree. We are planning to add per process knob for the next version. One thought is to use
>> prctl. Any other suggestions are welcome.
>>
>
next prev parent reply other threads:[~2025-10-15 18:27 UTC|newest]
Thread overview: 116+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-10-11 18:24 Tim Chen
2025-10-11 18:24 ` [PATCH 01/19] sched/fair: Add infrastructure for cache-aware load balancing Tim Chen
2025-10-14 19:12 ` Madadi Vineeth Reddy
2025-10-15 4:54 ` Chen, Yu C
2025-10-15 19:32 ` Tim Chen
2025-10-16 3:11 ` Chen, Yu C
2025-10-15 11:54 ` Peter Zijlstra
2025-10-15 16:07 ` Chen, Yu C
2025-10-23 7:26 ` kernel test robot
2025-10-27 4:47 ` K Prateek Nayak
2025-10-27 13:35 ` Chen, Yu C
2025-10-11 18:24 ` [PATCH 02/19] sched/fair: Record per-LLC utilization to guide cache-aware scheduling decisions Tim Chen
2025-10-15 10:15 ` Peter Zijlstra
2025-10-15 16:27 ` Chen, Yu C
2025-10-27 5:01 ` K Prateek Nayak
2025-10-27 14:07 ` Chen, Yu C
2025-10-28 2:50 ` K Prateek Nayak
2025-10-11 18:24 ` [PATCH 03/19] sched/fair: Introduce helper functions to enforce LLC migration policy Tim Chen
2025-10-11 18:24 ` [PATCH 04/19] sched/fair: Introduce a static key to enable cache aware only for multi LLCs Tim Chen
2025-10-15 11:04 ` Peter Zijlstra
2025-10-15 16:25 ` Chen, Yu C
2025-10-15 16:36 ` Shrikanth Hegde
2025-10-15 17:01 ` Chen, Yu C
2025-10-16 7:42 ` Peter Zijlstra
2025-10-17 2:08 ` Chen, Yu C
2025-10-16 7:40 ` Peter Zijlstra
2025-10-27 5:42 ` K Prateek Nayak
2025-10-27 12:56 ` Chen, Yu C
2025-10-27 23:36 ` Tim Chen
2025-10-29 12:36 ` Chen, Yu C
2025-10-28 2:46 ` K Prateek Nayak
2025-10-11 18:24 ` [PATCH 05/19] sched/fair: Add LLC index mapping for CPUs Tim Chen
2025-10-15 11:08 ` Peter Zijlstra
2025-10-15 11:58 ` Peter Zijlstra
2025-10-15 20:12 ` Tim Chen
2025-10-11 18:24 ` [PATCH 06/19] sched/fair: Assign preferred LLC ID to processes Tim Chen
2025-10-14 5:16 ` Chen, Yu C
2025-10-15 11:15 ` Peter Zijlstra
2025-10-16 3:13 ` Chen, Yu C
2025-10-17 4:50 ` Chen, Yu C
2025-10-20 9:41 ` Vern Hao
2025-10-11 18:24 ` [PATCH 07/19] sched/fair: Track LLC-preferred tasks per runqueue Tim Chen
2025-10-15 12:05 ` Peter Zijlstra
2025-10-15 20:03 ` Tim Chen
2025-10-16 7:44 ` Peter Zijlstra
2025-10-16 20:06 ` Tim Chen
2025-10-27 6:04 ` K Prateek Nayak
2025-10-28 15:15 ` Chen, Yu C
2025-10-28 15:46 ` Tim Chen
2025-10-29 4:32 ` K Prateek Nayak
2025-10-29 12:48 ` Chen, Yu C
2025-10-29 4:00 ` K Prateek Nayak
2025-10-28 17:06 ` Tim Chen
2025-10-11 18:24 ` [PATCH 08/19] sched/fair: Introduce per runqueue task LLC preference counter Tim Chen
2025-10-15 12:21 ` Peter Zijlstra
2025-10-15 20:41 ` Tim Chen
2025-10-16 7:49 ` Peter Zijlstra
2025-10-21 8:28 ` Madadi Vineeth Reddy
2025-10-23 6:07 ` Chen, Yu C
2025-10-11 18:24 ` [PATCH 09/19] sched/fair: Count tasks prefering each LLC in a sched group Tim Chen
2025-10-15 12:22 ` Peter Zijlstra
2025-10-15 20:42 ` Tim Chen
2025-10-15 12:25 ` Peter Zijlstra
2025-10-15 20:43 ` Tim Chen
2025-10-27 8:33 ` K Prateek Nayak
2025-10-27 23:19 ` Tim Chen
2025-10-11 18:24 ` [PATCH 10/19] sched/fair: Prioritize tasks preferring destination LLC during balancing Tim Chen
2025-10-15 7:23 ` kernel test robot
2025-10-15 15:08 ` Peter Zijlstra
2025-10-15 21:28 ` Tim Chen
2025-10-15 15:10 ` Peter Zijlstra
2025-10-15 16:03 ` Chen, Yu C
2025-10-24 9:32 ` Aaron Lu
2025-10-27 2:00 ` Chen, Yu C
2025-10-29 9:51 ` Aaron Lu
2025-10-29 13:19 ` Chen, Yu C
2025-10-27 6:29 ` K Prateek Nayak
2025-10-28 12:11 ` Chen, Yu C
2025-10-11 18:24 ` [PATCH 11/19] sched/fair: Identify busiest sched_group for LLC-aware load balancing Tim Chen
2025-10-15 15:24 ` Peter Zijlstra
2025-10-15 21:18 ` Tim Chen
2025-10-11 18:24 ` [PATCH 12/19] sched/fair: Add migrate_llc_task migration type for cache-aware balancing Tim Chen
2025-10-27 9:04 ` K Prateek Nayak
2025-10-27 22:59 ` Tim Chen
2025-10-11 18:24 ` [PATCH 13/19] sched/fair: Handle moving single tasks to/from their preferred LLC Tim Chen
2025-10-11 18:24 ` [PATCH 14/19] sched/fair: Consider LLC preference when selecting tasks for load balancing Tim Chen
2025-10-11 18:24 ` [PATCH 15/19] sched/fair: Respect LLC preference in task migration and detach Tim Chen
2025-10-28 6:02 ` K Prateek Nayak
2025-10-28 11:58 ` Chen, Yu C
2025-10-28 15:30 ` Tim Chen
2025-10-29 4:15 ` K Prateek Nayak
2025-10-29 3:54 ` K Prateek Nayak
2025-10-29 14:23 ` Chen, Yu C
2025-10-29 21:09 ` Tim Chen
2025-10-30 4:19 ` K Prateek Nayak
2025-10-30 20:07 ` Tim Chen
2025-10-31 3:32 ` K Prateek Nayak
2025-10-31 15:17 ` Chen, Yu C
2025-11-03 21:41 ` Tim Chen
2025-11-03 22:07 ` Tim Chen
2025-10-11 18:24 ` [PATCH 16/19] sched/fair: Exclude processes with many threads from cache-aware scheduling Tim Chen
2025-10-23 7:22 ` kernel test robot
2025-10-11 18:24 ` [PATCH 17/19] sched/fair: Disable cache aware scheduling for processes with high thread counts Tim Chen
2025-10-22 17:21 ` Madadi Vineeth Reddy
2025-10-23 6:55 ` Chen, Yu C
2025-10-11 18:24 ` [PATCH 18/19] sched/fair: Avoid cache-aware scheduling for memory-heavy processes Tim Chen
2025-10-15 6:57 ` kernel test robot
2025-10-16 4:44 ` Chen, Yu C
2025-10-11 18:24 ` [PATCH 19/19] sched/fair: Add user control to adjust the tolerance of cache-aware scheduling Tim Chen
2025-10-29 8:07 ` Aaron Lu
2025-10-29 12:54 ` Chen, Yu C
2025-10-14 12:13 ` [PATCH 00/19] Cache Aware Scheduling Madadi Vineeth Reddy
2025-10-14 21:48 ` Tim Chen
2025-10-15 5:38 ` Chen, Yu C
2025-10-15 18:26 ` Madadi Vineeth Reddy [this message]
2025-10-16 4:57 ` Chen, Yu C
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