Re: [PATCH v2 09/23] coresight: trbe: Clear TRBSR status at stop sites

[Suzuki K Poulose <suzuki.poulose@arm.com>]

On 10/11/2026 08:48, Leo Yan wrote:
> On Mon, Nov 09, 2026 at 10:51:30PM +0000, Suzuki K Poulose wrote:
>> On 16/10/2026 17:55, Leo Yan wrote:
>>> TRBSR_EL1 records the status of the buffer that just stopped. Clearing
>>> it in trbe_enable_hw() postpones cleanup until another run starts. If
>>> AUX output cannot restart, for example when AUX space is exhausted,
>>> that clear never executes. Clear the status in arm_trbe_disable()
>>> after disabling TRBE instead.
>>>
>>> trbe_handle_overflow() can start the next run without calling
>>> arm_trbe_disable(). Clear the stopped buffer's syndrome and status bits
>>> while TRBE is disabled, before attempting the AUX restart. This also
>>> leaves the status clean when the restart fails.
>>>
>>> Signed-off-by: Leo Yan <leo.yan@arm.com>
>>> ---
>>>    drivers/hwtracing/coresight/coresight-trbe.c | 10 +++++++++-
>>>    1 file changed, 9 insertions(+), 1 deletion(-)
>>>
>>> diff --git a/drivers/hwtracing/coresight/coresight-trbe.c b/drivers/hwtracing/coresight/coresight-trbe.c
>>> index 26e7554d6bdd31f8a55a8bc3a7b6d4c49b984b9b..dd9c9330bb0c739795f300dafc6ce34e72fbf280 100644
>>> --- a/drivers/hwtracing/coresight/coresight-trbe.c
>>> +++ b/drivers/hwtracing/coresight/coresight-trbe.c
>>> @@ -655,7 +655,6 @@ static void trbe_enable_hw(struct trbe_buf *buf)
>>>    	WARN_ON(buf->trbe_hw_base < buf->trbe_base);
>>>    	WARN_ON(buf->trbe_write < buf->trbe_hw_base);
>>>    	WARN_ON(buf->trbe_write >= buf->trbe_limit);
>>> -	clr_trbe_status();
>>
>> TRBSR_ELx is UNKNOWN at reset and if we don't clear it at probe time, we
>> endup running the first session with unknown values. It is safer to
>> clear this at enable_hw.
> 
> This is incorrect. trbe_reset_local() is called locally on each CPU to
> clear TRBSR_ELx, it has been guaranteed when the first session starts.
> 

Ah, you're right. Ignore the noise

Cheers
Suzuki

> Thanks,
> Leo