From: Anisa Su <anisa.su887@gmail.com>
To: Dave Jiang <dave.jiang@intel.com>
Cc: Anisa Su <anisa.su887@gmail.com>,
linux-cxl@vger.kernel.org, linux-kernel@vger.kernel.org,
nvdimm@lists.linux.dev, Dan Williams <djbw@kernel.org>,
Jonathan Cameron <jic23@kernel.org>,
Davidlohr Bueso <dave@stgolabs.net>,
Vishal Verma <vishal.l.verma@intel.com>,
Ira Weiny <iweiny@kernel.org>,
Alison Schofield <alison.schofield@intel.com>,
John Groves <John@groves.net>, Gregory Price <gourry@gourry.net>,
Ira Weiny <ira.weiny@intel.com>
Subject: Re: [PATCH v10 01/31] cxl/mbox: Flag support for Dynamic Capacity Devices (DCD)
Date: Fri, 29 May 2026 23:22:44 -0700 [thread overview]
Message-ID: <ahqCNFqlOQQPXa_V@AnisaLaptop.localdomain> (raw)
In-Reply-To: <dfab67e3-6592-4bb1-bd5b-7a548f6b084f@intel.com>
On Wed, May 27, 2026 at 02:34:31PM -0700, Dave Jiang wrote:
>
>
> On 5/23/26 2:42 AM, Anisa Su wrote:
> > From: Ira Weiny <ira.weiny@intel.com>
> >
> > Per the CXL 3.1 specification software must check the Command Effects
>
> May as well update to CXL r4.0
>
Updated!
> > Log (CEL) for dynamic capacity command support.
> >
> > Detect support for the DCD commands while reading the CEL, including:
> >
> > Get DC Config
> > Get DC Extent List
> > Add DC Response
> > Release DC
> >
> > Based on an original patch by Navneet Singh.
> >
> > Signed-off-by: Ira Weiny <ira.weiny@intel.com>
>
> missing Anisa sign off
>
Added!
> >
> > ---
> > Changes:
> > [anisa: rebase]
> > ---
> > drivers/cxl/core/mbox.c | 43 +++++++++++++++++++++++++++++++++++++++++
> > drivers/cxl/cxlmem.h | 15 ++++++++++++++
> > 2 files changed, 58 insertions(+)
> >
> > diff --git a/drivers/cxl/core/mbox.c b/drivers/cxl/core/mbox.c
> > index aaa5c6277ebf..7ef5708bf210 100644
> > --- a/drivers/cxl/core/mbox.c
> > +++ b/drivers/cxl/core/mbox.c
> > @@ -165,6 +165,42 @@ static void cxl_set_security_cmd_enabled(struct cxl_security_state *security,
> > }
> > }
> >
> > +static bool cxl_is_dcd_command(u16 opcode)
> > +{
> > +#define CXL_MBOX_OP_DCD_CMDS 0x48
> > +
> > + return (opcode >> 8) == CXL_MBOX_OP_DCD_CMDS;
> > +}
> > +
> > +static void cxl_set_dcd_cmd_enabled(struct cxl_memdev_state *mds, u16 opcode,
> > + unsigned long *cmd_mask)
>
> mds not used, consider drop
>
dropped
> > +{
> > + switch (opcode) {
> > + case CXL_MBOX_OP_GET_DC_CONFIG:
> > + set_bit(CXL_DCD_ENABLED_GET_CONFIG, cmd_mask);
> > + break;
> > + case CXL_MBOX_OP_GET_DC_EXTENT_LIST:
> > + set_bit(CXL_DCD_ENABLED_GET_EXTENT_LIST, cmd_mask);
> > + break;
> > + case CXL_MBOX_OP_ADD_DC_RESPONSE:
> > + set_bit(CXL_DCD_ENABLED_ADD_RESPONSE, cmd_mask);
> > + break;
> > + case CXL_MBOX_OP_RELEASE_DC:
> > + set_bit(CXL_DCD_ENABLED_RELEASE, cmd_mask);
> > + break;
> > + default:
> > + break;
> > + }
> > +}
> > +
> > +static bool cxl_verify_dcd_cmds(struct cxl_memdev_state *mds, unsigned long *cmds_seen)
>
> mds not used. consider drop
>
also dropped
> > +{
> > + DECLARE_BITMAP(all_cmds, CXL_DCD_ENABLED_MAX);
> > +
> > + bitmap_fill(all_cmds, CXL_DCD_ENABLED_MAX);
> > + return bitmap_equal(cmds_seen, all_cmds, CXL_DCD_ENABLED_MAX);
>
> Above lines can be replaced with:
> return bitmap_full(cmds_seen, CXL_DCD_ENABLED_MAX);
>
replaced
> > +}
> > +
> > static bool cxl_is_poison_command(u16 opcode)
> > {
> > #define CXL_MBOX_OP_POISON_CMDS 0x43
> > @@ -757,6 +793,7 @@ static void cxl_walk_cel(struct cxl_memdev_state *mds, size_t size, u8 *cel)
> > struct cxl_mailbox *cxl_mbox = &mds->cxlds.cxl_mbox;
> > struct cxl_cel_entry *cel_entry;
> > const int cel_entries = size / sizeof(*cel_entry);
> > + DECLARE_BITMAP(dcd_cmds, CXL_DCD_ENABLED_MAX);
>
> Need to zero out the declared bitmap 'dcd_cmds' on stack before using.
>
> DECLARE_BITMAP(dcd_cmds, CXL_DCD_ENABLED_MAX) = {};
>
done :)
> > struct device *dev = mds->cxlds.dev;
> > int i, ro_cmds = 0, wr_cmds = 0;
> >
> > @@ -785,11 +822,17 @@ static void cxl_walk_cel(struct cxl_memdev_state *mds, size_t size, u8 *cel)
> > enabled++;
> > }
> >
> > + if (cxl_is_dcd_command(opcode)) {
> > + cxl_set_dcd_cmd_enabled(mds, opcode, dcd_cmds);
> > + enabled++;
> > + }
> > +
> > dev_dbg(dev, "Opcode 0x%04x %s\n", opcode,
> > enabled ? "enabled" : "unsupported by driver");
> > }
> >
> > set_features_cap(cxl_mbox, ro_cmds, wr_cmds);
> > + mds->dcd_supported = cxl_verify_dcd_cmds(mds, dcd_cmds);
> > }
> >
> > static struct cxl_mbox_get_supported_logs *cxl_get_gsl(struct cxl_memdev_state *mds)
> > diff --git a/drivers/cxl/cxlmem.h b/drivers/cxl/cxlmem.h
> > index 776c50d1db51..53444af448d7 100644
> > --- a/drivers/cxl/cxlmem.h
> > +++ b/drivers/cxl/cxlmem.h
> > @@ -230,6 +230,15 @@ struct cxl_event_state {
> > struct mutex log_lock;
> > };
> >
> > +/* Device enabled DCD commands */
> > +enum dcd_cmd_enabled_bits {
> > + CXL_DCD_ENABLED_GET_CONFIG,
> > + CXL_DCD_ENABLED_GET_EXTENT_LIST,
> > + CXL_DCD_ENABLED_ADD_RESPONSE,
> > + CXL_DCD_ENABLED_RELEASE,
> > + CXL_DCD_ENABLED_MAX
> > +};
> > +
>
> would be nice to have comment point to where in the spec this is
>
Added
> DJ
>
Thanks!
Anisa
> > /* Device enabled poison commands */
> > enum poison_cmd_enabled_bits {
> > CXL_POISON_ENABLED_LIST,
> > @@ -405,6 +414,7 @@ static inline struct cxl_dev_state *mbox_to_cxlds(struct cxl_mailbox *cxl_mbox)
> > * @partition_align_bytes: alignment size for partition-able capacity
> > * @active_volatile_bytes: sum of hard + soft volatile
> > * @active_persistent_bytes: sum of hard + soft persistent
> > + * @dcd_supported: all DCD commands are supported
> > * @event: event log driver state
> > * @poison: poison driver state info
> > * @security: security driver state info
> > @@ -424,6 +434,7 @@ struct cxl_memdev_state {
> > u64 partition_align_bytes;
> > u64 active_volatile_bytes;
> > u64 active_persistent_bytes;
> > + bool dcd_supported;
> >
> > struct cxl_event_state event;
> > struct cxl_poison_state poison;
> > @@ -485,6 +496,10 @@ enum cxl_opcode {
> > CXL_MBOX_OP_UNLOCK = 0x4503,
> > CXL_MBOX_OP_FREEZE_SECURITY = 0x4504,
> > CXL_MBOX_OP_PASSPHRASE_SECURE_ERASE = 0x4505,
> > + CXL_MBOX_OP_GET_DC_CONFIG = 0x4800,
> > + CXL_MBOX_OP_GET_DC_EXTENT_LIST = 0x4801,
> > + CXL_MBOX_OP_ADD_DC_RESPONSE = 0x4802,
> > + CXL_MBOX_OP_RELEASE_DC = 0x4803,
> > CXL_MBOX_OP_MAX = 0x10000
> > };
> >
>
next prev parent reply other threads:[~2026-05-30 6:22 UTC|newest]
Thread overview: 95+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-23 9:42 [PATCH v10 00/31] DCD: Add " Anisa Su
2026-05-23 9:42 ` [PATCH v10 01/31] cxl/mbox: Flag " Anisa Su
2026-05-27 21:34 ` Dave Jiang
2026-05-30 6:22 ` Anisa Su [this message]
2026-05-23 9:42 ` [PATCH v10 02/31] cxl/mem: Read dynamic capacity configuration from the device Anisa Su
2026-05-27 22:28 ` Dave Jiang
2026-05-30 6:40 ` Anisa Su
2026-06-01 15:23 ` Dave Jiang
2026-06-02 9:46 ` Anisa Su
2026-05-23 9:42 ` [PATCH v10 03/31] cxl/cdat: Gather DSMAS data for DCD partitions Anisa Su
2026-05-27 23:16 ` Dave Jiang
2026-05-30 6:45 ` Anisa Su
2026-05-23 9:42 ` [PATCH v10 04/31] cxl/core: Enforce partition order/simplify partition calls Anisa Su
2026-05-27 23:37 ` Dave Jiang
2026-05-30 6:57 ` Anisa Su
2026-05-23 9:42 ` [PATCH v10 05/31] cxl/mem: Expose dynamic ram A partition in sysfs Anisa Su
2026-05-27 23:54 ` Dave Jiang
2026-05-27 23:56 ` Dave Jiang
2026-05-30 7:04 ` Anisa Su
2026-05-23 9:43 ` [PATCH v10 06/31] cxl/port: Add 'dynamic_ram_a' to endpoint decoder mode Anisa Su
2026-05-28 0:01 ` Dave Jiang
2026-05-30 7:07 ` Anisa Su
2026-05-23 9:43 ` [PATCH v10 07/31] cxl/region: Add DC DAX region support Anisa Su
2026-05-28 0:16 ` Dave Jiang
2026-06-02 9:22 ` Anisa Su
2026-06-02 15:42 ` Dave Jiang
2026-06-18 20:21 ` Alison Schofield
2026-05-23 9:43 ` [PATCH v10 08/31] cxl/events: Split event msgnum configuration from irq setup Anisa Su
2026-05-23 9:43 ` [PATCH v10 09/31] cxl/pci: Factor out interrupt policy check Anisa Su
2026-05-23 9:43 ` [PATCH v10 10/31] cxl/mem: Configure dynamic capacity interrupts Anisa Su
2026-05-28 16:21 ` Dave Jiang
2026-06-08 8:16 ` Anisa Su
2026-06-10 16:57 ` Dave Jiang
2026-06-11 18:19 ` Anisa Su
2026-05-23 9:43 ` [PATCH v10 11/31] cxl/core: Return endpoint decoder information from region search Anisa Su
2026-05-23 9:43 ` [PATCH v10 12/31] cxl/mem: Set up framework for handling DC Events Anisa Su
2026-05-28 16:40 ` Dave Jiang
2026-06-09 17:34 ` Anisa Su
2026-05-23 9:43 ` [PATCH v10 13/31] cxl/mem: Add 20 second timeout for stalled DC_ADD_CAPACITY chains Anisa Su
2026-05-28 16:57 ` Dave Jiang
2026-06-09 17:36 ` Anisa Su
2026-05-23 9:43 ` [PATCH v10 14/31] cxl/extent: Handle DC Add Capacity events Anisa Su
2026-05-28 19:06 ` Dave Jiang
2026-06-10 3:48 ` Anisa Su
2026-06-24 9:16 ` Anisa Su
2026-05-23 9:43 ` [PATCH v10 15/31] cxl/mem: Drop misaligned DCD extent groups Anisa Su
2026-05-28 21:03 ` Dave Jiang
2026-06-11 6:22 ` Anisa Su
2026-05-23 9:43 ` [PATCH v10 16/31] cxl/extent: Validate DC extent partition Anisa Su
2026-05-28 21:34 ` Dave Jiang
2026-06-11 7:35 ` Anisa Su
2026-06-24 9:04 ` Anisa Su
2026-05-23 9:43 ` [PATCH v10 17/31] cxl/mem: Enforce tag-group semantics Anisa Su
2026-05-23 9:43 ` [PATCH v10 18/31] cxl/extent: Handle DC Release Capacity events Anisa Su
2026-05-28 22:13 ` Dave Jiang
2026-06-12 5:56 ` Anisa Su
2026-05-23 9:43 ` [PATCH v10 19/31] cxl/extent: Enforce cross-region tag uniqueness Anisa Su
2026-05-28 22:44 ` Dave Jiang
2026-05-23 9:43 ` [PATCH v10 20/31] cxl/region/extent: Expose dc_extent information in sysfs Anisa Su
2026-05-28 22:54 ` Dave Jiang
2026-06-12 5:58 ` Anisa Su
2026-05-23 9:43 ` [PATCH v10 21/31] cxl + dax: Surface dax_resources on DCD Add Capacity events Anisa Su
2026-05-28 23:41 ` Dave Jiang
2026-06-16 8:44 ` Anisa Su
2026-05-23 9:43 ` [PATCH v10 22/31] cxl + dax: Release dax_resources on DCD Release " Anisa Su
2026-05-28 23:53 ` Dave Jiang
2026-06-16 8:52 ` Anisa Su
2026-05-23 9:43 ` [PATCH v10 23/31] dax/bus: Factor out dev dax resize logic Anisa Su
2026-06-24 8:36 ` Anisa Su
2026-05-23 9:43 ` [PATCH v10 24/31] dax/bus: Add uuid sysfs attribute to dax devices Anisa Su
2026-05-29 17:07 ` Dave Jiang
2026-05-23 9:43 ` [PATCH v10 25/31] dax/bus: Reject resize on DC dax devices and enforce 0-size creation Anisa Su
2026-05-29 17:16 ` Dave Jiang
2026-06-16 8:54 ` Anisa Su
2026-05-23 9:43 ` [PATCH v10 26/31] dax/bus: Tag-aware uuid claim and show on DC dax devices Anisa Su
2026-05-29 17:53 ` Dave Jiang
2026-06-16 9:01 ` Anisa Su
2026-05-23 9:43 ` [PATCH v10 27/31] cxl/region: Read existing extents on region creation Anisa Su
2026-05-29 21:30 ` Dave Jiang
2026-06-16 9:39 ` Anisa Su
2026-05-23 9:43 ` [PATCH v10 28/31] cxl/mem: Trace Dynamic capacity Event Record Anisa Su
2026-05-29 22:41 ` Dave Jiang
2026-06-16 9:59 ` Anisa Su
2026-05-23 9:43 ` [PATCH v10 29/31] tools/testing/cxl: Make event logs dynamic Anisa Su
2026-05-29 22:58 ` Dave Jiang
2026-06-16 10:29 ` Anisa Su
2026-05-23 9:43 ` [PATCH v10 30/31] tools/testing/cxl: Add DC Regions to mock mem data Anisa Su
2026-05-29 23:42 ` Dave Jiang
2026-06-25 11:22 ` Anisa Su
2026-05-23 9:43 ` [PATCH v10 31/31] Documentation/cxl: Document DCD extent handling and DC-backed DAX regions Anisa Su
2026-05-27 18:51 ` [PATCH v10 00/31] DCD: Add support for Dynamic Capacity Devices (DCD) Dave Jiang
2026-05-30 0:16 ` Anisa Su
2026-06-05 5:35 ` Alison Schofield
2026-06-08 7:54 ` Anisa Su
2026-06-24 7:49 ` Anisa Su
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