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From: Tim Chen <tim.c.chen@linux.intel.com>
To: Madadi Vineeth Reddy <vineethr@linux.ibm.com>,
	"Chen, Yu C" <yu.c.chen@intel.com>
Cc: Peter Zijlstra <peterz@infradead.org>,
	Ingo Molnar <mingo@redhat.com>,
	K Prateek Nayak <kprateek.nayak@amd.com>,
	"Gautham R . Shenoy" <gautham.shenoy@amd.com>,
	Vincent Guittot	 <vincent.guittot@linaro.org>,
	Juri Lelli <juri.lelli@redhat.com>,
	Dietmar Eggemann <dietmar.eggemann@arm.com>,
	Steven Rostedt <rostedt@goodmis.org>,
	Ben Segall	 <bsegall@google.com>, Mel Gorman <mgorman@suse.de>,
	Valentin Schneider	 <vschneid@redhat.com>,
	Hillf Danton <hdanton@sina.com>,
	Shrikanth Hegde	 <sshegde@linux.ibm.com>,
	Jianyong Wu <jianyong.wu@outlook.com>,
	Yangyu Chen	 <cyy@cyyself.name>,
	Tingyin Duan <tingyin.duan@gmail.com>,
	Vern Hao	 <vernhao@tencent.com>, Vern Hao <haoxing990@gmail.com>,
	Len Brown	 <len.brown@intel.com>, Aubrey Li <aubrey.li@intel.com>,
	Zhao Liu	 <zhao1.liu@intel.com>, Chen Yu <yu.chen.surf@gmail.com>,
	Adam Li	 <adamli@os.amperecomputing.com>,
	Aaron Lu <ziqianlu@bytedance.com>,
	Tim Chen	 <tim.c.chen@intel.com>, Josh Don <joshdon@google.com>,
	Gavin Guo	 <gavinguo@igalia.com>,
	Qais Yousef <qyousef@layalina.io>,
	Libo Chen	 <libchen@purestorage.com>,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH v3 04/21] sched/cache: Make LLC id continuous
Date: Tue, 17 Feb 2026 13:20:11 -0800	[thread overview]
Message-ID: <107997571531b4fdd653f5f72b7af6969410d8e3.camel@linux.intel.com> (raw)
In-Reply-To: <796e4859-82da-422a-925f-7aac7cb86822@linux.ibm.com>

On Tue, 2026-02-17 at 15:35 +0530, Madadi Vineeth Reddy wrote:
> On 15/02/26 19:55, Chen, Yu C wrote:
> > On 2/15/2026 1:53 AM, Madadi Vineeth Reddy wrote:
> > > On 11/02/26 03:48, Tim Chen wrote:
> > > > From: Chen Yu <yu.c.chen@intel.com>
> > > > 
> > > > Introduce an index mapping between CPUs and their LLCs. This provides
> > > > a continuous per LLC index needed for cache-aware load balancing in
> > > > later patches.
> > > > 
> > > > The existing per_cpu llc_id usually points to the first CPU of the
> > > > LLC domain, which is sparse and unsuitable as an array index. Using
> > > > llc_id directly would waste memory.
> > > > 
> > > > With the new mapping, CPUs in the same LLC share a continuous id:
> > > > 
> > > >    per_cpu(llc_id, CPU=0...15)  = 0
> > > >    per_cpu(llc_id, CPU=16...31) = 1
> > > >    per_cpu(llc_id, CPU=32...47) = 2
> > > >    ...
> > > > 
> > > > Once a CPU has been assigned an llc_id, this ID persists even when
> > > > the CPU is taken offline and brought back online, which can facilitate
> > > > the management of the ID.
> > > 
> > > tl_max_llcs is never reset across multiple invocations of build_sched_domains().
> > > While this preserves LLC IDs across normal CPU hotplug events, I'm wondering about
> > > scenarios where hardware topology changes, such as physically removing/replacing
> > > CPU sockets.
> > > 
> > > Example scenario:
> > > Boot with 3 LLCs: IDs {0,1,2}, tl_max_llcs=3
> > > Physical hardware change removes LLC 1
> > > New hardware added at a different position gets ID=3
> > > After multiple such events: System has 4 LLCs but IDs {0,2,5,7}, tl_max_llcs=8
> > > 
> > 
> > I agree that keeping tl_max_llcs non-decreasing might waste some space. The
> > original motivation for introducing a dynamic sd_llc_id was mainly that a
> > static sd_llc_id[NR_LLC] is not suitable, as we cannot find a proper upper
> > limit for NR_LLC-an arbitrary value for NR_LLC is unacceptable. That is to
> > say, tl_max_llcs serves as the historical maximum LLC index that has ever
> > been detected - like other terms such as CPU id. It is possible that the
> > number of available LLCs shrinks due to CPU offline after boot-up. A value
> > of tl_max_llcs=8 indicates that this system once had 8 valid LLCs. On the
> > other hand, dense mapping is a side effect of dynamically allocating sd_llc_id.
> > 
> > > This creates gaps in the ID space. However, I understand this trade-off might be
> > > intentional since physical topology changes are rare, and resetting tl_max_llcs and
> > > all sd_llc_id values would rebuild IDs on every invocation of build_sched_domains().
> > > 
> > > Would like to know your thoughts on overhead of resetting tl_max_llcs and sd_llc_id
> > > so that IDs are rebuilt on each invocation of build_sched_domains() to always maintain
> > > a dense mapping.
> > > 
> > 
> > The current implementation is intentionally kept simple for easier review, and
> > I agree that strictly enforcing a dense mapping for sd_llc_id - by recalculating
> > the actual maximum LLC count (max_llcs) whenever the CPU topology changes - could
> > be an optimization direction once the basic version has been accepted. I assume what
> > you are suggesting is that we could reset tl_max_llcs/max_llcs/sd_llc_id for CPUs
> > in doms_new[i] within partition_sched_domains_locked() - and then rebuild these
> > values in build_sched_domains() accordingly. One risk here is a race condition when
> > modifying the llc_id of a specific CPU - but off the top of my head, valid_llc_buf()
> > should help prevent out-of-range access to sd->pf caused by such races.
> > Thoughts?
> 
> Yes, resetting and rebuilding would maintain dense mapping. Given the added complexity 
> of race conditions vs. minimal benefit (gaps only occur with physical topology changes),
> I think the current approach is better. We can revisit it once this version goes through.
> 

The current implementation keep LLC id unchanged across sched domain rebuild.
The idea was to allow pf[id] to be kept across rebuilds, and point to
the same LLC.

That said, now that we clear pf[id] across sched domain rebuild, this constraint can
be relaxed.  And it should be okay to change the LLC id from the perspective of cache
aware scheduling.

However, there could be some transient races with cpus_share_cache() while the
LLC id got changed, which the current implementation avoid.

Tim

  reply	other threads:[~2026-02-17 21:20 UTC|newest]

Thread overview: 117+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-02-10 22:18 [PATCH v3 00/21] Cache Aware Scheduling Tim Chen
2026-02-10 22:18 ` [PATCH v3 01/21] sched/cache: Introduce infrastructure for cache-aware load balancing Tim Chen
2026-02-14 12:26   ` Madadi Vineeth Reddy
2026-02-14 15:34     ` Chen, Yu C
2026-02-17 18:51       ` Tim Chen
2026-02-10 22:18 ` [PATCH v3 02/21] sched/cache: Record per LLC utilization to guide cache aware scheduling decisions Tim Chen
2026-02-10 22:18 ` [PATCH v3 03/21] sched/cache: Introduce helper functions to enforce LLC migration policy Tim Chen
2026-02-14 16:12   ` Madadi Vineeth Reddy
2026-02-15 12:14     ` Chen, Yu C
2026-02-19 11:29   ` Peter Zijlstra
2026-02-19 14:48     ` Chen, Yu C
2026-02-19 14:55       ` Peter Zijlstra
2026-02-10 22:18 ` [PATCH v3 04/21] sched/cache: Make LLC id continuous Tim Chen
2026-02-14 17:53   ` Madadi Vineeth Reddy
2026-02-15 14:25     ` Chen, Yu C
2026-02-17 10:05       ` Madadi Vineeth Reddy
2026-02-17 21:20         ` Tim Chen [this message]
2026-02-16  7:44   ` K Prateek Nayak
2026-02-17  6:07     ` Chen, Yu C
2026-02-17  8:09       ` K Prateek Nayak
2026-02-17 23:12         ` Tim Chen
2026-02-18  3:28           ` K Prateek Nayak
2026-02-18 15:22             ` Chen, Yu C
2026-02-18 17:46               ` K Prateek Nayak
2026-02-18 23:21                 ` Tim Chen
2026-02-19  6:12                   ` K Prateek Nayak
2026-02-19 15:51                     ` Peter Zijlstra
2026-02-20  0:11                     ` Tim Chen
2026-02-19 11:25                   ` Chen, Yu C
2026-02-19 16:10                     ` K Prateek Nayak
2026-02-18 18:45               ` Tim Chen
2026-02-18 21:33             ` Tim Chen
2026-02-18 15:11         ` Chen, Yu C
2026-02-19 15:48         ` Peter Zijlstra
2026-02-20 15:22           ` Chen, Yu C
2026-02-19 15:40     ` Peter Zijlstra
2026-02-20 15:53       ` Chen, Yu C
2026-02-20 16:03         ` Peter Zijlstra
2026-02-20 16:10           ` Chen, Yu C
2026-02-20 19:24             ` Tim Chen
2026-02-20 19:30               ` Peter Zijlstra
2026-02-20 19:35                 ` Tim Chen
2026-02-19 11:35   ` Peter Zijlstra
2026-02-19 18:17     ` Tim Chen
2026-02-19 14:59   ` Peter Zijlstra
2026-02-19 15:20     ` Chen, Yu C
2026-02-19 19:20       ` Tim Chen
2026-02-19 21:04         ` Tim Chen
2026-02-20 17:17           ` Chen, Yu C
2026-02-10 22:18 ` [PATCH v3 05/21] sched/cache: Assign preferred LLC ID to processes Tim Chen
2026-02-14 18:36   ` Madadi Vineeth Reddy
2026-02-16  6:58     ` Chen, Yu C
2026-02-10 22:18 ` [PATCH v3 06/21] sched/cache: Track LLC-preferred tasks per runqueue Tim Chen
2026-02-10 22:18 ` [PATCH v3 07/21] sched/cache: Introduce per CPU's tasks LLC preference counter Tim Chen
2026-02-20 10:45   ` Peter Zijlstra
2026-02-20 16:57     ` Chen, Yu C
2026-02-20 18:38       ` Peter Zijlstra
2026-02-10 22:18 ` [PATCH v3 08/21] sched/cache: Calculate the percpu sd task LLC preference Tim Chen
2026-02-20 11:02   ` Peter Zijlstra
2026-02-20 14:02     ` Peter Zijlstra
2026-02-20 17:25       ` Chen, Yu C
2026-02-10 22:18 ` [PATCH v3 09/21] sched/cache: Count tasks prefering destination LLC in a sched group Tim Chen
2026-02-20 12:52   ` Peter Zijlstra
2026-02-20 13:43     ` Peter Zijlstra
2026-02-21  2:53       ` Chen, Yu C
2026-02-10 22:18 ` [PATCH v3 10/21] sched/cache: Check local_group only once in update_sg_lb_stats() Tim Chen
2026-02-10 22:18 ` [PATCH v3 11/21] sched/cache: Prioritize tasks preferring destination LLC during balancing Tim Chen
2026-02-17 18:33   ` Madadi Vineeth Reddy
2026-02-17 21:45     ` Tim Chen
2026-02-10 22:18 ` [PATCH v3 12/21] sched/cache: Add migrate_llc_task migration type for cache-aware balancing Tim Chen
2026-02-10 22:18 ` [PATCH v3 13/21] sched/cache: Handle moving single tasks to/from their preferred LLC Tim Chen
2026-02-17 19:00   ` Madadi Vineeth Reddy
2026-02-17 22:04     ` Tim Chen
2026-02-20 13:53   ` Peter Zijlstra
2026-02-20 18:22     ` Tim Chen
2026-02-10 22:18 ` [PATCH v3 14/21] sched/cache: Respect LLC preference in task migration and detach Tim Chen
2026-02-18  9:14   ` Madadi Vineeth Reddy
2026-02-18 15:34     ` Chen, Yu C
2026-02-10 22:18 ` [PATCH v3 15/21] sched/cache: Disable cache aware scheduling for processes with high thread counts Tim Chen
2026-02-18 17:54   ` Madadi Vineeth Reddy
2026-02-18 21:44     ` Tim Chen
2026-02-19  2:28       ` Madadi Vineeth Reddy
2026-02-19 14:38         ` Chen, Yu C
2026-02-19 21:12         ` Tim Chen
2026-02-19 16:52     ` Peter Zijlstra
2026-02-20  7:02       ` Madadi Vineeth Reddy
2026-02-19 16:55     ` Peter Zijlstra
2026-02-20  6:40       ` Madadi Vineeth Reddy
2026-02-20  9:53         ` Peter Zijlstra
2026-02-24  9:42           ` Madadi Vineeth Reddy
2026-02-19 16:50   ` Peter Zijlstra
2026-02-19 21:06     ` Tim Chen
2026-02-10 22:18 ` [PATCH v3 16/21] sched/cache: Avoid cache-aware scheduling for memory-heavy processes Tim Chen
2026-02-10 22:18 ` [PATCH v3 17/21] sched/cache: Enable cache aware scheduling for multi LLCs NUMA node Tim Chen
2026-02-10 22:18 ` [PATCH v3 18/21] sched/cache: Allow the user space to turn on and off cache aware scheduling Tim Chen
2026-02-10 22:18 ` [PATCH v3 19/21] sched/cache: Add user control to adjust the aggressiveness of cache-aware scheduling Tim Chen
2026-02-20 14:29   ` Peter Zijlstra
2026-02-20 18:18     ` Tim Chen
2026-02-10 22:19 ` [PATCH v3 20/21] -- DO NOT APPLY!!! -- sched/cache/debug: Display the per LLC occupancy for each process via proc fs Tim Chen
2026-02-10 22:19 ` [PATCH v3 21/21] -- DO NOT APPLY!!! -- sched/cache/debug: Add ftrace to track the load balance statistics Tim Chen
2026-02-19 14:08 ` [PATCH v3 00/21] Cache Aware Scheduling Qais Yousef
2026-02-19 14:41   ` Peter Zijlstra
2026-02-19 15:07     ` Chen, Yu C
2026-02-19 18:11       ` Tim Chen
2026-02-20  3:29         ` Qais Yousef
2026-02-20  9:43           ` Peter Zijlstra
2026-02-24  2:49             ` Qais Yousef
2026-02-20 18:14           ` Tim Chen
2026-02-24  3:02             ` Qais Yousef
2026-02-20  3:25       ` Qais Yousef
2026-02-21  2:48         ` Chen, Yu C
2026-02-24  3:11           ` Qais Yousef
2026-02-19 19:48     ` Qais Yousef
2026-02-19 21:47       ` Tim Chen
2026-02-20  3:41         ` Qais Yousef
2026-02-20  8:45           ` Peter Zijlstra
2026-02-24  3:31             ` Qais Yousef

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