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From: Tim Chen <tim.c.chen@linux.intel.com>
To: K Prateek Nayak <kprateek.nayak@amd.com>,
	"Chen, Yu C" <yu.c.chen@intel.com>
Cc: Juri Lelli <juri.lelli@redhat.com>,
	Dietmar Eggemann	 <dietmar.eggemann@arm.com>,
	Steven Rostedt <rostedt@goodmis.org>,
	Ben Segall	 <bsegall@google.com>, Mel Gorman <mgorman@suse.de>,
	Valentin Schneider	 <vschneid@redhat.com>,
	Madadi Vineeth Reddy <vineethr@linux.ibm.com>,
	Hillf Danton <hdanton@sina.com>,
	Shrikanth Hegde <sshegde@linux.ibm.com>,
	Jianyong Wu	 <jianyong.wu@outlook.com>,
	Yangyu Chen <cyy@cyyself.name>,
	Tingyin Duan	 <tingyin.duan@gmail.com>,
	Vern Hao <vernhao@tencent.com>, Vern Hao	 <haoxing990@gmail.com>,
	Len Brown <len.brown@intel.com>, Aubrey Li	 <aubrey.li@intel.com>,
	Zhao Liu <zhao1.liu@intel.com>, Chen Yu	 <yu.chen.surf@gmail.com>,
	Adam Li <adamli@os.amperecomputing.com>,
	Aaron Lu	 <ziqianlu@bytedance.com>,
	Tim Chen <tim.c.chen@intel.com>, Josh Don	 <joshdon@google.com>,
	Gavin Guo <gavinguo@igalia.com>,
	Qais Yousef	 <qyousef@layalina.io>,
	Libo Chen <libchen@purestorage.com>,
		linux-kernel@vger.kernel.org,
	Peter Zijlstra <peterz@infradead.org>,
	"Gautham R . Shenoy" <gautham.shenoy@amd.com>,
	Vincent Guittot <vincent.guittot@linaro.org>,
	Ingo Molnar	 <mingo@redhat.com>
Subject: Re: [PATCH v3 04/21] sched/cache: Make LLC id continuous
Date: Thu, 19 Feb 2026 16:11:47 -0800	[thread overview]
Message-ID: <d3f1bb12c24785ab28ab897a9368a5a2b017bd08.camel@linux.intel.com> (raw)
In-Reply-To: <3de1e4ff-2da5-4a58-a4ea-03accf4b7572@amd.com>

On Thu, 2026-02-19 at 11:42 +0530, K Prateek Nayak wrote:
> Hello Tim,
> 
> Thank you for the patch.
> 
> On 2/19/2026 4:51 AM, Tim Chen wrote:
> > diff --git a/init/Kconfig b/init/Kconfig
> > index 9848de949afa..4ddf54ab9cf7 100644
> > --- a/init/Kconfig
> > +++ b/init/Kconfig
> > @@ -987,6 +987,7 @@ config SCHED_CACHE
> >  	bool "Cache aware load balance"
> >  	default y
> >  	depends on SMP
> > +	depends on SCHED_MC
> >  	help
> >  	  When enabled, the scheduler will attempt to aggregate tasks from
> >  	  the same process onto a single Last Level Cache (LLC) domain when
> > diff --git a/kernel/sched/core.c b/kernel/sched/core.c
> > index 48626c81ba8e..75ba4e0bfcd3 100644
> > --- a/kernel/sched/core.c
> > +++ b/kernel/sched/core.c
> > @@ -8474,6 +8474,8 @@ int sched_cpu_deactivate(unsigned int cpu)
> >  	 */
> >  	synchronize_rcu();
> >  
> > +	sched_domains_free_llc_id(cpu);
> > +
> >  	sched_set_rq_offline(rq, cpu);
> >  
> >  	scx_rq_deactivate(rq);
> > diff --git a/kernel/sched/sched.h b/kernel/sched/sched.h
> > index 6cbc56e9adfc..04f42526e6f0 100644
> > --- a/kernel/sched/sched.h
> > +++ b/kernel/sched/sched.h
> > @@ -3862,6 +3862,7 @@ static inline bool sched_cache_enabled(void)
> >  extern void sched_cache_active_set_unlocked(void);
> >  #endif
> >  extern void init_sched_mm(struct task_struct *p);
> > +void sched_domains_free_llc_id(int cpu);
> >  
> >  extern u64 avg_vruntime(struct cfs_rq *cfs_rq);
> >  extern int entity_eligible(struct cfs_rq *cfs_rq, struct sched_entity *se);
> > diff --git a/kernel/sched/topology.c b/kernel/sched/topology.c
> > index 580fb2fbc900..5e59340ad9a9 100644
> > --- a/kernel/sched/topology.c
> > +++ b/kernel/sched/topology.c
> > @@ -18,6 +18,7 @@ void sched_domains_mutex_unlock(void)
> >  }
> >  
> >  /* Protected by sched_domains_mutex: */
> > +static cpumask_var_t sched_domains_llc_id_allocmask;
> >  static cpumask_var_t sched_domains_tmpmask;
> >  static cpumask_var_t sched_domains_tmpmask2;
> >  static int tl_max_llcs;
> > @@ -2590,6 +2591,57 @@ static bool topology_span_sane(const struct cpumask *cpu_map)
> >  	return true;
> >  }
> >  
> > +static int __sched_domains_alloc_llc_id(void)
> > +{
> > +	int lid;
> > +
> > +	lockdep_assert_held(&sched_domains_mutex);
> > +
> > +	lid = cpumask_first_zero(sched_domains_llc_id_allocmask);
> > +	if (lid >= tl_max_llcs)
> > +		tl_max_llcs = lid + 1;
> > +
> > +	/*
> > +	 * llc_id space should never grow larger than the
> > +	 * possible number of CPUs in the system.
> > +	 */
> > +	if (!unlikely(WARN_ON_ONCE(lid >= nr_cpumask_bits)))
> > +		cpumask_set_cpu(lid, sched_domains_llc_id_allocmask);
> > +	return lid;
> > +}
> > +
> > +static void __sched_domains_free_llc_id(int cpu)
> > +{
> > +	int i, lid;
> > +
> > +	lockdep_assert_held(&sched_domains_mutex);
> > +
> > +	lid = per_cpu(sd_llc_id, cpu);
> > +	if (lid == -1)
> > +		return;
> > +
> > +	per_cpu(sd_llc_id, cpu) = -1;
> > +
> > +	for_each_online_cpu(i) {
> > +		/* An online CPU owns the llc_id. */
> > +		if (per_cpu(sd_llc_id, i) == lid)
> > +			return;
> > +	}
> 
> We should perhaps warn and skip clearing lid from cpumask if lid was
> found to be larger than "nr_cpumask_bits". Shouldn't happen but just
> as a precaution.

Will do

> 
> > +
> > +	cpumask_clear_cpu(lid, sched_domains_llc_id_allocmask);
> > +
> > +	/* shrink max LLC size to save memory */
> > +	if (lid == tl_max_llcs - 1)
> > +		lid = tl_max_llcs--;
> 
> No need to assign the local "lid" variable here; Simple decrement
> should do.

Good point

> 
> > +}
> > +
> > +void sched_domains_free_llc_id(int cpu)
> > +{
> > +	sched_domains_mutex_lock();
> > +	__sched_domains_free_llc_id(cpu);
> > +	sched_domains_mutex_unlock();
> > +}
> > +
> >  /*
> >   * Build sched domains for a given set of CPUs and attach the sched domains
> >   * to the individual CPUs
> > @@ -2615,18 +2667,11 @@ build_sched_domains(const struct cpumask *cpu_map, struct sched_domain_attr *att
> >  
> >  	/* Set up domains for CPUs specified by the cpu_map: */
> >  	for_each_cpu(i, cpu_map) {
> > -		struct sched_domain_topology_level *tl, *tl_llc = NULL;
> > +		struct sched_domain_topology_level *tl;
> >  		int lid;
> >  
> >  		sd = NULL;
> >  		for_each_sd_topology(tl) {
> > -			int flags = 0;
> > -
> > -			if (tl->sd_flags)
> > -				flags = (*tl->sd_flags)();
> > -
> > -			if (flags & SD_SHARE_LLC)
> > -				tl_llc = tl;
> >  
> >  			sd = build_sched_domain(tl, cpu_map, attr, sd, i);
> >  
> > @@ -2642,18 +2687,19 @@ build_sched_domains(const struct cpumask *cpu_map, struct sched_domain_attr *att
> >  		if (lid == -1) {
> >  			int j;
> >  
> > +			j = cpumask_first(cpu_coregroup_mask(i));
> >  			/*
> >  			 * Assign the llc_id to the CPUs that do not
> >  			 * have an LLC.
> >  			 */
> > -			if (!tl_llc) {
> > -				per_cpu(sd_llc_id, i) = tl_max_llcs++;
> > +			if (j >= nr_cpu_ids) {
> > +				per_cpu(sd_llc_id, i) = __sched_domains_alloc_llc_id();
> >  
> >  				continue;
> >  			}
> 
> I don't think we need to special case this out since:
> 
>     for_each_cpu(j, cpu_coregroup_mask(i)) {
>         ...
>     }
> 
> would bail out if no CPU is set (also CPU "i" would definitely be
> set on it since it must be online) and the "if" after the loop will
> see "lid" as "-1" and DTRT.

That's right.  Will take out the non-needed code.

Also found out that cpu_coregroup_mask() is not defined for config
without CONFIG_SMP.  So will put the llc id assignment code under
CONFIG_SMP.

Thanks for the code reviews and suggestions.

Tim
> 
> >  
> >  			/* try to reuse the llc_id of its siblings */
> > -			for_each_cpu(j, tl_llc->mask(tl_llc, i)) {
> > +			for (; j < nr_cpu_ids; j = cpumask_next(j, cpu_coregroup_mask(i))) {
> >  				if (i == j)
> >  					continue;
> >  
> > @@ -2668,7 +2714,7 @@ build_sched_domains(const struct cpumask *cpu_map, struct sched_domain_attr *att
> >  
> >  			/* a new LLC is detected */
> >  			if (lid == -1)
> > -				per_cpu(sd_llc_id, i) = tl_max_llcs++;
> > +				per_cpu(sd_llc_id, i) = __sched_domains_alloc_llc_id();
> >  		}
> >  	}
> >  
> > @@ -2869,6 +2915,7 @@ int __init sched_init_domains(const struct cpumask *cpu_map)
> >  {
> >  	int err;
> >  
> > +	zalloc_cpumask_var(&sched_domains_llc_id_allocmask, GFP_KERNEL);
> >  	zalloc_cpumask_var(&sched_domains_tmpmask, GFP_KERNEL);
> >  	zalloc_cpumask_var(&sched_domains_tmpmask2, GFP_KERNEL);
> >  	zalloc_cpumask_var(&fallback_doms, GFP_KERNEL);

  parent reply	other threads:[~2026-02-20  0:11 UTC|newest]

Thread overview: 117+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-02-10 22:18 [PATCH v3 00/21] Cache Aware Scheduling Tim Chen
2026-02-10 22:18 ` [PATCH v3 01/21] sched/cache: Introduce infrastructure for cache-aware load balancing Tim Chen
2026-02-14 12:26   ` Madadi Vineeth Reddy
2026-02-14 15:34     ` Chen, Yu C
2026-02-17 18:51       ` Tim Chen
2026-02-10 22:18 ` [PATCH v3 02/21] sched/cache: Record per LLC utilization to guide cache aware scheduling decisions Tim Chen
2026-02-10 22:18 ` [PATCH v3 03/21] sched/cache: Introduce helper functions to enforce LLC migration policy Tim Chen
2026-02-14 16:12   ` Madadi Vineeth Reddy
2026-02-15 12:14     ` Chen, Yu C
2026-02-19 11:29   ` Peter Zijlstra
2026-02-19 14:48     ` Chen, Yu C
2026-02-19 14:55       ` Peter Zijlstra
2026-02-10 22:18 ` [PATCH v3 04/21] sched/cache: Make LLC id continuous Tim Chen
2026-02-14 17:53   ` Madadi Vineeth Reddy
2026-02-15 14:25     ` Chen, Yu C
2026-02-17 10:05       ` Madadi Vineeth Reddy
2026-02-17 21:20         ` Tim Chen
2026-02-16  7:44   ` K Prateek Nayak
2026-02-17  6:07     ` Chen, Yu C
2026-02-17  8:09       ` K Prateek Nayak
2026-02-17 23:12         ` Tim Chen
2026-02-18  3:28           ` K Prateek Nayak
2026-02-18 15:22             ` Chen, Yu C
2026-02-18 17:46               ` K Prateek Nayak
2026-02-18 23:21                 ` Tim Chen
2026-02-19  6:12                   ` K Prateek Nayak
2026-02-19 15:51                     ` Peter Zijlstra
2026-02-20  0:11                     ` Tim Chen [this message]
2026-02-19 11:25                   ` Chen, Yu C
2026-02-19 16:10                     ` K Prateek Nayak
2026-02-18 18:45               ` Tim Chen
2026-02-18 21:33             ` Tim Chen
2026-02-18 15:11         ` Chen, Yu C
2026-02-19 15:48         ` Peter Zijlstra
2026-02-20 15:22           ` Chen, Yu C
2026-02-19 15:40     ` Peter Zijlstra
2026-02-20 15:53       ` Chen, Yu C
2026-02-20 16:03         ` Peter Zijlstra
2026-02-20 16:10           ` Chen, Yu C
2026-02-20 19:24             ` Tim Chen
2026-02-20 19:30               ` Peter Zijlstra
2026-02-20 19:35                 ` Tim Chen
2026-02-19 11:35   ` Peter Zijlstra
2026-02-19 18:17     ` Tim Chen
2026-02-19 14:59   ` Peter Zijlstra
2026-02-19 15:20     ` Chen, Yu C
2026-02-19 19:20       ` Tim Chen
2026-02-19 21:04         ` Tim Chen
2026-02-20 17:17           ` Chen, Yu C
2026-02-10 22:18 ` [PATCH v3 05/21] sched/cache: Assign preferred LLC ID to processes Tim Chen
2026-02-14 18:36   ` Madadi Vineeth Reddy
2026-02-16  6:58     ` Chen, Yu C
2026-02-10 22:18 ` [PATCH v3 06/21] sched/cache: Track LLC-preferred tasks per runqueue Tim Chen
2026-02-10 22:18 ` [PATCH v3 07/21] sched/cache: Introduce per CPU's tasks LLC preference counter Tim Chen
2026-02-20 10:45   ` Peter Zijlstra
2026-02-20 16:57     ` Chen, Yu C
2026-02-20 18:38       ` Peter Zijlstra
2026-02-10 22:18 ` [PATCH v3 08/21] sched/cache: Calculate the percpu sd task LLC preference Tim Chen
2026-02-20 11:02   ` Peter Zijlstra
2026-02-20 14:02     ` Peter Zijlstra
2026-02-20 17:25       ` Chen, Yu C
2026-02-10 22:18 ` [PATCH v3 09/21] sched/cache: Count tasks prefering destination LLC in a sched group Tim Chen
2026-02-20 12:52   ` Peter Zijlstra
2026-02-20 13:43     ` Peter Zijlstra
2026-02-21  2:53       ` Chen, Yu C
2026-02-10 22:18 ` [PATCH v3 10/21] sched/cache: Check local_group only once in update_sg_lb_stats() Tim Chen
2026-02-10 22:18 ` [PATCH v3 11/21] sched/cache: Prioritize tasks preferring destination LLC during balancing Tim Chen
2026-02-17 18:33   ` Madadi Vineeth Reddy
2026-02-17 21:45     ` Tim Chen
2026-02-10 22:18 ` [PATCH v3 12/21] sched/cache: Add migrate_llc_task migration type for cache-aware balancing Tim Chen
2026-02-10 22:18 ` [PATCH v3 13/21] sched/cache: Handle moving single tasks to/from their preferred LLC Tim Chen
2026-02-17 19:00   ` Madadi Vineeth Reddy
2026-02-17 22:04     ` Tim Chen
2026-02-20 13:53   ` Peter Zijlstra
2026-02-20 18:22     ` Tim Chen
2026-02-10 22:18 ` [PATCH v3 14/21] sched/cache: Respect LLC preference in task migration and detach Tim Chen
2026-02-18  9:14   ` Madadi Vineeth Reddy
2026-02-18 15:34     ` Chen, Yu C
2026-02-10 22:18 ` [PATCH v3 15/21] sched/cache: Disable cache aware scheduling for processes with high thread counts Tim Chen
2026-02-18 17:54   ` Madadi Vineeth Reddy
2026-02-18 21:44     ` Tim Chen
2026-02-19  2:28       ` Madadi Vineeth Reddy
2026-02-19 14:38         ` Chen, Yu C
2026-02-19 21:12         ` Tim Chen
2026-02-19 16:52     ` Peter Zijlstra
2026-02-20  7:02       ` Madadi Vineeth Reddy
2026-02-19 16:55     ` Peter Zijlstra
2026-02-20  6:40       ` Madadi Vineeth Reddy
2026-02-20  9:53         ` Peter Zijlstra
2026-02-24  9:42           ` Madadi Vineeth Reddy
2026-02-19 16:50   ` Peter Zijlstra
2026-02-19 21:06     ` Tim Chen
2026-02-10 22:18 ` [PATCH v3 16/21] sched/cache: Avoid cache-aware scheduling for memory-heavy processes Tim Chen
2026-02-10 22:18 ` [PATCH v3 17/21] sched/cache: Enable cache aware scheduling for multi LLCs NUMA node Tim Chen
2026-02-10 22:18 ` [PATCH v3 18/21] sched/cache: Allow the user space to turn on and off cache aware scheduling Tim Chen
2026-02-10 22:18 ` [PATCH v3 19/21] sched/cache: Add user control to adjust the aggressiveness of cache-aware scheduling Tim Chen
2026-02-20 14:29   ` Peter Zijlstra
2026-02-20 18:18     ` Tim Chen
2026-02-10 22:19 ` [PATCH v3 20/21] -- DO NOT APPLY!!! -- sched/cache/debug: Display the per LLC occupancy for each process via proc fs Tim Chen
2026-02-10 22:19 ` [PATCH v3 21/21] -- DO NOT APPLY!!! -- sched/cache/debug: Add ftrace to track the load balance statistics Tim Chen
2026-02-19 14:08 ` [PATCH v3 00/21] Cache Aware Scheduling Qais Yousef
2026-02-19 14:41   ` Peter Zijlstra
2026-02-19 15:07     ` Chen, Yu C
2026-02-19 18:11       ` Tim Chen
2026-02-20  3:29         ` Qais Yousef
2026-02-20  9:43           ` Peter Zijlstra
2026-02-24  2:49             ` Qais Yousef
2026-02-20 18:14           ` Tim Chen
2026-02-24  3:02             ` Qais Yousef
2026-02-20  3:25       ` Qais Yousef
2026-02-21  2:48         ` Chen, Yu C
2026-02-24  3:11           ` Qais Yousef
2026-02-19 19:48     ` Qais Yousef
2026-02-19 21:47       ` Tim Chen
2026-02-20  3:41         ` Qais Yousef
2026-02-20  8:45           ` Peter Zijlstra
2026-02-24  3:31             ` Qais Yousef

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