From: Tim Chen <tim.c.chen@linux.intel.com>
To: Peter Zijlstra <peterz@infradead.org>,
Ingo Molnar <mingo@redhat.com>,
K Prateek Nayak <kprateek.nayak@amd.com>,
"Gautham R . Shenoy" <gautham.shenoy@amd.com>,
Vincent Guittot <vincent.guittot@linaro.org>
Cc: Chen Yu <yu.c.chen@intel.com>, Juri Lelli <juri.lelli@redhat.com>,
Dietmar Eggemann <dietmar.eggemann@arm.com>,
Steven Rostedt <rostedt@goodmis.org>,
Ben Segall <bsegall@google.com>, Mel Gorman <mgorman@suse.de>,
Valentin Schneider <vschneid@redhat.com>,
Madadi Vineeth Reddy <vineethr@linux.ibm.com>,
Hillf Danton <hdanton@sina.com>,
Shrikanth Hegde <sshegde@linux.ibm.com>,
Jianyong Wu <jianyong.wu@outlook.com>,
Yangyu Chen <cyy@cyyself.name>,
Tingyin Duan <tingyin.duan@gmail.com>,
Vern Hao <vernhao@tencent.com>, Vern Hao <haoxing990@gmail.com>,
Len Brown <len.brown@intel.com>,
Tim Chen <tim.c.chen@linux.intel.com>,
Aubrey Li <aubrey.li@intel.com>, Zhao Liu <zhao1.liu@intel.com>,
Chen Yu <yu.chen.surf@gmail.com>,
Adam Li <adamli@os.amperecomputing.com>,
Aaron Lu <ziqianlu@bytedance.com>,
Tim Chen <tim.c.chen@intel.com>, Josh Don <joshdon@google.com>,
Gavin Guo <gavinguo@igalia.com>,
Qais Yousef <qyousef@layalina.io>,
Libo Chen <libchen@purestorage.com>,
linux-kernel@vger.kernel.org
Subject: [PATCH v3 17/21] sched/cache: Enable cache aware scheduling for multi LLCs NUMA node
Date: Tue, 10 Feb 2026 14:18:57 -0800 [thread overview]
Message-ID: <e8bd96c944daf0afee58b6be1ba369291f5ca19e.1770760558.git.tim.c.chen@linux.intel.com> (raw)
In-Reply-To: <cover.1770760558.git.tim.c.chen@linux.intel.com>
From: Chen Yu <yu.c.chen@intel.com>
Introduce sched_cache_present to enable cache aware scheduling for
multi LLCs NUMA node Cache-aware load balancing should only be
enabled if there are more than 1 LLCs within 1 NUMA node.
sched_cache_present is introduced to indicate whether this
platform supports this topology.
Suggested-by: Libo Chen <libchen@purestorage.com>
Suggested-by: Adam Li <adamli@os.amperecomputing.com>
Co-developed-by: Tim Chen <tim.c.chen@linux.intel.com>
Signed-off-by: Tim Chen <tim.c.chen@linux.intel.com>
Signed-off-by: Chen Yu <yu.c.chen@intel.com>
---
Notes:
v2->v3:
No change.
kernel/sched/sched.h | 3 ++-
kernel/sched/topology.c | 18 ++++++++++++++++--
2 files changed, 18 insertions(+), 3 deletions(-)
diff --git a/kernel/sched/sched.h b/kernel/sched/sched.h
index c18e59f320a6..59ac04625842 100644
--- a/kernel/sched/sched.h
+++ b/kernel/sched/sched.h
@@ -3916,11 +3916,12 @@ static inline void mm_cid_switch_to(struct task_struct *prev, struct task_struct
#endif /* !CONFIG_SCHED_MM_CID */
#ifdef CONFIG_SCHED_CACHE
+DECLARE_STATIC_KEY_FALSE(sched_cache_present);
extern int max_llcs;
static inline bool sched_cache_enabled(void)
{
- return false;
+ return static_branch_unlikely(&sched_cache_present);
}
#endif
extern void init_sched_mm(struct task_struct *p);
diff --git a/kernel/sched/topology.c b/kernel/sched/topology.c
index dae78b5915a7..9104fed25351 100644
--- a/kernel/sched/topology.c
+++ b/kernel/sched/topology.c
@@ -801,6 +801,7 @@ enum s_alloc {
};
#ifdef CONFIG_SCHED_CACHE
+DEFINE_STATIC_KEY_FALSE(sched_cache_present);
static bool alloc_sd_pref(const struct cpumask *cpu_map,
struct s_data *d)
{
@@ -2604,6 +2605,7 @@ static int
build_sched_domains(const struct cpumask *cpu_map, struct sched_domain_attr *attr)
{
enum s_alloc alloc_state = sa_none;
+ bool has_multi_llcs = false;
struct sched_domain *sd;
struct s_data d;
struct rq *rq = NULL;
@@ -2731,10 +2733,12 @@ build_sched_domains(const struct cpumask *cpu_map, struct sched_domain_attr *att
* between LLCs and memory channels.
*/
nr_llcs = sd->span_weight / child->span_weight;
- if (nr_llcs == 1)
+ if (nr_llcs == 1) {
imb = sd->span_weight >> 3;
- else
+ } else {
imb = nr_llcs;
+ has_multi_llcs = true;
+ }
imb = max(1U, imb);
sd->imb_numa_nr = imb;
@@ -2796,6 +2800,16 @@ build_sched_domains(const struct cpumask *cpu_map, struct sched_domain_attr *att
ret = 0;
error:
+#ifdef CONFIG_SCHED_CACHE
+ /*
+ * TBD: check before writing to it. sched domain rebuild
+ * is not in the critical path, leave as-is for now.
+ */
+ if (!ret && has_multi_llcs)
+ static_branch_enable_cpuslocked(&sched_cache_present);
+ else
+ static_branch_disable_cpuslocked(&sched_cache_present);
+#endif
__free_domain_allocs(&d, alloc_state, cpu_map);
return ret;
--
2.32.0
next prev parent reply other threads:[~2026-02-10 22:13 UTC|newest]
Thread overview: 117+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-02-10 22:18 [PATCH v3 00/21] Cache Aware Scheduling Tim Chen
2026-02-10 22:18 ` [PATCH v3 01/21] sched/cache: Introduce infrastructure for cache-aware load balancing Tim Chen
2026-02-14 12:26 ` Madadi Vineeth Reddy
2026-02-14 15:34 ` Chen, Yu C
2026-02-17 18:51 ` Tim Chen
2026-02-10 22:18 ` [PATCH v3 02/21] sched/cache: Record per LLC utilization to guide cache aware scheduling decisions Tim Chen
2026-02-10 22:18 ` [PATCH v3 03/21] sched/cache: Introduce helper functions to enforce LLC migration policy Tim Chen
2026-02-14 16:12 ` Madadi Vineeth Reddy
2026-02-15 12:14 ` Chen, Yu C
2026-02-19 11:29 ` Peter Zijlstra
2026-02-19 14:48 ` Chen, Yu C
2026-02-19 14:55 ` Peter Zijlstra
2026-02-10 22:18 ` [PATCH v3 04/21] sched/cache: Make LLC id continuous Tim Chen
2026-02-14 17:53 ` Madadi Vineeth Reddy
2026-02-15 14:25 ` Chen, Yu C
2026-02-17 10:05 ` Madadi Vineeth Reddy
2026-02-17 21:20 ` Tim Chen
2026-02-16 7:44 ` K Prateek Nayak
2026-02-17 6:07 ` Chen, Yu C
2026-02-17 8:09 ` K Prateek Nayak
2026-02-17 23:12 ` Tim Chen
2026-02-18 3:28 ` K Prateek Nayak
2026-02-18 15:22 ` Chen, Yu C
2026-02-18 17:46 ` K Prateek Nayak
2026-02-18 23:21 ` Tim Chen
2026-02-19 6:12 ` K Prateek Nayak
2026-02-19 15:51 ` Peter Zijlstra
2026-02-20 0:11 ` Tim Chen
2026-02-19 11:25 ` Chen, Yu C
2026-02-19 16:10 ` K Prateek Nayak
2026-02-18 18:45 ` Tim Chen
2026-02-18 21:33 ` Tim Chen
2026-02-18 15:11 ` Chen, Yu C
2026-02-19 15:48 ` Peter Zijlstra
2026-02-20 15:22 ` Chen, Yu C
2026-02-19 15:40 ` Peter Zijlstra
2026-02-20 15:53 ` Chen, Yu C
2026-02-20 16:03 ` Peter Zijlstra
2026-02-20 16:10 ` Chen, Yu C
2026-02-20 19:24 ` Tim Chen
2026-02-20 19:30 ` Peter Zijlstra
2026-02-20 19:35 ` Tim Chen
2026-02-19 11:35 ` Peter Zijlstra
2026-02-19 18:17 ` Tim Chen
2026-02-19 14:59 ` Peter Zijlstra
2026-02-19 15:20 ` Chen, Yu C
2026-02-19 19:20 ` Tim Chen
2026-02-19 21:04 ` Tim Chen
2026-02-20 17:17 ` Chen, Yu C
2026-02-10 22:18 ` [PATCH v3 05/21] sched/cache: Assign preferred LLC ID to processes Tim Chen
2026-02-14 18:36 ` Madadi Vineeth Reddy
2026-02-16 6:58 ` Chen, Yu C
2026-02-10 22:18 ` [PATCH v3 06/21] sched/cache: Track LLC-preferred tasks per runqueue Tim Chen
2026-02-10 22:18 ` [PATCH v3 07/21] sched/cache: Introduce per CPU's tasks LLC preference counter Tim Chen
2026-02-20 10:45 ` Peter Zijlstra
2026-02-20 16:57 ` Chen, Yu C
2026-02-20 18:38 ` Peter Zijlstra
2026-02-10 22:18 ` [PATCH v3 08/21] sched/cache: Calculate the percpu sd task LLC preference Tim Chen
2026-02-20 11:02 ` Peter Zijlstra
2026-02-20 14:02 ` Peter Zijlstra
2026-02-20 17:25 ` Chen, Yu C
2026-02-10 22:18 ` [PATCH v3 09/21] sched/cache: Count tasks prefering destination LLC in a sched group Tim Chen
2026-02-20 12:52 ` Peter Zijlstra
2026-02-20 13:43 ` Peter Zijlstra
2026-02-21 2:53 ` Chen, Yu C
2026-02-10 22:18 ` [PATCH v3 10/21] sched/cache: Check local_group only once in update_sg_lb_stats() Tim Chen
2026-02-10 22:18 ` [PATCH v3 11/21] sched/cache: Prioritize tasks preferring destination LLC during balancing Tim Chen
2026-02-17 18:33 ` Madadi Vineeth Reddy
2026-02-17 21:45 ` Tim Chen
2026-02-10 22:18 ` [PATCH v3 12/21] sched/cache: Add migrate_llc_task migration type for cache-aware balancing Tim Chen
2026-02-10 22:18 ` [PATCH v3 13/21] sched/cache: Handle moving single tasks to/from their preferred LLC Tim Chen
2026-02-17 19:00 ` Madadi Vineeth Reddy
2026-02-17 22:04 ` Tim Chen
2026-02-20 13:53 ` Peter Zijlstra
2026-02-20 18:22 ` Tim Chen
2026-02-10 22:18 ` [PATCH v3 14/21] sched/cache: Respect LLC preference in task migration and detach Tim Chen
2026-02-18 9:14 ` Madadi Vineeth Reddy
2026-02-18 15:34 ` Chen, Yu C
2026-02-10 22:18 ` [PATCH v3 15/21] sched/cache: Disable cache aware scheduling for processes with high thread counts Tim Chen
2026-02-18 17:54 ` Madadi Vineeth Reddy
2026-02-18 21:44 ` Tim Chen
2026-02-19 2:28 ` Madadi Vineeth Reddy
2026-02-19 14:38 ` Chen, Yu C
2026-02-19 21:12 ` Tim Chen
2026-02-19 16:52 ` Peter Zijlstra
2026-02-20 7:02 ` Madadi Vineeth Reddy
2026-02-19 16:55 ` Peter Zijlstra
2026-02-20 6:40 ` Madadi Vineeth Reddy
2026-02-20 9:53 ` Peter Zijlstra
2026-02-24 9:42 ` Madadi Vineeth Reddy
2026-02-19 16:50 ` Peter Zijlstra
2026-02-19 21:06 ` Tim Chen
2026-02-10 22:18 ` [PATCH v3 16/21] sched/cache: Avoid cache-aware scheduling for memory-heavy processes Tim Chen
2026-02-10 22:18 ` Tim Chen [this message]
2026-02-10 22:18 ` [PATCH v3 18/21] sched/cache: Allow the user space to turn on and off cache aware scheduling Tim Chen
2026-02-10 22:18 ` [PATCH v3 19/21] sched/cache: Add user control to adjust the aggressiveness of cache-aware scheduling Tim Chen
2026-02-20 14:29 ` Peter Zijlstra
2026-02-20 18:18 ` Tim Chen
2026-02-10 22:19 ` [PATCH v3 20/21] -- DO NOT APPLY!!! -- sched/cache/debug: Display the per LLC occupancy for each process via proc fs Tim Chen
2026-02-10 22:19 ` [PATCH v3 21/21] -- DO NOT APPLY!!! -- sched/cache/debug: Add ftrace to track the load balance statistics Tim Chen
2026-02-19 14:08 ` [PATCH v3 00/21] Cache Aware Scheduling Qais Yousef
2026-02-19 14:41 ` Peter Zijlstra
2026-02-19 15:07 ` Chen, Yu C
2026-02-19 18:11 ` Tim Chen
2026-02-20 3:29 ` Qais Yousef
2026-02-20 9:43 ` Peter Zijlstra
2026-02-24 2:49 ` Qais Yousef
2026-02-20 18:14 ` Tim Chen
2026-02-24 3:02 ` Qais Yousef
2026-02-20 3:25 ` Qais Yousef
2026-02-21 2:48 ` Chen, Yu C
2026-02-24 3:11 ` Qais Yousef
2026-02-19 19:48 ` Qais Yousef
2026-02-19 21:47 ` Tim Chen
2026-02-20 3:41 ` Qais Yousef
2026-02-20 8:45 ` Peter Zijlstra
2026-02-24 3:31 ` Qais Yousef
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